From 458d4574259e8963a96c46244690281222cde349 Mon Sep 17 00:00:00 2001
From: Jianwei Fan <jianwei.fan@rock-chips.com>
Date: Sat, 8 Jul 2023 03:03:13 +0000
Subject: [PATCH 01/10] media: i2c: lt6911uxe: modify rk3588_dcphy params

Change-Id: I5455c5e18e0074aa08a9bd97d20fa51bf2790a8a
Signed-off-by: Jianwei Fan <jianwei.fan@rock-chips.com>
---
 drivers/media/i2c/lt6911uxe.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/drivers/media/i2c/lt6911uxe.c b/drivers/media/i2c/lt6911uxe.c
index 50cf2920eed0..fb15093c13d5 100644
--- a/drivers/media/i2c/lt6911uxe.c
+++ b/drivers/media/i2c/lt6911uxe.c
@@ -223,9 +223,9 @@ struct lt6911uxe_mode {
 static struct rkmodule_csi_dphy_param rk3588_dcphy_param = {
 	.vendor = PHY_VENDOR_SAMSUNG,
 	.lp_vol_ref = 3,
-	.lp_hys_sw = {3, 0, 0, 0},
-	.lp_escclk_pol_sel = {1, 0, 0, 0},
-	.skew_data_cal_clk = {0, 3, 3, 3},
+	.lp_hys_sw = {3, 0, 3, 0},
+	.lp_escclk_pol_sel = {1, 1, 0, 0},
+	.skew_data_cal_clk = {0, 13, 0, 13},
 	.clk_hs_term_sel = 2,
 	.data_hs_term_sel = {2, 2, 2, 2},
 	.reserved = {0},

From e57d4ee1aeb89e0af2e16b98c2abae3d59743504 Mon Sep 17 00:00:00 2001
From: Jianwei Fan <jianwei.fan@rock-chips.com>
Date: Tue, 4 Jul 2023 11:52:44 +0000
Subject: [PATCH 02/10] media: i2c: it6616: modify set ctrl when video stable

Change-Id: I84b583f0a8c17a84a4c22f5a9d62dbde42904132
Signed-off-by: Jianwei Fan <jianwei.fan@rock-chips.com>
---
 drivers/media/i2c/it6616.c | 12 +++++++++++-
 1 file changed, 11 insertions(+), 1 deletion(-)

diff --git a/drivers/media/i2c/it6616.c b/drivers/media/i2c/it6616.c
index 6928a11ac47c..fc930d2938c7 100644
--- a/drivers/media/i2c/it6616.c
+++ b/drivers/media/i2c/it6616.c
@@ -3519,6 +3519,16 @@ static int it6616_isr(struct v4l2_subdev *sd, u32 status, bool *handled)
 	return 0;
 }
 
+static void it6616_detect_hot_plug(struct v4l2_subdev *sd)
+{
+	struct it6616 *it6616 = to_it6616(sd);
+
+	if (it6616->mipi_tx_video_stable && it6616_hdmi_is_5v_on(it6616))
+		v4l2_ctrl_s_ctrl(it6616->detect_tx_5v_ctrl, 1);
+	else
+		v4l2_ctrl_s_ctrl(it6616->detect_tx_5v_ctrl, 0);
+}
+
 static void it6616_work_i2c_poll(struct work_struct *work)
 {
 	struct delayed_work *dwork = to_delayed_work(work);
@@ -3526,8 +3536,8 @@ static void it6616_work_i2c_poll(struct work_struct *work)
 			struct it6616, work_i2c_poll);
 	bool handled;
 
-	it6616_s_ctrl_detect_tx_5v(&it6616->sd);
 	it6616_isr(&it6616->sd, 0, &handled);
+	it6616_detect_hot_plug(&it6616->sd);
 	schedule_delayed_work(&it6616->work_i2c_poll,
 			msecs_to_jiffies(POLL_INTERVAL_MS));
 }

From 78e9c25543b5c1721b17452887e5ee7ff34706a4 Mon Sep 17 00:00:00 2001
From: Wyon Bi <bivvy.bi@rock-chips.com>
Date: Mon, 19 Jun 2023 16:10:53 +0800
Subject: [PATCH 03/10] drm/panel: Add panel driver for Maxim MAX96772 based
 LCDs

Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
Change-Id: Ie1981f600dd1422052f57c329ceed0702bb97ca4
---
 drivers/gpu/drm/panel/Kconfig                |   8 +
 drivers/gpu/drm/panel/Makefile               |   1 +
 drivers/gpu/drm/panel/panel-maxim-max96772.c | 543 +++++++++++++++++++
 3 files changed, 552 insertions(+)
 create mode 100644 drivers/gpu/drm/panel/panel-maxim-max96772.c

diff --git a/drivers/gpu/drm/panel/Kconfig b/drivers/gpu/drm/panel/Kconfig
index 2794dd34726f..c04e091233f1 100644
--- a/drivers/gpu/drm/panel/Kconfig
+++ b/drivers/gpu/drm/panel/Kconfig
@@ -236,6 +236,14 @@ config DRM_PANEL_MAXIM_MAX96752F
 	  Say Y if you want to enable support for panels based on the
 	  Maxim MAX96752F.
 
+config DRM_PANEL_MAXIM_MAX96772
+	tristate "Maxim MAX96772-based panels"
+	depends on OF
+	depends on BACKLIGHT_CLASS_DEVICE
+	help
+	  Say Y if you want to enable support for panels based on the
+	  Maxim MAX96772.
+
 config DRM_PANEL_OLIMEX_LCD_OLINUXINO
 	tristate "Olimex LCD-OLinuXino panel"
 	depends on OF
diff --git a/drivers/gpu/drm/panel/Makefile b/drivers/gpu/drm/panel/Makefile
index d99b1eaf92c2..f28d98218387 100644
--- a/drivers/gpu/drm/panel/Makefile
+++ b/drivers/gpu/drm/panel/Makefile
@@ -22,6 +22,7 @@ obj-$(CONFIG_DRM_PANEL_NOVATEK_NT35510) += panel-novatek-nt35510.o
 obj-$(CONFIG_DRM_PANEL_NOVATEK_NT39016) += panel-novatek-nt39016.o
 obj-$(CONFIG_DRM_PANEL_MANTIX_MLAF057WE51) += panel-mantix-mlaf057we51.o
 obj-$(CONFIG_DRM_PANEL_MAXIM_MAX96752F) += panel-maxim-max96752f.o
+obj-$(CONFIG_DRM_PANEL_MAXIM_MAX96772) += panel-maxim-max96772.o
 obj-$(CONFIG_DRM_PANEL_OLIMEX_LCD_OLINUXINO) += panel-olimex-lcd-olinuxino.o
 obj-$(CONFIG_DRM_PANEL_ORISETECH_OTM8009A) += panel-orisetech-otm8009a.o
 obj-$(CONFIG_DRM_PANEL_OSD_OSD101T2587_53TS) += panel-osd-osd101t2587-53ts.o
diff --git a/drivers/gpu/drm/panel/panel-maxim-max96772.c b/drivers/gpu/drm/panel/panel-maxim-max96772.c
new file mode 100644
index 000000000000..2e16d0337887
--- /dev/null
+++ b/drivers/gpu/drm/panel/panel-maxim-max96772.c
@@ -0,0 +1,543 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2022 Rockchip Electronics Co. Ltd.
+ */
+
+#include <linux/backlight.h>
+#include <linux/delay.h>
+#include <linux/gpio/consumer.h>
+#include <linux/of_platform.h>
+#include <linux/pinctrl/consumer.h>
+#include <linux/i2c.h>
+#include <linux/module.h>
+#include <linux/regmap.h>
+#include <linux/of.h>
+
+#include <video/videomode.h>
+#include <video/of_display_timing.h>
+#include <video/display_timing.h>
+#include <uapi/linux/media-bus-format.h>
+
+#include <drm/drm_device.h>
+#include <drm/drm_dp_helper.h>
+#include <drm/drm_modes.h>
+#include <drm/drm_panel.h>
+
+struct max96772_panel;
+
+struct panel_desc {
+	const char *name;
+	u32 width_mm;
+	u32 height_mm;
+	u32 link_rate;
+	u32 lane_count;
+	bool ssc;
+
+	int (*prepare)(struct max96772_panel *p);
+	int (*unprepare)(struct max96772_panel *p);
+	int (*enable)(struct max96772_panel *p);
+	int (*disable)(struct max96772_panel *p);
+	int (*backlight_enable)(struct max96772_panel *p);
+	int (*backlight_disable)(struct max96772_panel *p);
+};
+
+struct max96772_panel {
+	struct drm_panel panel;
+	struct device *dev;
+	struct {
+		struct regmap *serializer;
+		struct regmap *deserializer;
+	} regmap;
+	struct backlight_device *backlight;
+	struct drm_display_mode mode;
+	const struct panel_desc *desc;
+	u32 link_rate;
+	u32 lane_count;
+	bool ssc;
+	bool panel_dual_link;
+};
+
+#define maxim_serializer_write(p, reg, val) do {			\
+		int ret;						\
+		ret = regmap_write(p->regmap.serializer, reg, val);	\
+		if (ret)						\
+			return ret;					\
+	} while (0)
+
+#define maxim_serializer_read(p, reg, val) do {				\
+		int ret;						\
+		ret = regmap_read(p->regmap.serializer, reg, val);	\
+		if (ret)						\
+			return ret;					\
+	} while (0)
+
+#define maxim_deserializer_write(p, reg, val) do {			\
+		int ret;						\
+		ret = regmap_write(p->regmap.deserializer, reg, val);	\
+		if (ret)						\
+			return ret;					\
+	} while (0)
+
+#define maxim_deserializer_read(p, reg, val) do {			\
+		int ret;						\
+		ret = regmap_read(p->regmap.deserializer, reg, val);	\
+		if (ret)						\
+			return ret;					\
+	} while (0)
+
+static const struct reg_sequence max96772_clk_ref[3][14] = {
+	{
+		{ 0xe7b2, 0x50 },
+		{ 0xe7b3, 0x00 },
+		{ 0xe7b4, 0xcc },
+		{ 0xe7b5, 0x44 },
+		{ 0xe7b6, 0x81 },
+		{ 0xe7b7, 0x30 },
+		{ 0xe7b8, 0x07 },
+		{ 0xe7b9, 0x10 },
+		{ 0xe7ba, 0x01 },
+		{ 0xe7bb, 0x00 },
+		{ 0xe7bc, 0x00 },
+		{ 0xe7bd, 0x00 },
+		{ 0xe7be, 0x52 },
+		{ 0xe7bf, 0x00 },
+	}, {
+		{ 0xe7b2, 0x50 },
+		{ 0xe7b3, 0x00 },
+		{ 0xe7b4, 0x00 },
+		{ 0xe7b5, 0x40 },
+		{ 0xe7b6, 0x6c },
+		{ 0xe7b7, 0x20 },
+		{ 0xe7b8, 0x07 },
+		{ 0xe7b9, 0x00 },
+		{ 0xe7ba, 0x01 },
+		{ 0xe7bb, 0x00 },
+		{ 0xe7bc, 0x00 },
+		{ 0xe7bd, 0x00 },
+		{ 0xe7be, 0x52 },
+		{ 0xe7bf, 0x00 },
+	}, {
+		{ 0xe7b2, 0x30 },
+		{ 0xe7b3, 0x00 },
+		{ 0xe7b4, 0x00 },
+		{ 0xe7b5, 0x40 },
+		{ 0xe7b6, 0x6c },
+		{ 0xe7b7, 0x20 },
+		{ 0xe7b8, 0x14 },
+		{ 0xe7b9, 0x00 },
+		{ 0xe7ba, 0x2e },
+		{ 0xe7bb, 0x00 },
+		{ 0xe7bc, 0x00 },
+		{ 0xe7bd, 0x01 },
+		{ 0xe7be, 0x32 },
+		{ 0xe7bf, 0x00 },
+	}
+};
+
+static int max96772_aux_dpcd_read(struct max96772_panel *p, u32 reg, u32 *value)
+{
+	maxim_deserializer_write(p, 0xe778, reg & 0xff);
+	maxim_deserializer_write(p, 0xe779, (reg >> 8) & 0xff);
+	maxim_deserializer_write(p, 0xe77c, (reg >> 16) & 0xff);
+	maxim_deserializer_write(p, 0xe776, 0x10);
+	maxim_deserializer_write(p, 0xe777, 0x80);
+	/* FIXME */
+	msleep(50);
+	maxim_deserializer_read(p, 0xe77a, value);
+
+	return 0;
+}
+
+static int max96772_prepare(struct max96772_panel *p)
+{
+	const struct drm_display_mode *mode = &p->mode;
+	u32 hfp, hsa, hbp, hact;
+	u32 vact, vsa, vfp, vbp;
+	u64 hwords, mvid;
+	bool hsync_pol, vsync_pol;
+
+	if (p->panel_dual_link) {
+		maxim_deserializer_write(p, 0x0010, 0x00);
+	}
+
+	maxim_deserializer_write(p, 0xe790, p->link_rate);
+	maxim_deserializer_write(p, 0xe792, p->lane_count);
+
+	if (p->ssc) {
+		maxim_deserializer_write(p, 0xe7b0, 0x01);
+		maxim_deserializer_write(p, 0xe7b1, 0x10);
+	} else {
+		maxim_deserializer_write(p, 0xe7b1, 0x00);
+	}
+
+	dev_info(p->dev, "link_rate=0x%02x, lane_count=0x%02x, ssc=%d\n",
+		 p->link_rate, p->lane_count, p->ssc);
+
+	switch (p->link_rate) {
+	case DP_LINK_BW_5_4:
+		regmap_multi_reg_write(p->regmap.deserializer, max96772_clk_ref[2],
+				       ARRAY_SIZE(max96772_clk_ref[2]));
+		break;
+	case DP_LINK_BW_2_7:
+		regmap_multi_reg_write(p->regmap.deserializer, max96772_clk_ref[1],
+				       ARRAY_SIZE(max96772_clk_ref[1]));
+		break;
+	case DP_LINK_BW_1_62:
+	default:
+		regmap_multi_reg_write(p->regmap.deserializer, max96772_clk_ref[0],
+				       ARRAY_SIZE(max96772_clk_ref[0]));
+		break;
+	}
+
+	vact = mode->vdisplay;
+	vsa = mode->vsync_end - mode->vsync_start;
+	vfp = mode->vsync_start - mode->vdisplay;
+	vbp = mode->vtotal - mode->vsync_end;
+	hact = mode->hdisplay;
+	hsa = mode->hsync_end - mode->hsync_start;
+	hfp = mode->hsync_start - mode->hdisplay;
+	hbp = mode->htotal - mode->hsync_end;
+
+	maxim_deserializer_write(p, 0xe794, hact & 0xff);
+	maxim_deserializer_write(p, 0xe795, (hact >> 8) & 0xff);
+	maxim_deserializer_write(p, 0xe796, hfp & 0xff);
+	maxim_deserializer_write(p, 0xe797, (hfp >> 8) & 0xff);
+	maxim_deserializer_write(p, 0xe798, hsa & 0xff);
+	maxim_deserializer_write(p, 0xe799, (hsa >> 8) & 0xff);
+	maxim_deserializer_write(p, 0xe79a, hbp & 0xff);
+	maxim_deserializer_write(p, 0xe79b, (hbp >> 8) & 0xff);
+	maxim_deserializer_write(p, 0xe79c, vact & 0xff);
+	maxim_deserializer_write(p, 0xe79d, (vact >> 8) & 0xff);
+	maxim_deserializer_write(p, 0xe79e, vfp & 0xff);
+	maxim_deserializer_write(p, 0xe79f, (vfp >> 8) & 0xff);
+	maxim_deserializer_write(p, 0xe7a0, vsa & 0xff);
+	maxim_deserializer_write(p, 0xe7a1, (vsa >> 8) & 0xff);
+	maxim_deserializer_write(p, 0xe7a2, vbp & 0xff);
+	maxim_deserializer_write(p, 0xe7a3, (vbp >> 8) & 0xff);
+
+	hsync_pol = !!(mode->flags & DRM_MODE_FLAG_NHSYNC);
+	vsync_pol = !!(mode->flags & DRM_MODE_FLAG_NVSYNC);
+	maxim_deserializer_write(p, 0xe7ac, hsync_pol | (vsync_pol << 1));
+
+	/* NVID should always be set to 0x8000 */
+	maxim_deserializer_write(p, 0xe7a8, 0);
+	maxim_deserializer_write(p, 0xe7a9, 0x80);
+
+	/* HWORDS = ((HRES x bits / pixel) / 16) - LANE_COUNT */
+	hwords = DIV_ROUND_CLOSEST_ULL(hact * 24, 16) - p->lane_count;
+	maxim_deserializer_write(p, 0xe7a4, hwords);
+	maxim_deserializer_write(p, 0xe7a5, hwords >> 8);
+
+	/* MVID = (PCLK x NVID) x 10 / Link Rate */
+	mvid = DIV_ROUND_CLOSEST_ULL((u64)mode->clock * 32768,
+				     drm_dp_bw_code_to_link_rate(p->link_rate));
+	maxim_deserializer_write(p, 0xe7a6, mvid & 0xff);
+	maxim_deserializer_write(p, 0xe7a7, (mvid >> 8) & 0xff);
+
+	maxim_deserializer_write(p, 0xe7aa, 0x40);
+	maxim_deserializer_write(p, 0xe7ab, 0x00);
+
+	/* set AUD_TX_EN = 0 */
+	maxim_deserializer_write(p, 0x02, 0xf3);
+	/* set AUD_EN_RX = 0 */
+	maxim_deserializer_write(p, 0x158, 0x20);
+	/* set MFP2 GPIO_TX_EN */
+	maxim_deserializer_write(p, 0x2b6, 0x03);
+
+	return 0;
+}
+
+static int max96776_enable(struct max96772_panel *p)
+{
+	u32 status[2];
+	u32 val;
+	int ret;
+
+	/* Run link training */
+	maxim_deserializer_write(p, 0xe776, 0x02);
+	maxim_deserializer_write(p, 0xe777, 0x80);
+
+	ret = regmap_read_poll_timeout(p->regmap.deserializer, 0x07f0, val,
+				       val & 0x01, MSEC_PER_SEC,
+				       500 * MSEC_PER_SEC);
+	if (!ret)
+		return 0;
+
+	ret = max96772_aux_dpcd_read(p, DP_LANE0_1_STATUS, &status[0]);
+	if (ret)
+		return ret;
+
+	ret = max96772_aux_dpcd_read(p, DP_LANE2_3_STATUS, &status[1]);
+	if (ret)
+		return ret;
+
+	dev_err(p->dev, "Link Training failed: LANE0_1_STATUS=0x%02x, LANE2_3_STATUS=0x%02x\n",
+		status[0], status[1]);
+
+	return 0;
+}
+
+static inline struct max96772_panel *to_max96772_panel(struct drm_panel *panel)
+{
+	return container_of(panel, struct max96772_panel, panel);
+}
+
+static int max96772_panel_prepare(struct drm_panel *panel)
+{
+	struct max96772_panel *p = to_max96772_panel(panel);
+
+	pinctrl_pm_select_default_state(p->dev);
+
+	if (p->desc->prepare)
+		p->desc->prepare(p);
+
+	if (!p->desc->link_rate || !p->desc->lane_count) {
+		u32 dpcd;
+		int ret;
+
+		ret = max96772_aux_dpcd_read(p, DP_MAX_LANE_COUNT, &dpcd);
+		if (ret) {
+			dev_err(p->dev, "failed to read max lane count\n");
+			return ret;
+		}
+
+		p->lane_count = min_t(int, 4, dpcd & DP_MAX_LANE_COUNT_MASK);
+
+		ret = max96772_aux_dpcd_read(p, DP_MAX_LINK_RATE, &dpcd);
+		if (ret) {
+			dev_err(p->dev, "failed to read max link rate\n");
+			return ret;
+		}
+
+		p->link_rate = min_t(int, dpcd, DP_LINK_BW_5_4);
+
+		ret = max96772_aux_dpcd_read(p, DP_MAX_DOWNSPREAD, &dpcd);
+		if (ret) {
+			dev_err(p->dev, "failed to read max downspread\n");
+			return ret;
+		}
+
+		p->ssc = !!(dpcd & DP_MAX_DOWNSPREAD_0_5);
+	} else {
+		p->link_rate = p->desc->link_rate;
+		p->lane_count = p->desc->lane_count;
+		p->ssc = p->desc->ssc;
+	}
+
+	return max96772_prepare(p);
+}
+
+static int max96772_panel_unprepare(struct drm_panel *panel)
+{
+	struct max96772_panel *p = to_max96772_panel(panel);
+
+	if (p->desc->unprepare)
+		p->desc->unprepare(p);
+
+	pinctrl_pm_select_sleep_state(p->dev);
+
+	return 0;
+}
+
+static int max96772_panel_enable(struct drm_panel *panel)
+{
+	struct max96772_panel *p = to_max96772_panel(panel);
+
+	max96776_enable(p);
+
+	if (p->desc->enable)
+		p->desc->enable(p);
+
+	backlight_enable(p->backlight);
+
+	if (p->desc->backlight_enable)
+		p->desc->backlight_enable(p);
+
+	return 0;
+}
+
+static int max96772_panel_disable(struct drm_panel *panel)
+{
+	struct max96772_panel *p = to_max96772_panel(panel);
+
+	if (p->desc->backlight_disable)
+		p->desc->backlight_disable(p);
+
+	backlight_disable(p->backlight);
+
+	if (p->desc->disable)
+		p->desc->disable(p);
+
+	return 0;
+}
+
+static int max96772_panel_get_modes(struct drm_panel *panel,
+				    struct drm_connector *connector)
+{
+	struct max96772_panel *p = to_max96772_panel(panel);
+	struct drm_display_mode *mode;
+	u32 bus_format = MEDIA_BUS_FMT_RGB888_1X24;
+
+	connector->display_info.width_mm = p->desc->width_mm;
+	connector->display_info.height_mm = p->desc->height_mm;
+	drm_display_info_set_bus_formats(&connector->display_info, &bus_format, 1);
+
+	mode = drm_mode_duplicate(connector->dev, &p->mode);
+	mode->width_mm = p->desc->width_mm;
+	mode->height_mm = p->desc->height_mm;
+	mode->type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED;
+
+	drm_mode_set_name(mode);
+	drm_mode_probed_add(connector, mode);
+
+	return 1;
+}
+
+static const struct drm_panel_funcs max96772_panel_funcs = {
+	.prepare = max96772_panel_prepare,
+	.unprepare = max96772_panel_unprepare,
+	.enable = max96772_panel_enable,
+	.disable = max96772_panel_disable,
+	.get_modes = max96772_panel_get_modes,
+};
+
+static int max96772_panel_parse_dt(struct max96772_panel *p)
+{
+	struct device *dev = p->dev;
+	struct display_timing dt;
+	struct videomode vm;
+	int ret;
+
+	ret = of_get_display_timing(dev->of_node, "panel-timing", &dt);
+	if (ret < 0) {
+		dev_err(dev, "%pOF: no panel-timing node found\n", dev->of_node);
+		return ret;
+	}
+
+	videomode_from_timing(&dt, &vm);
+	drm_display_mode_from_videomode(&vm, &p->mode);
+	p->panel_dual_link = of_property_read_bool(dev->of_node, "panel_dual_link");
+
+	return 0;
+}
+
+static const struct regmap_range max96772_readable_ranges[] = {
+	regmap_reg_range(0x0000, 0x0800),
+	regmap_reg_range(0x1700, 0x1700),
+	regmap_reg_range(0x4100, 0x4100),
+	regmap_reg_range(0x6230, 0x6230),
+	regmap_reg_range(0xe75e, 0xe75e),
+	regmap_reg_range(0xe776, 0xe7bf),
+};
+
+static const struct regmap_access_table max96772_readable_table = {
+	.yes_ranges = max96772_readable_ranges,
+	.n_yes_ranges = ARRAY_SIZE(max96772_readable_ranges),
+};
+
+static const struct regmap_config max96772_regmap_config = {
+	.name = "max96772",
+	.reg_bits = 16,
+	.val_bits = 8,
+	.max_register = 0xffff,
+	.rd_table = &max96772_readable_table,
+};
+
+static int max96772_panel_probe(struct i2c_client *client)
+{
+	struct device *dev = &client->dev;
+	struct max96772_panel *p;
+	struct i2c_client *parent;
+	int ret;
+
+	p = devm_kzalloc(dev, sizeof(*p), GFP_KERNEL);
+	if (!p)
+		return -ENOMEM;
+
+	p->dev = dev;
+	p->desc = of_device_get_match_data(dev);
+	i2c_set_clientdata(client, p);
+
+	ret = max96772_panel_parse_dt(p);
+	if (ret)
+		return dev_err_probe(dev, ret, "failed to parse DT\n");
+
+	p->backlight = devm_of_find_backlight(dev);
+	if (IS_ERR(p->backlight))
+		return dev_err_probe(dev, PTR_ERR(p->backlight),
+				     "failed to get backlight\n");
+
+	p->regmap.deserializer =
+		devm_regmap_init_i2c(client, &max96772_regmap_config);
+	if (IS_ERR(p->regmap.deserializer))
+		return dev_err_probe(dev, PTR_ERR(p->regmap.deserializer),
+				     "failed to initialize deserializer regmap\n");
+
+	parent = of_find_i2c_device_by_node(dev->of_node->parent->parent);
+	if (!parent)
+		return dev_err_probe(dev, -ENODEV, "failed to find parent\n");
+
+	p->regmap.serializer = dev_get_regmap(&parent->dev, NULL);
+	if (!p->regmap.serializer)
+		return dev_err_probe(dev, -ENODEV,
+				     "failed to initialize serializer regmap\n");
+
+	drm_panel_init(&p->panel, dev, &max96772_panel_funcs,
+		       DRM_MODE_CONNECTOR_eDP);
+	drm_panel_add(&p->panel);
+
+	return 0;
+}
+
+static int max96772_panel_remove(struct i2c_client *client)
+{
+	struct max96772_panel *p = i2c_get_clientdata(client);
+
+	drm_panel_remove(&p->panel);
+
+	return 0;
+}
+
+static int boe_ae146m1t_l10_prepare(struct max96772_panel *p)
+{
+	return 0;
+}
+
+static int boe_ae146m1t_l10_unprepare(struct max96772_panel *p)
+{
+	return 0;
+}
+
+
+static const struct panel_desc boe_ae146m1t_l10 = {
+	.name = "boe,ae146mit0-l10",
+	.width_mm = 323,
+	.height_mm = 182,
+	.link_rate = DP_LINK_BW_2_7,
+	.lane_count = 4,
+	.ssc = 0,
+	.prepare = boe_ae146m1t_l10_prepare,
+	.unprepare = boe_ae146m1t_l10_unprepare,
+
+};
+
+static const struct of_device_id max96772_panel_of_match[] = {
+	{ .compatible = "boe,ae146m1t-l10", &boe_ae146m1t_l10 },
+	{ }
+};
+MODULE_DEVICE_TABLE(of, max96772_panel_of_match);
+
+static struct i2c_driver max96772_panel_driver = {
+	.driver = {
+		.name = "max96772-panel",
+		.of_match_table = max96772_panel_of_match,
+	},
+	.probe_new = max96772_panel_probe,
+	.remove = max96772_panel_remove,
+};
+
+module_i2c_driver(max96772_panel_driver);
+
+MODULE_AUTHOR("Wyon Bi <bivvy.bi@rock-chips.com>");
+MODULE_DESCRIPTION("Maxim MAX96772 based panel driver");
+MODULE_LICENSE("GPL");

From 26525c754b78a510ff16324d92289b1efe128bc8 Mon Sep 17 00:00:00 2001
From: Jason Song <sxj@rock-chips.com>
Date: Thu, 13 Jul 2023 16:40:19 +0800
Subject: [PATCH 04/10] drm/bridge: maxim-max96755: support dual link mode.

Signed-off-by: Jason Song <sxj@rock-chips.com>
Change-Id: I130a600be675fb834016d852ecbf1fdd0a81f803
---
 drivers/gpu/drm/bridge/maxim-max96755f.c | 14 ++++++++++++--
 1 file changed, 12 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/bridge/maxim-max96755f.c b/drivers/gpu/drm/bridge/maxim-max96755f.c
index bfabb61c166a..95dcd52c0900 100644
--- a/drivers/gpu/drm/bridge/maxim-max96755f.c
+++ b/drivers/gpu/drm/bridge/maxim-max96755f.c
@@ -41,6 +41,7 @@ struct max96755f_bridge {
 	bool dv_swp_ab;
 	bool dpi_deskew_en;
 	bool split_mode;
+	bool bridge_dual_link;
 	u32 dsi_lane_map[4];
 
 	struct {
@@ -283,7 +284,7 @@ static void max96755f_bridge_pre_enable(struct drm_bridge *bridge)
 
 static void max96755f_bridge_reset_oneshot(struct max96755f_bridge *ser)
 {
-	regmap_update_bits(ser->regmap, 0x10, RESET_ONESHOT,
+	regmap_update_bits(ser->regmap, 0x0010, RESET_ONESHOT,
 			   FIELD_PREP(RESET_ONESHOT, 1));
 
 	mdelay(100);
@@ -324,6 +325,12 @@ static void max96755f_bridge_enable(struct drm_bridge *bridge)
 				   FIELD_PREP(START_PORTAY, 1));
 		regmap_update_bits(ser->regmap, 0x02, VID_TX_EN_X,
 				   FIELD_PREP(VID_TX_EN_X, 1));
+		if (ser->bridge_dual_link) {
+			regmap_update_bits(ser->regmap, 0x0010,
+				   AUTO_LINK | LINK_CFG,
+				   FIELD_PREP(AUTO_LINK, 0) |
+				   FIELD_PREP(LINK_CFG, DUAL_LINK));
+		}
 	}
 
 	max96755f_bridge_reset_oneshot(ser);
@@ -358,7 +365,7 @@ static void max96755f_bridge_disable(struct drm_bridge *bridge)
 			   FIELD_PREP(VID_TX_EN_X, 0) |
 			   FIELD_PREP(VID_TX_EN_Y, 0));
 
-	if (ser->split_mode)
+	if (ser->split_mode || ser->bridge_dual_link)
 		regmap_update_bits(ser->regmap, 0x0010,
 				   AUTO_LINK | LINK_CFG,
 				   FIELD_PREP(AUTO_LINK, 1) |
@@ -487,6 +494,7 @@ static irqreturn_t max96755f_bridge_lock_irq_handler(int irq, void *arg)
 static int max96755f_bridge_probe(struct platform_device *pdev)
 {
 	struct device *dev = &pdev->dev;
+	struct device_node *np = dev->of_node;
 	struct max96755f_bridge *ser;
 	int ret;
 
@@ -529,6 +537,8 @@ static int max96755f_bridge_probe(struct platform_device *pdev)
 	if (ret)
 		return dev_err_probe(dev, ret, "failed to request lock IRQ\n");
 
+	ser->bridge_dual_link = of_property_read_bool(np, "bridge_dual_link");
+
 	ser->bridge.funcs = &max96755f_bridge_funcs;
 	ser->bridge.of_node = dev->of_node;
 	ser->bridge.ops = DRM_BRIDGE_OP_DETECT;

From 0f9b944358e10d638738e51e315b218829be2c34 Mon Sep 17 00:00:00 2001
From: Jason Song <sxj@rock-chips.com>
Date: Thu, 13 Jul 2023 16:43:23 +0800
Subject: [PATCH 05/10] mfd: max96755f: lock status and link reg need access
 directly.

Signed-off-by: Jason Song <sxj@rock-chips.com>
Change-Id: If1b8866afe9642c33426b1757a72159ec37e2469
---
 drivers/mfd/max96755f.c | 2 --
 1 file changed, 2 deletions(-)

diff --git a/drivers/mfd/max96755f.c b/drivers/mfd/max96755f.c
index db9d3a22320a..04618d477aae 100644
--- a/drivers/mfd/max96755f.c
+++ b/drivers/mfd/max96755f.c
@@ -48,8 +48,6 @@ static bool max96755f_volatile_reg(struct device *dev, unsigned int reg)
 {
 	switch (reg) {
 	case 0x0002:
-	case 0x0010:
-	case 0x0013:
 	case 0x0053:
 	case 0x0057:
 	case 0x02be ... 0x02fc:

From e27cb4b2bf0f5c7e8cbaac6075b91ce8554f619c Mon Sep 17 00:00:00 2001
From: Cai YiWei <cyw@rock-chips.com>
Date: Thu, 20 Jul 2023 10:15:59 +0800
Subject: [PATCH 06/10] media: rockchip: isp: fix repeated reporting statistics
 if stats video on/off

Change-Id: Ic0b7d67f0250389b981d79a959c0f081b16a0c25
Signed-off-by: Cai YiWei <cyw@rock-chips.com>
---
 drivers/media/platform/rockchip/isp/isp_stats.c | 1 -
 drivers/media/platform/rockchip/isp/rkisp.c     | 1 +
 2 files changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/media/platform/rockchip/isp/isp_stats.c b/drivers/media/platform/rockchip/isp/isp_stats.c
index 372e4d5bfb2d..d95315ee6d6d 100644
--- a/drivers/media/platform/rockchip/isp/isp_stats.c
+++ b/drivers/media/platform/rockchip/isp/isp_stats.c
@@ -222,7 +222,6 @@ rkisp_stats_vb2_start_streaming(struct vb2_queue *queue,
 {
 	struct rkisp_isp_stats_vdev *stats_vdev = queue->drv_priv;
 
-	stats_vdev->rdbk_drop = false;
 	stats_vdev->cur_buf = NULL;
 	stats_vdev->ops->rdbk_enable(stats_vdev, false);
 	stats_vdev->streamon = true;
diff --git a/drivers/media/platform/rockchip/isp/rkisp.c b/drivers/media/platform/rockchip/isp/rkisp.c
index 417875ee6669..d40d14243e7d 100644
--- a/drivers/media/platform/rockchip/isp/rkisp.c
+++ b/drivers/media/platform/rockchip/isp/rkisp.c
@@ -2110,6 +2110,7 @@ end:
 	dev->irq_ends_mask = 0;
 	dev->hdr.op_mode = 0;
 	dev->sw_rd_cnt = 0;
+	dev->stats_vdev.rdbk_drop = false;
 	rkisp_set_state(&dev->isp_state, ISP_STOP);
 
 	if (dev->isp_ver >= ISP_V20)

From ec02244c4399f482574d816fd450bedb17f4f969 Mon Sep 17 00:00:00 2001
From: Jason Song <sxj@rock-chips.com>
Date: Wed, 19 Jul 2023 12:43:32 +0800
Subject: [PATCH 07/10] arm64: dts: rockchip: vehicle-s66: support iam20680.

Signed-off-by: Jason Song <sxj@rock-chips.com>
Change-Id: If5d343a720121ba6e441ea14a433a24ef8b793ec
---
 .../dts/rockchip/rk3588-vehicle-s66-v10.dtsi  | 21 ++++++++++++++++++-
 1 file changed, 20 insertions(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/rockchip/rk3588-vehicle-s66-v10.dtsi b/arch/arm64/boot/dts/rockchip/rk3588-vehicle-s66-v10.dtsi
index 0346f3c9f9ba..5080e20b8c44 100644
--- a/arch/arm64/boot/dts/rockchip/rk3588-vehicle-s66-v10.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3588-vehicle-s66-v10.dtsi
@@ -97,7 +97,26 @@
 
 &i2c3 {
 	status = "okay";
-	//todo, add gyro IAM20680
+
+	iam20680_acc: acc@69 {
+		compatible = "iam20680_acc";
+		reg = <0x69>;
+		irq-gpio = <&gpio1 RK_PC2 IRQ_TYPE_LEVEL_LOW>;
+		irq_enable = <1>;
+		poll_delay_ms = <30>;
+		type = <SENSOR_TYPE_ACCEL>;
+		layout = <1>;
+	};
+
+	iam20680_gyro: gyro@69 {
+		compatible = "iam20680_gyro";
+		reg = <0x69>;
+		irq_enable = <0>;
+		poll_delay_ms = <30>;
+		type = <SENSOR_TYPE_GYROSCOPE>;
+		layout = <1>;
+	};
+
 	//todo, add mfi
 };
 

From ebdfd241b5cfe49830bd54bbd88bd3031245278e Mon Sep 17 00:00:00 2001
From: Jason Song <sxj@rock-chips.com>
Date: Wed, 19 Jul 2023 12:35:13 +0800
Subject: [PATCH 08/10] input: sensor: accel/gyro sensor: support iam20680.

Signed-off-by: Jason Song <sxj@rock-chips.com>
Change-Id: Iec153c5f151d887f8810d54e5ae4c9fbef8a3c57
---
 drivers/input/sensors/accel/Kconfig        |   7 +
 drivers/input/sensors/accel/Makefile       |   1 +
 drivers/input/sensors/accel/iam20680_acc.c | 239 +++++++++++++++++++++
 drivers/input/sensors/gyro/Kconfig         |   7 +
 drivers/input/sensors/gyro/Makefile        |   1 +
 drivers/input/sensors/gyro/iam20680_gyro.c | 206 ++++++++++++++++++
 include/linux/iam20680.h                   | 238 ++++++++++++++++++++
 include/linux/sensor-dev.h                 |   2 +
 8 files changed, 701 insertions(+)
 create mode 100644 drivers/input/sensors/accel/iam20680_acc.c
 create mode 100644 drivers/input/sensors/gyro/iam20680_gyro.c
 create mode 100644 include/linux/iam20680.h

diff --git a/drivers/input/sensors/accel/Kconfig b/drivers/input/sensors/accel/Kconfig
index 790127d9e284..4576b8ccdb69 100644
--- a/drivers/input/sensors/accel/Kconfig
+++ b/drivers/input/sensors/accel/Kconfig
@@ -158,4 +158,11 @@ config ICM2060X_ACC
 	  To have support for your specific gsesnor you will have to
 	  select the proper drivers which depend on this option.
 
+config IAM20680_ACC
+	tristate "gsensor iam20680"
+	default n
+	help
+	  To have support for your specific gsesnor you will have to
+	  select the proper drivers which depend on this option.
+
 endif
diff --git a/drivers/input/sensors/accel/Makefile b/drivers/input/sensors/accel/Makefile
index 687d23d34554..96f6cc6ee8e9 100644
--- a/drivers/input/sensors/accel/Makefile
+++ b/drivers/input/sensors/accel/Makefile
@@ -22,3 +22,4 @@ obj-$(CONFIG_GS_DA223)		+= da223.o
 obj-$(CONFIG_GS_DA228E)		+= da228e/
 obj-$(CONFIG_ICM2060X_ACC)	+= icm2060x_acc.o
 da223-y	:= da223_cust.o da223_core.o
+obj-$(CONFIG_IAM20680_ACC)	+= iam20680_acc.o
diff --git a/drivers/input/sensors/accel/iam20680_acc.c b/drivers/input/sensors/accel/iam20680_acc.c
new file mode 100644
index 000000000000..25e3a78f3c7b
--- /dev/null
+++ b/drivers/input/sensors/accel/iam20680_acc.c
@@ -0,0 +1,239 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * accel driver for iam20680
+ *
+ * Copyright (c) 2021 Rockchip Electronics Co., Ltd.
+ *
+ * Author: sxj <sxj@rock-chips.com>
+ *
+ */
+#include <linux/interrupt.h>
+#include <linux/i2c.h>
+#include <linux/slab.h>
+#include <linux/irq.h>
+#include <linux/miscdevice.h>
+#include <linux/gpio.h>
+#include <linux/uaccess.h>
+#include <linux/atomic.h>
+#include <linux/delay.h>
+#include <linux/input.h>
+#include <linux/workqueue.h>
+#include <linux/freezer.h>
+#include <linux/of_gpio.h>
+#ifdef CONFIG_HAS_EARLYSUSPEND
+#include <linux/earlysuspend.h>
+#endif
+#include <linux/sensor-dev.h>
+#include <linux/iam20680.h>
+
+static int iam20680_set_rate(struct i2c_client *client, int rate)
+{
+	/* always use poll mode, no need to set rate */
+	return 0;
+}
+
+static int sensor_active(struct i2c_client *client, int enable, int rate)
+{
+	struct sensor_private_data *sensor =
+	    (struct sensor_private_data *) i2c_get_clientdata(client);
+	int result = 0;
+	int status = 0;
+	u8 pwrm1 = 0;
+
+	sensor->ops->ctrl_data = sensor_read_reg(client, sensor->ops->ctrl_reg);
+	pwrm1 = sensor_read_reg(client, IAM20680_PWR_MGMT_1);
+
+	if (!enable) {
+		status = BIT_ACCEL_STBY;
+		sensor->ops->ctrl_data |= status;
+		if ((sensor->ops->ctrl_data &  BIT_GYRO_STBY) == BIT_GYRO_STBY)
+			pwrm1 |= IAM20680_PWRM1_SLEEP;
+	} else {
+		status = ~BIT_ACCEL_STBY;
+		sensor->ops->ctrl_data &= status;
+		pwrm1 &= ~IAM20680_PWRM1_SLEEP;
+
+		iam20680_set_rate(client, rate);
+	}
+	result = sensor_write_reg(client, sensor->ops->ctrl_reg, sensor->ops->ctrl_data);
+	if (result) {
+		dev_err(&client->dev, "%s:fail to set pwrm2\n", __func__);
+		return -1;
+	}
+	msleep(20);
+
+	result = sensor_write_reg(client, IAM20680_PWR_MGMT_1, pwrm1);
+	if (result) {
+		dev_err(&client->dev, "%s:fail to set pwrm1\n", __func__);
+		return -1;
+	}
+	msleep(50);
+
+	return result;
+}
+
+static int sensor_init(struct i2c_client *client)
+{
+	int res = 0;
+	struct sensor_private_data *sensor =
+	    (struct sensor_private_data *) i2c_get_clientdata(client);
+
+	res = sensor_write_reg(client, IAM20680_PWR_MGMT_1, 0x80);
+	if (res) {
+		dev_err(&client->dev, "set IAM20680_PWR_MGMT_1 error,res: %d!\n", res);
+		return res;
+	}
+	msleep(40);
+
+	res = sensor_write_reg(client, IAM20680_GYRO_CONFIG, 0x18);
+	if (res) {
+		dev_err(&client->dev, "set IAM20680_GYRO_CONFIG error,res: %d!\n", res);
+		return res;
+	}
+	msleep(10);
+
+	res = sensor_write_reg(client, IAM20680_ACCEL_CONFIG, 0x00);
+	if (res) {
+		dev_err(&client->dev, "set IAM20680_ACCEL_CONFIG error,res: %d!\n", res);
+		return res;
+	}
+	msleep(10);
+
+	res = sensor_write_reg(client, IAM20680_ACCEL_CONFIG2, 0x00);
+	if (res) {
+		dev_err(&client->dev, "set IAM20680_ACCEL_CONFIG2 error,res: %d!\n", res);
+		return res;
+	}
+	res = sensor_write_reg(client, IAM20680_PWR_MGMT_2, 0x3F);
+	if (res) {
+		dev_err(&client->dev, "set IAM20680_PWR_MGMT_2 error,res: %d!\n", res);
+		return res;
+	}
+	msleep(10);
+	res = sensor_write_reg(client, IAM20680_PWR_MGMT_1, 0x41);
+	if (res) {
+		dev_err(&client->dev, "set IAM20680_PWR_MGMT_1 error,res: %d!\n", res);
+		return res;
+	}
+	msleep(10);
+
+	res = sensor->ops->active(client, 0, sensor->pdata->poll_delay_ms);
+	if (res) {
+		dev_err(&client->dev, "%s:line=%d,error\n", __func__, __LINE__);
+		return res;
+	}
+	return res;
+}
+
+static int gsensor_report_value(struct i2c_client *client, struct sensor_axis *axis)
+{
+	struct sensor_private_data *sensor =
+	    (struct sensor_private_data *) i2c_get_clientdata(client);
+
+	if (sensor->status_cur == SENSOR_ON) {
+		/* Report acceleration sensor information */
+		input_report_abs(sensor->input_dev, ABS_X, axis->x);
+		input_report_abs(sensor->input_dev, ABS_Y, axis->y);
+		input_report_abs(sensor->input_dev, ABS_Z, axis->z);
+		input_sync(sensor->input_dev);
+	}
+
+	return 0;
+}
+
+static int sensor_report_value(struct i2c_client *client)
+{
+	struct sensor_private_data *sensor =
+		(struct sensor_private_data *) i2c_get_clientdata(client);
+	struct sensor_platform_data *pdata = sensor->pdata;
+	int ret = 0;
+	short x, y, z;
+	struct sensor_axis axis;
+	u8 buffer[6] = {0};
+
+	if (sensor->ops->read_len < 6) {
+		dev_err(&client->dev, "%s: length is error, len=%d\n",
+				__func__, sensor->ops->read_len);
+		return -1;
+	}
+
+	memset(buffer, 0, 6);
+
+	/* Data bytes from hardware xL, xH, yL, yH, zL, zH */
+	do {
+		*buffer = sensor->ops->read_reg;
+		ret = sensor_rx_data(client, buffer, sensor->ops->read_len);
+		if (ret < 0)
+			return ret;
+	} while (0);
+
+	x = ((buffer[0] << 8) & 0xff00) + (buffer[1] & 0xFF);
+	y = ((buffer[2] << 8) & 0xff00) + (buffer[3] & 0xFF);
+	z = ((buffer[4] << 8) & 0xff00) + (buffer[5] & 0xFF);
+
+	axis.x = (pdata->orientation[0]) * x + (pdata->orientation[1]) * y + (pdata->orientation[2]) * z;
+	axis.y = (pdata->orientation[3]) * x + (pdata->orientation[4]) * y + (pdata->orientation[5]) * z;
+	axis.z = (pdata->orientation[6]) * x + (pdata->orientation[7]) * y + (pdata->orientation[8]) * z;
+
+	gsensor_report_value(client, &axis);
+
+	mutex_lock(&(sensor->data_mutex));
+	sensor->axis = axis;
+	mutex_unlock(&(sensor->data_mutex));
+
+	return ret;
+}
+
+static struct sensor_operate gsensor_iam20680_ops = {
+	.name				= "iam20680_acc",
+	.type				= SENSOR_TYPE_ACCEL,
+	.id_i2c				= ACCEL_ID_IAM20680,
+	.read_reg			= IAM20680_ACCEL_XOUT_H,
+	.read_len			= 6,
+	.id_reg				= IAM20680_WHOAMI,
+	.id_data			= IAM20680_DEVICE_ID,
+	.precision			= IAM20680_PRECISION,
+	.ctrl_reg			= IAM20680_PWR_MGMT_2,
+	.int_status_reg		= IAM20680_INT_STATUS,
+	.range				= {-32768, 32768},
+	.trig				= IRQF_TRIGGER_HIGH | IRQF_ONESHOT,
+	.active				= sensor_active,
+	.init				= sensor_init,
+	.report				= sensor_report_value,
+};
+
+/****************operate according to sensor chip:end************/
+static int gsensor_iam20680_probe(struct i2c_client *client,
+				 const struct i2c_device_id *devid)
+{
+	return sensor_register_device(client, NULL, devid, &gsensor_iam20680_ops);
+}
+
+static int gsensor_iam20680_remove(struct i2c_client *client)
+{
+	return sensor_unregister_device(client, NULL, &gsensor_iam20680_ops);
+}
+
+static const struct i2c_device_id gsensor_iam20680_id[] = {
+	{"iam20680_acc", ACCEL_ID_IAM20680},
+	{}
+};
+
+static struct i2c_driver gsensor_iam20680_driver = {
+	.probe = gsensor_iam20680_probe,
+	.remove = gsensor_iam20680_remove,
+	.shutdown = sensor_shutdown,
+	.id_table = gsensor_iam20680_id,
+	.driver = {
+		.name = "gsensor_iam20680",
+#ifdef CONFIG_PM
+		.pm = &sensor_pm_ops,
+#endif
+	},
+};
+
+module_i2c_driver(gsensor_iam20680_driver);
+
+MODULE_AUTHOR("sxj <sxj@rock-chips.com>");
+MODULE_DESCRIPTION("iam20680_acc 3-Axis accelerometer driver");
+MODULE_LICENSE("GPL");
diff --git a/drivers/input/sensors/gyro/Kconfig b/drivers/input/sensors/gyro/Kconfig
index fb721d4cb30d..5b27389831ee 100644
--- a/drivers/input/sensors/gyro/Kconfig
+++ b/drivers/input/sensors/gyro/Kconfig
@@ -39,4 +39,11 @@ config GYRO_LSM330
 
 config GYRO_ICM2060X
 	tristate "gyroscope icm2060x_gyro"
+
+config GYRO_IAM20680
+	tristate "gyroscope iam20680_gyro"
+	default n
+	help
+	  To have support for your specific gyroscope you will have to
+	  select the proper drivers which depend on this option.
 endif
diff --git a/drivers/input/sensors/gyro/Makefile b/drivers/input/sensors/gyro/Makefile
index 0943257a11de..8c0a42734c65 100644
--- a/drivers/input/sensors/gyro/Makefile
+++ b/drivers/input/sensors/gyro/Makefile
@@ -9,3 +9,4 @@ obj-$(CONFIG_GYRO_MPU6500)    += mpu6500_gyro.o
 obj-$(CONFIG_GYRO_MPU6880)    += mpu6880_gyro.o
 obj-$(CONFIG_GYRO_LSM330)   += lsm330_gyro.o
 obj-$(CONFIG_GYRO_ICM2060X) += icm2060x_gyro.o
+obj-$(CONFIG_GYRO_IAM20680) += iam20680_gyro.o
diff --git a/drivers/input/sensors/gyro/iam20680_gyro.c b/drivers/input/sensors/gyro/iam20680_gyro.c
new file mode 100644
index 000000000000..6e05ea8955fa
--- /dev/null
+++ b/drivers/input/sensors/gyro/iam20680_gyro.c
@@ -0,0 +1,206 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * gyroscope driver for iam20680
+ *
+ * Copyright (c) 2021 Rockchip Electronics Co., Ltd.
+ *
+ * Author: sxj <sxj@rock-chips.com>
+ *
+ */
+#include <linux/interrupt.h>
+#include <linux/i2c.h>
+#include <linux/slab.h>
+#include <linux/irq.h>
+#include <linux/miscdevice.h>
+#include <linux/gpio.h>
+#include <linux/uaccess.h>
+#include <linux/atomic.h>
+#include <linux/delay.h>
+#include <linux/input.h>
+#include <linux/workqueue.h>
+#include <linux/freezer.h>
+#include <linux/of_gpio.h>
+#ifdef CONFIG_HAS_EARLYSUSPEND
+#include <linux/earlysuspend.h>
+#endif
+#include <linux/sensor-dev.h>
+#include <linux/iam20680.h>
+
+static int sensor_active(struct i2c_client *client, int enable, int rate)
+{
+	struct sensor_private_data *sensor =
+	    (struct sensor_private_data *) i2c_get_clientdata(client);
+	int result = 0;
+	int status = 0;
+	u8 pwrm1 = 0;
+
+	sensor->ops->ctrl_data = sensor_read_reg(client, sensor->ops->ctrl_reg);
+	pwrm1 = sensor_read_reg(client, IAM20680_PWR_MGMT_1);
+
+	if (!enable) {
+		status = BIT_GYRO_STBY;
+		sensor->ops->ctrl_data |= status;
+		if ((sensor->ops->ctrl_data & BIT_ACCEL_STBY) == BIT_ACCEL_STBY)
+			pwrm1 |= IAM20680_PWRM1_SLEEP;
+	} else {
+		status = ~BIT_GYRO_STBY;
+		sensor->ops->ctrl_data &= status;
+		pwrm1 &= ~IAM20680_PWRM1_SLEEP;
+	}
+
+	result = sensor_write_reg(client, sensor->ops->ctrl_reg, sensor->ops->ctrl_data);
+	if (result) {
+		dev_err(&client->dev, "%s:fail to active sensor\n", __func__);
+		return -1;
+	}
+	msleep(20);
+
+	result = sensor_write_reg(client, IAM20680_PWR_MGMT_1, pwrm1);
+	if (result) {
+		dev_err(&client->dev, "%s:fail to set pwrm1\n", __func__);
+		return -1;
+	}
+	msleep(50);
+
+	return result;
+}
+
+static int sensor_init(struct i2c_client *client)
+{
+	int ret;
+	struct sensor_private_data *sensor =
+	    (struct sensor_private_data *) i2c_get_clientdata(client);
+
+	/* init on iam20680_acc.c */
+	ret = sensor->ops->active(client, 0, sensor->pdata->poll_delay_ms);
+	if (ret) {
+		dev_err(&client->dev, "%s:line=%d,error\n", __func__, __LINE__);
+		return ret;
+	}
+
+	return ret;
+}
+
+static int gyro_report_value(struct i2c_client *client, struct sensor_axis *axis)
+{
+	struct sensor_private_data *sensor =
+	    (struct sensor_private_data *) i2c_get_clientdata(client);
+
+	if (sensor->status_cur == SENSOR_ON) {
+		/* Report gyro sensor information */
+		input_report_rel(sensor->input_dev, ABS_RX, axis->x);
+		input_report_rel(sensor->input_dev, ABS_RY, axis->y);
+		input_report_rel(sensor->input_dev, ABS_RZ, axis->z);
+		input_sync(sensor->input_dev);
+	}
+
+	return 0;
+}
+
+static int sensor_report_value(struct i2c_client *client)
+{
+	struct sensor_private_data *sensor =
+		(struct sensor_private_data *) i2c_get_clientdata(client);
+	struct sensor_platform_data *pdata = sensor->pdata;
+	int ret = 0;
+	short x, y, z;
+	struct sensor_axis axis;
+	u8 buffer[6] = {0};
+
+	if (sensor->ops->read_len < 6) {
+		dev_err(&client->dev, "%s: length is error, len=%d\n",
+				__func__, sensor->ops->read_len);
+		return -1;
+	}
+
+	memset(buffer, 0, 6);
+
+	do {
+		*buffer = sensor->ops->read_reg;
+		ret = sensor_rx_data(client, buffer, sensor->ops->read_len);
+		if (ret < 0)
+			return ret;
+	} while (0);
+
+	x = ((buffer[0] << 8) & 0xFF00) + (buffer[1] & 0xFF);
+	y = ((buffer[2] << 8) & 0xFF00) + (buffer[3] & 0xFF);
+	z = ((buffer[4] << 8) & 0xFF00) + (buffer[5] & 0xFF);
+
+	axis.x = (pdata->orientation[0]) * x + (pdata->orientation[1]) * y + (pdata->orientation[2]) * z;
+	axis.y = (pdata->orientation[3]) * x + (pdata->orientation[4]) * y + (pdata->orientation[5]) * z;
+	axis.z = (pdata->orientation[6]) * x + (pdata->orientation[7]) * y + (pdata->orientation[8]) * z;
+
+	gyro_report_value(client, &axis);
+
+	mutex_lock(&(sensor->data_mutex));
+	sensor->axis = axis;
+	mutex_unlock(&(sensor->data_mutex));
+
+	return ret;
+}
+
+static struct sensor_operate gyro_iam20680_ops = {
+	.name				= "iam20680_gyro",
+	.type				= SENSOR_TYPE_GYROSCOPE,
+	.id_i2c				= GYRO_ID_IAM20680,
+	.read_reg			= IAM20680_GYRO_XOUT_H,
+	.read_len			= 6,
+	.id_reg				= IAM20680_WHOAMI,
+	.id_data			= IAM20680_DEVICE_ID,
+	.precision			= IAM20680_PRECISION,
+	.ctrl_reg			= IAM20680_PWR_MGMT_2,
+	.int_status_reg		= IAM20680_INT_STATUS,
+	.range				= {-32768, 32768},
+	.trig				= IRQF_TRIGGER_HIGH | IRQF_ONESHOT,
+	.active				= sensor_active,
+	.init				= sensor_init,
+	.report				= sensor_report_value,
+};
+
+/****************operate according to sensor chip:end************/
+static int gyro_iam20680_probe(struct i2c_client *client,
+				 const struct i2c_device_id *devid)
+{
+	return sensor_register_device(client, NULL, devid, &gyro_iam20680_ops);
+}
+
+static int gyro_iam20680_remove(struct i2c_client *client)
+{
+	return sensor_unregister_device(client, NULL, &gyro_iam20680_ops);
+}
+
+static const struct i2c_device_id gyro_iam20680_id[] = {
+	{"iam20680_gyro", GYRO_ID_IAM20680},
+	{}
+};
+
+static struct i2c_driver gyro_iam20680_driver = {
+	.probe = gyro_iam20680_probe,
+	.remove = gyro_iam20680_remove,
+	.shutdown = sensor_shutdown,
+	.id_table = gyro_iam20680_id,
+	.driver = {
+		.name = "gyro_iam20680",
+	#ifdef CONFIG_PM
+		.pm = &sensor_pm_ops,
+	#endif
+	},
+};
+
+static int __init gyro_iam20680_init(void)
+{
+	return i2c_add_driver(&gyro_iam20680_driver);
+}
+
+static void __exit gyro_iam20680_exit(void)
+{
+	i2c_del_driver(&gyro_iam20680_driver);
+}
+
+/* must register after iam20680_acc */
+device_initcall_sync(gyro_iam20680_init);
+module_exit(gyro_iam20680_exit);
+
+MODULE_AUTHOR("sxj <sxj@rock-chips.com>");
+MODULE_DESCRIPTION("iam20680_gyro 3-Axis Gyroscope driver");
+MODULE_LICENSE("GPL");
diff --git a/include/linux/iam20680.h b/include/linux/iam20680.h
new file mode 100644
index 000000000000..237ff2f7ee09
--- /dev/null
+++ b/include/linux/iam20680.h
@@ -0,0 +1,238 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (c) 2021 Rockchip Electronics Co., Ltd.
+ */
+#ifndef __IAM20680_H
+#define __IAM20680_H
+
+#include <linux/ioctl.h>
+/**add***/
+#define IAM20680_PRECISION		16
+#define IAM20680_RANGE			2000000
+
+#define IAM20680_SMPLRT_DIV		0x19
+#define IAM20680_CONFIG			0x1A
+#define IAM20680_GYRO_CONFIG		0x1B
+#define IAM20680_ACCEL_CONFIG	0x1C
+#define IAM20680_ACCEL_CONFIG2	0x1D
+#define IAM20680_LP_ACCEL_ODR   0x1E
+#define IAM20680_WOM_THRESH	0x1F
+#define IAM20680_FIFO_EN			0x23
+#define IAM20680_INT_PIN_CFG		0x37
+#define IAM20680_INT_ENABLE		0x38
+#define IAM20680_DMP_INT_STATUS	0x39
+#define IAM20680_INT_STATUS		0x3A
+#define IAM20680_ACCEL_XOUT_H	0x3B
+#define IAM20680_TEMP_OUT_H	0x41
+#define IAM20680_GYRO_XOUT_H	0x43
+#define IAM20680_ACCEL_INTEL_CTRL 0x69
+#define IAM20680_USER_CTRL		0x6A
+#define IAM20680_PWR_MGMT_1		0x6B
+#define IAM20680_PWR_MGMT_2		0x6C
+#define IAM20680_PRGM_STRT_ADDRH     0x70
+#define IAM20680_FIFO_COUNTH		0x72
+#define IAM20680_FIFO_R_W		0x74
+#define IAM20680_WHOAMI			0x75
+
+#define IAM20680_DEVICE_ID		0xA9
+/*
+ * IAM20680_CONFIG
+ */
+#define DLPF_CFG_250HZ		0x00
+#define DLPF_CFG_184HZ		0x01
+#define DLPF_CFG_98HZ		0x02
+#define DLPF_CFG_41HZ		0x03
+#define DLPF_CFG_20HZ		0x04
+#define DLPF_CFG_10HZ		0x05
+#define DLPF_CFG_5HZ		0x06
+#define DLPF_CFG_3600HZ		0x07
+#define EXT_SYNC_SET_TEMP	0x08
+#define EXT_SYNC_SET_GYRO_X	0x10
+#define EXT_SYNC_SET_GYRO_Y	0x18
+#define EXT_SYNC_SET_GYRO_Z	0x20
+#define EXT_SYNC_SET_ACCEL_X	0x28
+#define EXT_SYNC_SET_ACCEL_Y	0x30
+#define EXT_SYNC_SET_ACCEL_Z	0x38
+
+
+/*
+ * IAM20680_GYRO_CONFIG
+ */
+#define GFSR_250DPS			(0<<3)
+#define GFSR_500DPS			(1<<3)
+#define GFSR_1000DPS		(2<<3)
+#define GFSR_2000DPS		(3<<3)
+
+/*
+ * IAM20680_ACCEL_CONFIG
+ */
+#define AFSR_2G		(0<<3)
+#define AFSR_4G		(1<<3)
+#define AFSR_8G		(2<<3)
+#define AFSR_16G	(3<<3)
+
+
+/*
+ * IAM20680_ACCEL_CONFIG2
+ */
+#define A_DLPF_CFG_460HZ		0x00
+#define A_DLPF_CFG_184HZ		0x01
+#define A_DLPF_CFG_92HZ		0x02
+#define A_DLPF_CFG_41HZ		0x03
+#define A_DLPF_CFG_20HZ		0x04
+#define A_DLPF_CFG_10HZ		0x05
+#define A_DLPF_CFG_5HZ			0x06
+//#define A_DLPF_CFG_460HZ      0x07
+#define BIT_FIFO_SIZE_1K                 0x40
+#define BIT_ACCEL_FCHOICE_B		0x08
+
+
+/*
+ * IAM20680_LP_ACCEL_ODR
+ */
+#define LPA_CLK_P24HZ	0x0
+#define LPA_CLK_P49HZ	0x1
+#define LPA_CLK_P98HZ	0x2
+#define LPA_CLK_1P95HZ	0x3
+#define LPA_CLK_3P91HZ	0x4
+#define LPA_CLK_7P81HZ	0x5
+#define LPA_CLK_15P63HZ	0x6
+#define LPA_CLK_31P25HZ	0x7
+#define LPA_CLK_62P50HZ	0x8
+#define LPA_CLK_125HZ	0x9
+#define LPA_CLK_250HZ	0xa
+#define LPA_CLK_500HZ	0xb
+
+
+/*
+ * IAM20680_PWR_MGMT_1
+ */
+#define BIT_H_RESET			(1<<7)
+#define BIT_SLEEP			(1<<6)
+#define BIT_CYCLE			(1<<5)
+#define BIT_GYRO_STANDBY	(1<<4)
+#define BIT_PD_PTAT			(1<<3)
+#define BIT_CLKSEL			(1<<0)
+
+#define CLKSEL_INTERNAL		0
+#define CLKSEL_PLL			1
+
+/*
+ * IAM20680_PWR_MGMT_2
+ */
+#define BIT_ACCEL_STBY              0x38
+#define BIT_GYRO_STBY               0x07
+#define BITS_LPA_WAKE_CTRL 0xC0
+#define BITS_LPA_WAKE_1HZ 0x00
+#define BITS_LPA_WAKE_2HZ 0x40
+#define BITS_LPA_WAKE_20HZ 0x80
+
+#define IAM20680_PWRM1_SLEEP				0x40
+#define IAM20680_PWRM1_GYRO_STANDBY		0x10
+#define IAM20680_PWRM2_ACCEL_DISABLE		0x38
+#define IAM20680_PWRM2_GYRO_DISABLE		0x07
+
+/*
+ * IAM20680_ACCEL_INTEL_CTRL
+ */
+#define BIT_ACCEL_INTEL_EN	0x80
+#define BIT_ACCEL_INTEL_MODE	0x40
+
+
+/*
+ * IAM20680_USER_CTRL
+ */
+#define BIT_FIFO_RST                    0x04
+#define BIT_DMP_RST                     0x08
+#define BIT_I2C_MST_EN                  0x20
+#define BIT_FIFO_EN                     0x40
+#define BIT_DMP_EN                      0x80
+
+
+/*
+ * IAM20680_FIFO_EN
+ */
+#define BIT_ACCEL_OUT           0x08
+#define BITS_GYRO_OUT           0x70
+
+
+/*
+ * IAM20680_INT_PIN_CFG
+ */
+#define BIT_BYPASS_EN           0x2
+
+/*
+ * IAM20680_INT_EN/INT_STATUS
+ */
+#define BIT_FIFO_OVERLOW	0x80
+#define BIT_MOT_INT				0x40
+#define BIT_MPU_RDY                 0x04
+#define BIT_DMP_INT                 0x02
+#define BIT_RAW_RDY                 0x01
+
+
+#define DMP_START_ADDR           0x400
+
+
+
+#define AXIS_NUM 3
+#define AXIS_ADC_BYTE 2
+#define SENSOR_PACKET (AXIS_NUM * AXIS_ADC_BYTE)
+
+
+
+
+
+/*
+ * self-test parameter
+ */
+
+#define DEF_ST_PRECISION            1000
+#define DEF_ST_IAM20680_ACCEL_LPF        2
+#define DEF_STABLE_TIME_ST 50
+#define DEF_SELFTEST_GYRO_FS            (0 << 3)
+#define DEF_SELFTEST_ACCEL_FS           (2 << 3)
+#define DEF_SELFTEST_6500_ACCEL_FS      (0 << 3)
+#define DEF_SW_SELFTEST_GYRO_FS	GFSR_2000DPS
+#define DEF_SW_SELFTEST_SENSITIVITY		((2000*DEF_ST_PRECISION)/32768)
+
+#define DEF_SW_SELFTEST_SAMPLE_COUNT 75
+#define DEF_SW_SELFTEST_SAMPLE_TIME 75
+#define DEF_SW_ACCEL_CAL_SAMPLE_TIME 50
+#define DEF_SW_SKIP_COUNT 10
+
+#define DEF_ST_6500_STABLE_TIME         20
+#define BYTES_PER_SENSOR        (6)
+#define DEF_SELFTEST_SAMPLE_RATE             0
+#define DEF_GYRO_WAIT_TIME          50
+#define THREE_AXIS              (3)
+#define INIT_ST_SAMPLES          200
+#define FIFO_COUNT_BYTE         (2)
+#define DEF_ST_TRY_TIMES            2
+#define REG_6500_XG_ST_DATA     0x0
+#define REG_6500_XA_ST_DATA     0xD
+#define BITS_SELF_TEST_EN		0xE0
+
+#define DEF_ST_SCALE                    (1L << 15)
+
+/*---- IAM20680 Self Test Pass/Fail Criteria ----*/
+/* Gyro Offset Max Value (dps) */
+#define DEF_GYRO_OFFSET_MAX             20
+/* Gyro Self Test Absolute Limits ST_AL (dps) */
+#define DEF_GYRO_ST_AL                  60
+/* Accel Self Test Absolute Limits ST_AL (mg) */
+#define DEF_ACCEL_ST_AL_MIN             225
+#define DEF_ACCEL_ST_AL_MAX             675
+#define DEF_6500_ACCEL_ST_SHIFT_DELTA   500
+#define DEF_6500_GYRO_CT_SHIFT_DELTA    500
+#define DEF_ST_IAM20680_ACCEL_LPF        2
+#define DEF_ST_6500_ACCEL_FS_MG         2000UL
+#define DEF_SELFTEST_6500_ACCEL_FS      (0 << 3)
+
+#define DEF_SELFTEST_GYRO_SENS          (32768 / 250)
+
+
+#define  GSENSOR_DEV_PATH    "/dev/mma8452_daemon"
+
+#endif
+
diff --git a/include/linux/sensor-dev.h b/include/linux/sensor-dev.h
index 271e4ee9a217..81d3aa1ea38b 100644
--- a/include/linux/sensor-dev.h
+++ b/include/linux/sensor-dev.h
@@ -69,6 +69,7 @@ enum sensor_id {
 	ACCEL_ID_ICM2060X,
 	ACCEL_ID_DA215S,
 	ACCEL_ID_DA228E,
+	ACCEL_ID_IAM20680,
 	COMPASS_ID_ALL,
 	COMPASS_ID_AK8975,
 	COMPASS_ID_AK8963,
@@ -95,6 +96,7 @@ enum sensor_id {
 	GYRO_ID_MPU6880,
 	GYRO_ID_LSM330,
 	GYRO_ID_ICM2060X,
+	GYRO_ID_IAM20680,
 	LIGHT_ID_ALL,
 	LIGHT_ID_CM3217,
 	LIGHT_ID_CM3218,

From a748a1bd1c21fa5a1878bd31a4440952898f3d97 Mon Sep 17 00:00:00 2001
From: Xu Xuehui <xxh@rock-chips.com>
Date: Mon, 22 May 2023 11:18:14 +0800
Subject: [PATCH 09/10] net: wireless: rockchip_wlan: porting infineon driver.

1. support wifi driver contrl wifi_reg_on.
2. fix pcei state when pcie suspend.
3. fix wifi crash when resume timeout.
4. support WIFI oob fuction.

Change-Id: I5ea8be870cb7c3efac206c2d57d1ac66aca871c7
Signed-off-by: Xu Xuehui <xxh@rock-chips.com>
---
 .../rockchip_wlan/infineon/bcmdhd/Makefile    |   9 +
 .../infineon/bcmdhd/dhd_custom_msm.c          |   2 -
 .../rockchip_wlan/infineon/bcmdhd/dhd_gpio.c  | 437 ++++++++++++++++++
 .../rockchip_wlan/infineon/bcmdhd/dhd_linux.h |  34 +-
 .../infineon/bcmdhd/dhd_linux_platdev.c       |  12 +-
 .../infineon/bcmdhd/dhd_pcie_linux.c          |   8 +-
 .../infineon/bcmdhd/wl_cfgvendor.c            |   2 +
 7 files changed, 477 insertions(+), 27 deletions(-)
 create mode 100644 drivers/net/wireless/rockchip_wlan/infineon/bcmdhd/dhd_gpio.c

diff --git a/drivers/net/wireless/rockchip_wlan/infineon/bcmdhd/Makefile b/drivers/net/wireless/rockchip_wlan/infineon/bcmdhd/Makefile
index be6dc59adafe..7179479e53a8 100644
--- a/drivers/net/wireless/rockchip_wlan/infineon/bcmdhd/Makefile
+++ b/drivers/net/wireless/rockchip_wlan/infineon/bcmdhd/Makefile
@@ -29,6 +29,7 @@
 CONFIG_ANDROID := y
 CONFIG_ANDROID12 := y
 CONFIG_BCMDHD_OOB_HOST_WAKE := y
+CONFIG_MACH_PLATFORM := y
 
 #####################
 # SDIO Basic feature
@@ -525,6 +526,14 @@ ifneq ($(CONFIG_DHD_MONITOR_INTERFACE),)
     DHDOFILES += wl_linux_mon.o
 endif
 
+ifeq ($(CONFIG_MACH_PLATFORM),y)
+	DHDOFILES += dhd_gpio.o
+	DHDCFLAGS += -DDHD_OF_SUPPORT -DCUSTOMER_OOB -DHW_OOB -DCUSTOMER_HW
+	DHDCFLAGS += -DBCMPCIE_OOB_HOST_WAKE
+	DHDCFLAGS += -DCUSTOMER_HW_ROCKCHIP
+	#DHDCFLAGS += -DENABLE_INSMOD_NO_FW_LOAD
+endif
+
 ifneq ($(CONFIG_DHD_OF_SUPPORT),)
     DHDCFLAGS += -DDHD_OF_SUPPORT
     DHDOFILES += dhd_custom_msm.o
diff --git a/drivers/net/wireless/rockchip_wlan/infineon/bcmdhd/dhd_custom_msm.c b/drivers/net/wireless/rockchip_wlan/infineon/bcmdhd/dhd_custom_msm.c
index 453b371094c4..5d796b579eb3 100644
--- a/drivers/net/wireless/rockchip_wlan/infineon/bcmdhd/dhd_custom_msm.c
+++ b/drivers/net/wireless/rockchip_wlan/infineon/bcmdhd/dhd_custom_msm.c
@@ -250,7 +250,6 @@ struct resource dhd_wlan_resources = {
 	IORESOURCE_IRQ_HIGHLEVEL,
 #endif /* CONFIG_BCMDHD_PCIE */
 };
-EXPORT_SYMBOL(dhd_wlan_resources);
 
 struct wifi_platform_data dhd_wlan_control = {
 	.set_power	= dhd_wlan_power,
@@ -260,7 +259,6 @@ struct wifi_platform_data dhd_wlan_control = {
 	.mem_prealloc	= dhd_wlan_mem_prealloc,
 #endif /* CONFIG_BROADCOM_WIFI_RESERVED_MEM */
 };
-EXPORT_SYMBOL(dhd_wlan_control);
 
 #ifndef USE_CUSTOM_MSM_PCIE
 int __init
diff --git a/drivers/net/wireless/rockchip_wlan/infineon/bcmdhd/dhd_gpio.c b/drivers/net/wireless/rockchip_wlan/infineon/bcmdhd/dhd_gpio.c
new file mode 100644
index 000000000000..3a1e50835096
--- /dev/null
+++ b/drivers/net/wireless/rockchip_wlan/infineon/bcmdhd/dhd_gpio.c
@@ -0,0 +1,437 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+#include <osl.h>
+#include <dhd_linux.h>
+#include <linux/gpio.h>
+#ifdef CUSTOMER_HW_ROCKCHIP
+#include <linux/rfkill-wlan.h>
+#endif
+
+#if defined(BUS_POWER_RESTORE) && defined(BCMSDIO)
+#include <linux/mmc/core.h>
+#include <linux/mmc/card.h>
+#include <linux/mmc/host.h>
+#include <linux/mmc/sdio_func.h>
+#endif /* defined(BUS_POWER_RESTORE) && defined(BCMSDIO) */
+
+#ifdef CONFIG_DHD_USE_STATIC_BUF
+#ifdef DHD_STATIC_IN_DRIVER
+extern int dhd_static_buf_init(void);
+extern void dhd_static_buf_exit(void);
+#endif /* DHD_STATIC_IN_DRIVER */
+#ifdef BCMDHD_MDRIVER
+extern void *dhd_wlan_mem_prealloc(uint bus_type, int index,
+	int section, unsigned long size);
+#else
+extern void *dhd_wlan_mem_prealloc(int section, unsigned long size);
+#endif
+#endif /* CONFIG_DHD_USE_STATIC_BUF */
+#ifdef CUSTOMER_HW_ROCKCHIP
+#ifdef BCMPCIE
+//extern void rk_pcie_power_on_atu_fixup(void);
+#endif
+#endif
+
+#ifdef BCMDHD_DTS
+/* This is sample code in dts file.
+bcmdhd {
+	compatible = "android,bcmdhd_wlan";
+	gpio_wl_reg_on = <&gpio GPIOH_4 GPIO_ACTIVE_HIGH>;
+	gpio_wl_host_wake = <&gpio GPIOZ_15 GPIO_ACTIVE_HIGH>;
+};
+*/
+#define DHD_DT_COMPAT_ENTRY		"android,bcmdhd_wlan"
+#define GPIO_WL_REG_ON_PROPNAME		"gpio_wl_reg_on"
+#define GPIO_WL_HOST_WAKE_PROPNAME	"gpio_wl_host_wake"
+#endif
+
+static int
+dhd_wlan_set_power(int on, wifi_adapter_info_t *adapter)
+{
+
+	int gpio_wl_reg_on = adapter->gpio_wl_reg_on;
+	int err = 0;
+	printf("xxh debug dhd_wlan_set_power\n");
+
+	if (on) {
+		printf("======== PULL WL_REG_ON(%d) HIGH! ========\n", gpio_wl_reg_on);
+		if (gpio_wl_reg_on >= 0) {
+			err = gpio_direction_output(gpio_wl_reg_on, 1);
+			if (err) {
+				printf("%s: WL_REG_ON didn't output high\n", __FUNCTION__);
+				return -EIO;
+			}
+		}
+#ifdef CUSTOMER_HW_ROCKCHIP
+		rockchip_wifi_power(1);
+#ifdef BCMPCIE
+		//rk_pcie_power_on_atu_fixup();
+#endif
+#endif
+#ifdef BUS_POWER_RESTORE
+#ifdef BCMSDIO
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 32) && LINUX_VERSION_CODE < KERNEL_VERSION(4, 19, 0)
+		if (adapter->sdio_func && adapter->sdio_func->card && adapter->sdio_func->card->host) {
+			mdelay(100);
+			printf("======== mmc_power_restore_host! ========\n");
+			mmc_power_restore_host(adapter->sdio_func->card->host);
+		}
+#endif
+#elif defined(BCMPCIE)
+		if (adapter->pci_dev) {
+			mdelay(100);
+			printf("======== pci_set_power_state PCI_D0! ========\n");
+			pci_set_power_state(adapter->pci_dev, PCI_D0);
+			if (adapter->pci_saved_state)
+				pci_load_and_free_saved_state(adapter->pci_dev, &adapter->pci_saved_state);
+			pci_restore_state(adapter->pci_dev);
+			err = pci_enable_device(adapter->pci_dev);
+			if (err < 0)
+				printf("%s: PCI enable device failed", __FUNCTION__);
+			pci_set_master(adapter->pci_dev);
+		}
+#endif /* BCMPCIE */
+#endif /* BUS_POWER_RESTORE */
+		/* Lets customer power to get stable */
+		mdelay(100);
+	} else {
+#ifdef BUS_POWER_RESTORE
+#ifdef BCMSDIO
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 32) && LINUX_VERSION_CODE < KERNEL_VERSION(4, 19, 0)
+		if (adapter->sdio_func && adapter->sdio_func->card && adapter->sdio_func->card->host) {
+			printf("======== mmc_power_save_host! ========\n");
+			mmc_power_save_host(adapter->sdio_func->card->host);
+		}
+#endif
+#elif defined(BCMPCIE)
+		if (adapter->pci_dev) {
+			printf("======== pci_set_power_state PCI_D3hot! ========\n");
+			pci_save_state(adapter->pci_dev);
+			adapter->pci_saved_state = pci_store_saved_state(adapter->pci_dev);
+			if (pci_is_enabled(adapter->pci_dev))
+				pci_disable_device(adapter->pci_dev);
+			pci_set_power_state(adapter->pci_dev, PCI_D3hot);
+		}
+#endif /* BCMPCIE */
+#endif /* BUS_POWER_RESTORE */
+		printf("======== PULL WL_REG_ON(%d) LOW! ========\n", gpio_wl_reg_on);
+		if (gpio_wl_reg_on >= 0) {
+			err = gpio_direction_output(gpio_wl_reg_on, 0);
+			if (err) {
+				printf("%s: WL_REG_ON didn't output low\n", __FUNCTION__);
+				return -EIO;
+			}
+		}
+#ifdef CUSTOMER_HW_ROCKCHIP
+		rockchip_wifi_power(0);
+#endif
+	}
+
+	return err;
+}
+
+static int dhd_wlan_set_reset(int onoff)
+{
+	return 0;
+}
+
+static int dhd_wlan_set_carddetect(int present)
+{
+	int err = 0;
+
+#if !defined(BUS_POWER_RESTORE)
+	if (present) {
+#if defined(BCMSDIO)
+		printf("======== Card detection to detect SDIO card! ========\n");
+#ifdef CUSTOMER_HW_PLATFORM
+		err = sdhci_force_presence_change(&sdmmc_channel, 1);
+#endif /* CUSTOMER_HW_PLATFORM */
+#ifdef CUSTOMER_HW_ROCKCHIP
+		rockchip_wifi_set_carddetect(1);
+#endif
+#elif defined(BCMPCIE)
+		printf("======== Card detection to detect PCIE card! ========\n");
+#endif
+	} else {
+#if defined(BCMSDIO)
+		printf("======== Card detection to remove SDIO card! ========\n");
+#ifdef CUSTOMER_HW_PLATFORM
+		err = sdhci_force_presence_change(&sdmmc_channel, 0);
+#endif /* CUSTOMER_HW_PLATFORM */
+#ifdef CUSTOMER_HW_ROCKCHIP
+	rockchip_wifi_set_carddetect(0);
+#endif
+#elif defined(BCMPCIE)
+		printf("======== Card detection to remove PCIE card! ========\n");
+#endif
+	}
+#endif /* BUS_POWER_RESTORE */
+
+	return err;
+}
+
+static int dhd_wlan_get_mac_addr(unsigned char *buf, int ifidx)
+{
+	int err = 0;
+
+	if (ifidx == 1) {
+#ifdef EXAMPLE_GET_MAC
+		struct ether_addr ea_example = {{0x00, 0x11, 0x22, 0x33, 0x44, 0xFF}};
+		bcopy((char *)&ea_example, buf, sizeof(struct ether_addr));
+#endif /* EXAMPLE_GET_MAC */
+	} else {
+#ifdef EXAMPLE_GET_MAC
+		struct ether_addr ea_example = {{0x02, 0x11, 0x22, 0x33, 0x44, 0x55}};
+		bcopy((char *)&ea_example, buf, sizeof(struct ether_addr));
+#endif /* EXAMPLE_GET_MAC */
+#ifdef CUSTOMER_HW_ROCKCHIP
+		err = rockchip_wifi_mac_addr(buf);
+#endif
+	}
+
+#ifdef EXAMPLE_GET_MAC_VER2
+	/* EXAMPLE code */
+	{
+		char macpad[56]= {
+		0x00,0xaa,0x9c,0x84,0xc7,0xbc,0x9b,0xf6,
+		0x02,0x33,0xa9,0x4d,0x5c,0xb4,0x0a,0x5d,
+		0xa8,0xef,0xb0,0xcf,0x8e,0xbf,0x24,0x8a,
+		0x87,0x0f,0x6f,0x0d,0xeb,0x83,0x6a,0x70,
+		0x4a,0xeb,0xf6,0xe6,0x3c,0xe7,0x5f,0xfc,
+		0x0e,0xa7,0xb3,0x0f,0x00,0xe4,0x4a,0xaf,
+		0x87,0x08,0x16,0x6d,0x3a,0xe3,0xc7,0x80};
+		bcopy(macpad, buf+6, sizeof(macpad));
+	}
+#endif /* EXAMPLE_GET_MAC_VER2 */
+
+	printf("======== %s err=%d ========\n", __FUNCTION__, err);
+
+	return err;
+}
+
+static struct cntry_locales_custom brcm_wlan_translate_custom_table[] = {
+	/* Table should be filled out based on custom platform regulatory requirement */
+#ifdef EXAMPLE_TABLE
+	{"",   "XT", 49},  /* Universal if Country code is unknown or empty */
+	{"US", "US", 0},
+#endif /* EXMAPLE_TABLE */
+};
+
+#ifdef CUSTOM_FORCE_NODFS_FLAG
+struct cntry_locales_custom brcm_wlan_translate_nodfs_table[] = {
+#ifdef EXAMPLE_TABLE
+	{"",   "XT", 50},  /* Universal if Country code is unknown or empty */
+	{"US", "US", 0},
+#endif /* EXMAPLE_TABLE */
+};
+#endif
+
+static void *dhd_wlan_get_country_code(char *ccode
+#ifdef CUSTOM_FORCE_NODFS_FLAG
+	, u32 flags
+#endif
+)
+{
+	struct cntry_locales_custom *locales;
+	int size;
+	int i;
+
+	if (!ccode)
+		return NULL;
+
+#ifdef CUSTOM_FORCE_NODFS_FLAG
+	if (flags & WLAN_PLAT_NODFS_FLAG) {
+		locales = brcm_wlan_translate_nodfs_table;
+		size = ARRAY_SIZE(brcm_wlan_translate_nodfs_table);
+	} else {
+#endif
+		locales = brcm_wlan_translate_custom_table;
+		size = ARRAY_SIZE(brcm_wlan_translate_custom_table);
+#ifdef CUSTOM_FORCE_NODFS_FLAG
+	}
+#endif
+
+	for (i = 0; i < size; i++)
+		if (strcmp(ccode, locales[i].iso_abbrev) == 0)
+			return &locales[i];
+	return NULL;
+}
+
+struct resource dhd_wlan_resources = {
+	.name	= "bcmdhd_wlan_irq",
+	.start	= 0, /* Dummy */
+	.end	= 0, /* Dummy */
+	.flags	= IORESOURCE_IRQ | IORESOURCE_IRQ_SHAREABLE |
+#ifdef CONFIG_BCMDHD_PCIE
+	IORESOURCE_IRQ_HIGHEDGE,
+#else
+	IORESOURCE_IRQ_HIGHLEVEL,
+#endif /* CONFIG_BCMDHD_PCIE */
+};
+
+struct wifi_platform_data dhd_wlan_control = {
+	.set_power	= dhd_wlan_set_power,
+	.set_reset	= dhd_wlan_set_reset,
+	.set_carddetect	= dhd_wlan_set_carddetect,
+	.get_mac_addr	= dhd_wlan_get_mac_addr,
+#ifdef CONFIG_DHD_USE_STATIC_BUF
+	.mem_prealloc	= dhd_wlan_mem_prealloc,
+#endif /* CONFIG_DHD_USE_STATIC_BUF */
+	.get_country_code = dhd_wlan_get_country_code,
+};
+
+int dhd_wlan_init_gpio(wifi_adapter_info_t *adapter)
+{
+#ifdef BCMDHD_DTS
+	char wlan_node[32];
+	struct device_node *root_node = NULL;
+#endif
+	int err = 0;
+	int gpio_wl_reg_on;
+#ifdef CUSTOMER_OOB
+	int gpio_wl_host_wake;
+	int host_oob_irq = -1;
+	uint host_oob_irq_flags = 0;
+#ifdef CUSTOMER_HW_ROCKCHIP
+#ifdef HW_OOB
+	int irq_flags = -1;
+#endif
+#endif
+#endif
+
+	/* Please check your schematic and fill right GPIO number which connected to
+	* WL_REG_ON and WL_HOST_WAKE.
+	*/
+#ifdef BCMDHD_DTS
+	strcpy(wlan_node, DHD_DT_COMPAT_ENTRY);
+	printf("======== Get GPIO from DTS(%s) ========\n", wlan_node);
+	root_node = of_find_compatible_node(NULL, NULL, wlan_node);
+	if (root_node) {
+		gpio_wl_reg_on = of_get_named_gpio(root_node, GPIO_WL_REG_ON_PROPNAME, 0);
+#ifdef CUSTOMER_OOB
+		gpio_wl_host_wake = of_get_named_gpio(root_node, GPIO_WL_HOST_WAKE_PROPNAME, 0);
+#endif
+	} else
+#endif
+	{
+		gpio_wl_reg_on = -1;
+#ifdef CUSTOMER_OOB
+		gpio_wl_host_wake = -1;
+#endif
+	}
+
+	if (gpio_wl_reg_on >= 0) {
+		err = gpio_request(gpio_wl_reg_on, "WL_REG_ON");
+		if (err < 0) {
+			printf("%s: gpio_request(%d) for WL_REG_ON failed\n",
+				__FUNCTION__, gpio_wl_reg_on);
+			gpio_wl_reg_on = -1;
+		}
+	}
+	adapter->gpio_wl_reg_on = gpio_wl_reg_on;
+
+#ifdef CUSTOMER_OOB
+	if (gpio_wl_host_wake >= 0) {
+		err = gpio_request(gpio_wl_host_wake, "bcmdhd");
+		if (err < 0) {
+			printf("%s: gpio_request(%d) for WL_HOST_WAKE failed\n",
+				__FUNCTION__, gpio_wl_host_wake);
+			return -1;
+		}
+		adapter->gpio_wl_host_wake = gpio_wl_host_wake;
+		err = gpio_direction_input(gpio_wl_host_wake);
+		if (err < 0) {
+			printf("%s: gpio_direction_input(%d) for WL_HOST_WAKE failed\n",
+				__FUNCTION__, gpio_wl_host_wake);
+			gpio_free(gpio_wl_host_wake);
+			return -1;
+		}
+		host_oob_irq = gpio_to_irq(gpio_wl_host_wake);
+		if (host_oob_irq < 0) {
+			printf("%s: gpio_to_irq(%d) for WL_HOST_WAKE failed\n",
+				__FUNCTION__, gpio_wl_host_wake);
+			gpio_free(gpio_wl_host_wake);
+			return -1;
+		}
+	}
+#ifdef CUSTOMER_HW_ROCKCHIP
+	host_oob_irq = rockchip_wifi_get_oob_irq();
+#endif
+
+#ifdef HW_OOB
+#ifdef HW_OOB_LOW_LEVEL
+	host_oob_irq_flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL | IORESOURCE_IRQ_SHAREABLE;
+#else
+	host_oob_irq_flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL | IORESOURCE_IRQ_SHAREABLE;
+#endif
+#ifdef CUSTOMER_HW_ROCKCHIP
+	host_oob_irq_flags = IORESOURCE_IRQ | IORESOURCE_IRQ_SHAREABLE;
+	irq_flags = rockchip_wifi_get_oob_irq_flag();
+	if (irq_flags == 1)
+		host_oob_irq_flags |= IORESOURCE_IRQ_HIGHLEVEL;
+	else if (irq_flags == 0)
+		host_oob_irq_flags |= IORESOURCE_IRQ_LOWLEVEL;
+	else
+		pr_warn("%s: unknown oob irqflags !\n", __func__);
+#endif
+#else
+	host_oob_irq_flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE | IORESOURCE_IRQ_SHAREABLE;
+#endif
+	host_oob_irq_flags &= IRQF_TRIGGER_MASK;
+
+	adapter->irq_num = host_oob_irq;
+	adapter->intr_flags = host_oob_irq_flags;
+	printf("%s: WL_HOST_WAKE=%d, oob_irq=%d, oob_irq_flags=0x%x\n", __FUNCTION__,
+		gpio_wl_host_wake, host_oob_irq, host_oob_irq_flags);
+#endif /* CUSTOMER_OOB */
+	printf("%s: WL_REG_ON=%d\n", __FUNCTION__, gpio_wl_reg_on);
+	printf("xxh dhd_wlan_init_gpio 1 \n");
+
+	return 0;
+}
+
+static void dhd_wlan_deinit_gpio(wifi_adapter_info_t *adapter)
+{
+	int gpio_wl_reg_on = adapter->gpio_wl_reg_on;
+#ifdef CUSTOMER_OOB
+	int gpio_wl_host_wake = adapter->gpio_wl_host_wake;
+#endif
+
+	if (gpio_wl_reg_on >= 0) {
+		printf("%s: gpio_free(WL_REG_ON %d)\n", __FUNCTION__, gpio_wl_reg_on);
+		gpio_free(gpio_wl_reg_on);
+		gpio_wl_reg_on = -1;
+	}
+#ifdef CUSTOMER_OOB
+	if (gpio_wl_host_wake >= 0) {
+		printf("%s: gpio_free(WL_HOST_WAKE %d)\n", __FUNCTION__, gpio_wl_host_wake);
+		gpio_free(gpio_wl_host_wake);
+		gpio_wl_host_wake = -1;
+	}
+#endif /* CUSTOMER_OOB */
+}
+
+int dhd_wlan_init_plat_data(wifi_adapter_info_t *adapter)
+{
+	int err = 0;
+
+	printf("======== %s ========\n", __FUNCTION__);
+	err = dhd_wlan_init_gpio(adapter);
+	if (err)
+		goto exit;
+
+#ifdef DHD_STATIC_IN_DRIVER
+	err = dhd_static_buf_init();
+#endif
+
+exit:
+	return err;
+}
+
+void dhd_wlan_deinit_plat_data(wifi_adapter_info_t *adapter)
+{
+	printf("======== %s ========\n", __FUNCTION__);
+#ifdef DHD_STATIC_IN_DRIVER
+	dhd_static_buf_exit();
+#endif
+	dhd_wlan_deinit_gpio(adapter);
+}
diff --git a/drivers/net/wireless/rockchip_wlan/infineon/bcmdhd/dhd_linux.h b/drivers/net/wireless/rockchip_wlan/infineon/bcmdhd/dhd_linux.h
index 53a727af2672..b7c68a07ce21 100644
--- a/drivers/net/wireless/rockchip_wlan/infineon/bcmdhd/dhd_linux.h
+++ b/drivers/net/wireless/rockchip_wlan/infineon/bcmdhd/dhd_linux.h
@@ -239,11 +239,29 @@ typedef struct dhd_tx_lb_pkttag_fr {
 				} \
 			} while (0)
 
+typedef struct wifi_adapter_info {
+	const char	*name;
+	uint		irq_num;
+	uint		intr_flags;
+	const char	*fw_path;
+	const char	*nv_path;
+	void		*wifi_plat_data;	/* wifi ctrl func, for backward compatibility */
+	uint		bus_type;
+	int index;
+	uint		bus_num;
+	uint		slot_num;
+	int         gpio_wl_reg_on;
+	int         gpio_wl_host_wake;
+#if defined(BT_OVER_SDIO)
+	const char	*btfw_path;
+#endif /* defined (BT_OVER_SDIO) */
+} wifi_adapter_info_t;
+
 #if !defined(CONFIG_WIFI_CONTROL_FUNC)
 #define WLAN_PLAT_NODFS_FLAG	0x01
 #define WLAN_PLAT_AP_FLAG	0x02
 struct wifi_platform_data {
-	int (*set_power)(int val);
+	int (*set_power)(int val,  wifi_adapter_info_t *adapter);
 	int (*set_reset)(int val);
 	int (*set_carddetect)(int val);
 	void *(*mem_prealloc)(int section, unsigned long size);
@@ -261,20 +279,6 @@ struct wifi_platform_data {
 
 #define DHD_REGISTRATION_TIMEOUT  12000  /* msec : allowed time to finished dhd registration */
 
-typedef struct wifi_adapter_info {
-	const char	*name;
-	uint		irq_num;
-	uint		intr_flags;
-	const char	*fw_path;
-	const char	*nv_path;
-	void		*wifi_plat_data;	/* wifi ctrl func, for backward compatibility */
-	uint		bus_type;
-	uint		bus_num;
-	uint		slot_num;
-#if defined(BT_OVER_SDIO)
-	const char	*btfw_path;
-#endif /* defined (BT_OVER_SDIO) */
-} wifi_adapter_info_t;
 
 typedef struct bcmdhd_wifi_platdata {
 	uint				num_adapters;
diff --git a/drivers/net/wireless/rockchip_wlan/infineon/bcmdhd/dhd_linux_platdev.c b/drivers/net/wireless/rockchip_wlan/infineon/bcmdhd/dhd_linux_platdev.c
index f91e49684662..9da8b5a1b302 100644
--- a/drivers/net/wireless/rockchip_wlan/infineon/bcmdhd/dhd_linux_platdev.c
+++ b/drivers/net/wireless/rockchip_wlan/infineon/bcmdhd/dhd_linux_platdev.c
@@ -202,7 +202,7 @@ int wifi_platform_set_power(wifi_adapter_info_t *adapter, bool on, unsigned long
 		}
 #endif /* ENABLE_4335BT_WAR */
 
-		err = plat_data->set_power(on);
+		err = plat_data->set_power(on, adapter);
 	}
 
 	if (msec && !err)
@@ -541,9 +541,15 @@ static int wifi_ctrlfunc_register_drv(void)
 	if (dts_enabled) {
 		struct resource *resource;
 		adapter->wifi_plat_data = (void *)&dhd_wlan_control;
+#ifdef CUSTOMER_HW
+		wifi_plat_dev_probe_ret = dhd_wlan_init_plat_data(adapter);
+		if (wifi_plat_dev_probe_ret)
+			return wifi_plat_dev_probe_ret;
+#endif
 		resource = &dhd_wlan_resources;
-		adapter->irq_num = resource->start;
-		adapter->intr_flags = resource->flags & IRQF_TRIGGER_MASK;
+		//adapter->irq_num = resource->start;
+		//adapter->intr_flags = resource->flags & IRQF_TRIGGER_MASK;
+
 #ifdef DHD_ISR_NO_SUSPEND
 		adapter->intr_flags |= IRQF_NO_SUSPEND;
 #endif // endif
diff --git a/drivers/net/wireless/rockchip_wlan/infineon/bcmdhd/dhd_pcie_linux.c b/drivers/net/wireless/rockchip_wlan/infineon/bcmdhd/dhd_pcie_linux.c
index 426afe78c78b..49d183f64b20 100644
--- a/drivers/net/wireless/rockchip_wlan/infineon/bcmdhd/dhd_pcie_linux.c
+++ b/drivers/net/wireless/rockchip_wlan/infineon/bcmdhd/dhd_pcie_linux.c
@@ -1006,9 +1006,6 @@ static int dhdpcie_suspend_dev(struct pci_dev *dev)
 		DHD_ERROR(("%s: pci_set_power_state error %d\n",
 			__FUNCTION__, ret));
 	}
-#ifdef OEM_ANDROID
-	dev->state_saved = FALSE;
-#endif /* OEM_ANDROID */
 	dhdpcie_suspend_dump_cfgregs(bus, "AFTER_EP_SUSPEND");
 	return ret;
 }
@@ -1046,9 +1043,6 @@ static int dhdpcie_resume_dev(struct pci_dev *dev)
 	pci_load_and_free_saved_state(dev, &pch->state);
 #endif /* OEM_ANDROID && LINUX_VERSION_CODE >= KERNEL_VERSION(3, 0, 0) */
 	DHD_ERROR(("%s: Enter\n", __FUNCTION__));
-#ifdef OEM_ANDROID
-	dev->state_saved = TRUE;
-#endif /* OEM_ANDROID */
 	pci_restore_state(dev);
 #ifdef FORCE_TPOWERON
 	if (dhdpcie_chip_req_forced_tpoweron(pch->bus)) {
@@ -2801,7 +2795,7 @@ int dhdpcie_oob_intr_register(dhd_bus_t *bus)
 	}
 
 	if (dhdpcie_osinfo->oob_irq_num > 0) {
-		DHD_INFO_HW4(("%s OOB irq=%d flags=%X \n", __FUNCTION__,
+		DHD_ERROR(("%s OOB irq=%d flags=%X \n", __FUNCTION__,
 			(int)dhdpcie_osinfo->oob_irq_num,
 			(int)dhdpcie_osinfo->oob_irq_flags));
 		err = request_irq(dhdpcie_osinfo->oob_irq_num, wlan_oob_irq,
diff --git a/drivers/net/wireless/rockchip_wlan/infineon/bcmdhd/wl_cfgvendor.c b/drivers/net/wireless/rockchip_wlan/infineon/bcmdhd/wl_cfgvendor.c
index 3dd80833ed3d..8e88deb40791 100644
--- a/drivers/net/wireless/rockchip_wlan/infineon/bcmdhd/wl_cfgvendor.c
+++ b/drivers/net/wireless/rockchip_wlan/infineon/bcmdhd/wl_cfgvendor.c
@@ -6226,12 +6226,14 @@ static int wl_cfgvendor_lstats_get_info(struct wiphy *wiphy,
 	RETURN_EIO_IF_NOT_UP(cfg);
 
 	/* Get the device rev info */
+#ifdef OEM_ANDROID
 	bzero(&revinfo, sizeof(revinfo));
 	err = wldev_ioctl_get(bcmcfg_to_prmry_ndev(cfg), WLC_GET_REVINFO, &revinfo,
 			sizeof(revinfo));
 	if (err != BCME_OK) {
 		goto exit;
 	}
+#endif
 
 	outdata = (void *)MALLOCZ(cfg->osh, WLC_IOCTL_MAXLEN);
 	if (outdata == NULL) {

From 955d8bfa4bbfbaf1f770c9cd86eaf828f82fb470 Mon Sep 17 00:00:00 2001
From: Wyon Bi <bivvy.bi@rock-chips.com>
Date: Mon, 19 Jun 2023 16:12:06 +0800
Subject: [PATCH 10/10] arm64: rockchip_defconfig: Enable
 CONFIG_DRM_PANEL_MAXIM_MAX96772

Enable the maxim max96772-based panels used on RK3588 vehicle s66 project.

Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
Change-Id: I2065012318aab045c91500c7f9691bd9bee1007a
---
 arch/arm64/configs/rockchip_defconfig | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm64/configs/rockchip_defconfig b/arch/arm64/configs/rockchip_defconfig
index 180d24c89340..b5046cb58622 100644
--- a/arch/arm64/configs/rockchip_defconfig
+++ b/arch/arm64/configs/rockchip_defconfig
@@ -633,6 +633,7 @@ CONFIG_DRM_ROCKCHIP_RK618=y
 CONFIG_DRM_ROCKCHIP_RK628=y
 CONFIG_DRM_PANEL_SIMPLE=y
 CONFIG_DRM_PANEL_MAXIM_MAX96752F=y
+CONFIG_DRM_PANEL_MAXIM_MAX96772=y
 CONFIG_DRM_DISPLAY_CONNECTOR=y
 CONFIG_DRM_MAXIM_MAX96745=y
 CONFIG_DRM_MAXIM_MAX96755F=y