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vpp: create a variable for cm input size [1/2]
PD#TV-5968 Problem: Too many case for cm input size with differnet chips. SR0+SR1+PPS. Solution: Add a variable to indicate the cm input size. Verify: on r311 Change-Id: I5f1024340c67edbdf646c1b5bb7cad95b93b7b92 Signed-off-by: Brian Zhu <brian.zhu@amlogic.com>
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@@ -2268,6 +2268,31 @@ static void vpp_set_super_scaler(
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next_frame_par->sr0_position = 1;
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next_frame_par->sr1_position = 1;
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}
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if (next_frame_par->sr1_position) {
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/* sr core 1 output */
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next_frame_par->cm_input_w =
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next_frame_par->spsc1_w_in <<
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next_frame_par->supsc1_hori_ratio;
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next_frame_par->cm_input_h =
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next_frame_par->spsc1_h_in <<
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next_frame_par->supsc1_vert_ratio;
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} else if (!next_frame_par->sr0_position) {
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/* sr core 0 output */
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next_frame_par->cm_input_w =
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next_frame_par->spsc0_w_in <<
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next_frame_par->supsc0_hori_ratio;
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next_frame_par->cm_input_h =
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next_frame_par->spsc0_h_in <<
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next_frame_par->supsc0_vert_ratio;
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} else {
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/* pps output */
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next_frame_par->cm_input_w =
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next_frame_par->VPP_hsc_endp -
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next_frame_par->VPP_hsc_startp + 1;
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next_frame_par->cm_input_h =
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next_frame_par->VPP_vsc_endp -
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next_frame_par->VPP_vsc_startp + 1;
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}
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} else if (is_meson_txhd_cpu()
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|| is_meson_g12a_cpu()
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|| is_meson_g12b_cpu()
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@@ -2279,6 +2304,23 @@ static void vpp_set_super_scaler(
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else
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next_frame_par->sr0_position = 1;
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next_frame_par->sr1_position = 0;
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if (!next_frame_par->sr0_position) {
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/* sr core 0 output */
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next_frame_par->cm_input_w =
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next_frame_par->spsc0_w_in <<
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next_frame_par->supsc0_hori_ratio;
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next_frame_par->cm_input_h =
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next_frame_par->spsc0_h_in <<
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next_frame_par->supsc0_vert_ratio;
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} else {
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/* pps output */
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next_frame_par->cm_input_w =
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next_frame_par->VPP_hsc_endp -
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next_frame_par->VPP_hsc_startp + 1;
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next_frame_par->cm_input_h =
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next_frame_par->VPP_vsc_endp -
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next_frame_par->VPP_vsc_startp + 1;
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}
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} else if (is_meson_gxlx_cpu()) {
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if (sr_path == CORE1_BEFORE_PPS)
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next_frame_par->sr1_position = 1;
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@@ -2287,6 +2329,23 @@ static void vpp_set_super_scaler(
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else
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next_frame_par->sr1_position = 1;
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next_frame_par->sr0_position = 0;
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if (!next_frame_par->sr1_position) {
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/* sr core 1 output */
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next_frame_par->cm_input_w =
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next_frame_par->spsc1_w_in <<
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next_frame_par->supsc1_hori_ratio;
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next_frame_par->cm_input_h =
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next_frame_par->spsc1_h_in <<
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next_frame_par->supsc1_vert_ratio;
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} else {
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/* pps output */
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next_frame_par->cm_input_w =
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next_frame_par->VPP_hsc_endp -
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next_frame_par->VPP_hsc_startp + 1;
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next_frame_par->cm_input_h =
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next_frame_par->VPP_vsc_endp -
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next_frame_par->VPP_vsc_startp + 1;
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}
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} else if (is_meson_txlx_cpu()
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|| is_meson_txl_cpu()
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|| is_meson_gxtvbb_cpu()) {
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@@ -2301,6 +2360,23 @@ static void vpp_set_super_scaler(
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next_frame_par->sr0_position = 1;
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next_frame_par->sr1_position = 1;
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}
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if (next_frame_par->sr1_position) {
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/* sr core 1 output */
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next_frame_par->cm_input_w =
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next_frame_par->spsc1_w_in <<
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next_frame_par->supsc1_hori_ratio;
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next_frame_par->cm_input_h =
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next_frame_par->spsc1_h_in <<
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next_frame_par->supsc1_vert_ratio;
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} else {
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/* pps output */
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next_frame_par->cm_input_w =
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next_frame_par->VPP_hsc_endp -
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next_frame_par->VPP_hsc_startp + 1;
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next_frame_par->cm_input_h =
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next_frame_par->VPP_vsc_endp -
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next_frame_par->VPP_vsc_startp + 1;
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}
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}
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if (super_debug) {
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@@ -2323,6 +2399,11 @@ static void vpp_set_super_scaler(
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next_frame_par->VPP_hsc_linear_endp,
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next_frame_par->VPP_vsc_startp,
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next_frame_par->VPP_vsc_endp);
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pr_info("layer0: cm_input_w=%u, cm_input_h=%u, sr0_position=%u, sr1_position=%u.\n",
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next_frame_par->cm_input_w,
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next_frame_par->cm_input_h,
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next_frame_par->sr0_position,
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next_frame_par->sr1_position);
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}
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}
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@@ -3154,12 +3235,28 @@ int vpp_set_filters(
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if (ret == VppFilter_Changed_but_Hold)
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bypass_sr = true;
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/*config super scaler after set next_frame_par is calc ok for pps*/
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if (local_input.layer_id == 0)
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if (local_input.layer_id == 0) {
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vpp_set_super_scaler(
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wide_mode,
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vinfo, next_frame_par,
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(bypass_sr | bypass_spscl0),
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(bypass_sr | bypass_spscl1));
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/* cm input size will be set in super scaler function */
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} else {
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if (local_input.pps_support) {
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next_frame_par->cm_input_w =
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next_frame_par->VPP_hsc_endp
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- next_frame_par->VPP_hsc_startp + 1;
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next_frame_par->cm_input_h =
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next_frame_par->VPP_vsc_endp
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- next_frame_par->VPP_vsc_startp + 1;
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} else {
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next_frame_par->cm_input_w =
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next_frame_par->video_input_w;
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next_frame_par->cm_input_h =
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next_frame_par->video_input_h;
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}
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}
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return ret;
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}
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@@ -149,6 +149,8 @@ struct vpp_frame_par_s {
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u32 spsc1_h_in;
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u32 video_input_w;
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u32 video_input_h;
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u32 cm_input_w;
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u32 cm_input_h;
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u32 clk_in_pps;
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bool nocomp;
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