From 5c679e90581e278da2c3ca9977bd754436b3429f Mon Sep 17 00:00:00 2001 From: Huibin Hong Date: Mon, 7 Jul 2025 09:53:37 +0800 Subject: [PATCH 01/10] soc: rockchip: fiq_debugger: fix dts property 'rockchip,irq-mode-enable' When cpu is ARM-V7 without ATF, the uart interrupt mode is fiq mode when 'rockchip,irq-mode-enable' is 1, and it is irq mode when 'rockchip,irq-mode-enable' is 0. Signed-off-by: Huibin Hong Change-Id: Ia648639a52fe8c08893b7be0d4913233fb6d9607 --- drivers/soc/rockchip/fiq_debugger/rk_fiq_debugger.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/drivers/soc/rockchip/fiq_debugger/rk_fiq_debugger.c b/drivers/soc/rockchip/fiq_debugger/rk_fiq_debugger.c index fd71ed617d04..b91d337a7bd0 100644 --- a/drivers/soc/rockchip/fiq_debugger/rk_fiq_debugger.c +++ b/drivers/soc/rockchip/fiq_debugger/rk_fiq_debugger.c @@ -67,6 +67,7 @@ struct rk_fiq_debugger { static int rk_fiq_debugger_id; static int serial_hwirq; +static int irq_mode; #ifdef CONFIG_FIQ_DEBUGGER_TRUST_ZONE static bool tf_fiq_sup; @@ -933,7 +934,7 @@ static void rk_serial_debug_init(void __iomem *base, phys_addr_t phy_base, res[0].start = irq; res[0].end = irq; #if defined(CONFIG_FIQ_GLUE) - if (signal_irq > 0) + if (irq_mode != 1 && signal_irq > 0) res[0].name = "fiq"; else res[0].name = "uart_irq"; @@ -1041,7 +1042,7 @@ static int __init rk_fiqdbg_probe(struct platform_device *pdev) struct device_node *np = pdev->dev.of_node; unsigned int id, ok = 0; int irq, signal_irq = -1, wake_irq = -1; - unsigned int baudrate = 0, irq_mode = 0; + unsigned int baudrate = 0; phys_addr_t phy_base = 0; int serial_id; struct clk *clk; From a9e716a7e7369b037b78d62e6b370bb1b9a22d82 Mon Sep 17 00:00:00 2001 From: Algea Cao Date: Wed, 30 Apr 2025 10:32:41 +0800 Subject: [PATCH 02/10] drm/bridge: synopsys: dw-hdmi-qp: Clear mode list when hdmi plug out When a userspace process that is not the drm master calls drm_mode_getconnector(), fill_modes() will not be called and connector mode list will not be updated. If mode list is not cleared when hdmi plug out, mode list obtained by the use-space process when hdmi is disconnected will still be the same as when hdmi is connected. This is inconsistent with the actual situation. So when the hdmi plug out, connector mode list needs to be actively cleared. The "modetest -c" printed when the error occurs is as follows: Connectors: id encoder status name size (mm) modes encoders 410 409 disconnected HDMI-A-1 0x0 49 409 modes: index name refresh (Hz) hdisp hss hse htot vdisp vss vse vtot #0 3840x2160 24.00 3840 4092 4180 5500 2160 2168 2178 2250 297000 flags: phsync, pvsync; type: preferred, driver #1 4096x2160 60.00 4096 4184 4272 4400 2160 2168 2178 2250 594000 flags: phsync, pvsync; type: driver #2 4096x2160 59.94 4096 4184 4272 4400 2160 2168 2178 2250 593407 flags: phsync, pvsync; type: driver #3 4096x2160 50.00 4096 5064 5152 5280 2160 2168 2178 2250 594000 flags: phsync, pvsync; type: driver #4 4096x2160 30.00 4096 4184 4272 4400 2160 2168 2178 2250 297000 flags: phsync, pvsync; type: driver #5 4096x2160 29.97 4096 4184 4272 4400 2160 2168 2178 2250 296703 flags: phsync, pvsync; type: driver #6 4096x2160 24.00 4096 5116 5204 5500 2160 2168 2178 2250 297000 flags: phsync, pvsync; type: driver #7 4096x2160 23.98 4096 5116 5204 5500 2160 2168 2178 2250 296703 flags: phsync, pvsync; type: driver #8 3840x2160 120.00 3840 4016 4104 4400 2160 2168 2178 2250 1188000 flags: phsync, pvsync; type: driver #9 3840x2160 119.88 3840 4016 4104 4400 2160 2168 2178 2250 1186813 flags: phsync, pvsync; type: driver #10 3840x2160 100.00 3840 4896 4984 5280 2160 2168 2178 2250 1188000 flags: phsync, pvsync; type: driver #11 3840x2160 60.00 3840 4016 4104 4400 2160 2168 2178 2250 594000 flags: phsync, pvsync; type: driver #12 3840x2160 59.94 3840 4016 4104 4400 2160 2168 2178 2250 593407 flags: phsync, pvsync; type: driver #13 3840x2160 50.00 3840 4896 4984 5280 2160 2168 2178 2250 594000 flags: phsync, pvsync; type: driver #14 3840x2160 30.00 3840 4016 4104 4400 2160 2168 2178 2250 297000 flags: phsync, pvsync; type: driver #15 3840x2160 29.97 3840 4016 4104 4400 2160 2168 2178 2250 296703 flags: phsync, pvsync; type: driver #16 3840x2160 25.00 3840 4896 4984 5280 2160 2168 2178 2250 297000 flags: phsync, pvsync; type: driver #17 3840x2160 24.00 3840 5116 5204 5500 2160 2168 2178 2250 297000 flags: phsync, pvsync; type: driver #18 3840x2160 23.98 3840 5116 5204 5500 2160 2168 2178 2250 296703 flags: phsync, pvsync; type: driver #19 1920x1080 120.00 1920 2008 2052 2200 1080 1084 1089 1125 297000 flags: phsync, pvsync; type: driver #20 1920x1080 119.88 1920 2008 2052 2200 1080 1084 1089 1125 296703 flags: phsync, pvsync; type: driver #21 1920x1080 60.00 1920 2008 2052 2200 1080 1084 1089 1125 148500 flags: phsync, pvsync; type: driver #22 1920x1080 60.00 1920 2008 2052 2200 1080 1084 1089 1125 148500 flags: phsync, pvsync; type: driver #23 1920x1080 59.94 1920 2008 2052 2200 1080 1084 1089 1125 148352 flags: phsync, pvsync; type: driver #24 1920x1080i 30.00 1920 2008 2052 2200 1080 1084 1094 1125 74250 flags: phsync, pvsync, interlace; type: driver #25 1920x1080i 29.97 1920 2008 2052 2200 1080 1084 1094 1125 74176 flags: phsync, pvsync, interlace; type: driver #26 1920x1080 50.00 1920 2448 2492 2640 1080 1084 1089 1125 148500 flags: phsync, pvsync; type: driver #27 1920x1080i 25.00 1920 2448 2492 2640 1080 1084 1094 1125 74250 flags: phsync, pvsync, interlace; type: driver #28 1920x1080 30.00 1920 2008 2052 2200 1080 1084 1089 1125 74250 flags: phsync, pvsync; type: driver #29 1920x1080 29.97 1920 2008 2052 2200 1080 1084 1089 1125 74176 flags: phsync, pvsync; type: driver #30 1920x1080 24.00 1920 2558 2602 2750 1080 1084 1089 1125 74250 flags: phsync, pvsync; type: driver #31 1920x1080 23.98 1920 2558 2602 2750 1080 1084 1089 1125 74176 flags: phsync, pvsync; type: driver #32 1280x1024 60.02 1280 1328 1440 1688 1024 1025 1028 1066 108000 flags: phsync, pvsync; type: driver #33 1280x800 59.91 1280 1328 1360 1440 800 803 809 823 71000 flags: phsync, nvsync; type: driver #34 1280x720 60.00 1280 1390 1430 1650 720 725 730 750 74250 flags: phsync, pvsync; type: driver #35 1280x720 60.00 1280 1390 1430 1650 720 725 730 750 74250 flags: phsync, pvsync; type: driver #36 1280x720 59.94 1280 1390 1430 1650 720 725 730 750 74176 flags: phsync, pvsync; type: driver #37 1280x720 50.00 1280 1720 1760 1980 720 725 730 750 74250 flags: phsync, pvsync; type: driver #38 1024x768 119.99 1024 1072 1104 1184 768 771 775 813 115500 flags: phsync, nvsync; type: driver #39 1024x768 60.00 1024 1048 1184 1344 768 771 777 806 65000 flags: nhsync, nvsync; type: driver #40 800x600 60.32 800 840 968 1056 600 601 605 628 40000 flags: phsync, pvsync; type: driver #41 720x576 50.00 720 732 796 864 576 581 586 625 27000 flags: nhsync, nvsync; type: driver #42 720x576 50.00 720 732 796 864 576 581 586 625 27000 flags: nhsync, nvsync; type: driver #43 720x480 60.00 720 736 798 858 480 489 495 525 27027 flags: nhsync, nvsync; type: driver #44 720x480 60.00 720 736 798 858 480 489 495 525 27027 flags: nhsync, nvsync; type: driver #45 720x480 59.94 720 736 798 858 480 489 495 525 27000 flags: nhsync, nvsync; type: driver #46 720x480 59.94 720 736 798 858 480 489 495 525 27000 flags: nhsync, nvsync; type: driver #47 640x480 60.00 640 656 752 800 480 490 492 525 25200 flags: nhsync, nvsync; type: driver #48 640x480 59.94 640 656 752 800 480 490 492 525 25175 flags: nhsync, nvsync; type: driver props: 1 EDID: flags: immutable blob blobs: value: 2 DPMS: flags: enum enums: On=0 Standby=1 Suspend=2 Off=3 value: 0 Fixes: f1c83fae2ee8 ("drm/bridge: synopsys: dw-hdmi-qp: Clear edid property when hdmi plug out") Change-Id: I76551a751dd7ebe1da440c38ca5186b1d2b74e93 Signed-off-by: Algea Cao --- drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c b/drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c index 96241e619f91..b0e295235ee5 100644 --- a/drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c +++ b/drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c @@ -2622,6 +2622,7 @@ dw_hdmi_connector_detect(struct drm_connector *connector, bool force) struct dw_hdmi_qp *hdmi = container_of(connector, struct dw_hdmi_qp, connector); struct dw_hdmi_qp *secondary = NULL; + struct drm_display_mode *mode; enum drm_connector_status result, result_secondary; mutex_lock(&hdmi->mutex); @@ -2659,8 +2660,12 @@ out: extcon_set_state_sync(hdmi->extcon, EXTCON_DISP_HDMI, true); handle_plugged_change(hdmi, true); } else { - if (!hdmi->next_bridge) + if (!hdmi->next_bridge) { drm_connector_update_edid_property(&hdmi->connector, NULL); + list_for_each_entry(mode, &hdmi->connector.modes, head) + mode->status = MODE_STALE; + drm_mode_prune_invalid(hdmi->connector.dev, &hdmi->connector.modes, false); + } extcon_set_state_sync(hdmi->extcon, EXTCON_DISP_HDMI, false); handle_plugged_change(hdmi, false); } From b68d0098b23e111097b3b308136de8212e15ecdf Mon Sep 17 00:00:00 2001 From: Xiao Lin Date: Fri, 11 Jul 2025 10:11:55 +0800 Subject: [PATCH 03/10] rtc: s35390a: fix the issue where the alarm clock interruption cannot be triggered The alarm clock failed to register the interrupt handling function properly, resulting in the alarm clock being unable to report the alarm event to the framework layer Change-Id: Ie683776238255740badb1dcd83b56390c79dff05 Signed-off-by: Xiao Lin --- drivers/rtc/rtc-s35390a.c | 51 +++++++++++++++++++++++++++++++++++++++ 1 file changed, 51 insertions(+) diff --git a/drivers/rtc/rtc-s35390a.c b/drivers/rtc/rtc-s35390a.c index fb0e0c36131c..dc3248ffa3cc 100644 --- a/drivers/rtc/rtc-s35390a.c +++ b/drivers/rtc/rtc-s35390a.c @@ -468,6 +468,45 @@ static const struct rtc_class_ops s35390a_rtc_ops = { .ioctl = s35390a_rtc_ioctl, }; +static irqreturn_t s35390a_irq(int irq, void *dev_id) +{ + int err; + char sts = 0; + char status1; + struct s35390a *s35390a = (struct s35390a *)dev_id; + struct i2c_client *client = s35390a->client[0]; + + rtc_lock(s35390a->rtc); + + err = s35390a_read_status(s35390a, &status1); + if (err < 0) { + dev_err(&client->dev, "read status failure\n"); + goto out; + } + + if (status1 & S35390A_FLAG_INT2) { + /* clear pending interrupt (in STATUS1 only), if any */ + err = s35390a_get_reg(s35390a, S35390A_CMD_STATUS1, &sts, sizeof(sts)); + if (err < 0) { + dev_err(&client->dev, "read S35390A_CMD_STATUS1 failure\n"); + goto out; + } + + sts = S35390A_INT2_MODE_NOINTR | S35390A_INT2_MODE_32K; + + /* disable interrupt */ + err = s35390a_set_reg(s35390a, S35390A_CMD_STATUS2, &sts, sizeof(sts)); + if (err < 0) { + dev_err(&client->dev, "clear interrupt failure\n"); + goto out; + } + rtc_update_irq(s35390a->rtc, 1, RTC_AF); + } +out: + rtc_unlock(s35390a->rtc); + return IRQ_HANDLED; +} + static int s35390a_probe(struct i2c_client *client) { int err, err_read; @@ -546,6 +585,18 @@ static int s35390a_probe(struct i2c_client *client) set_bit(RTC_FEATURE_ALARM_RES_MINUTE, s35390a->rtc->features); clear_bit(RTC_FEATURE_UPDATE_INTERRUPT, s35390a->rtc->features ); + if (client->irq > 0) { + err = devm_request_threaded_irq(&client->dev, client->irq, + NULL, s35390a_irq, + IRQF_TRIGGER_LOW | IRQF_ONESHOT, + client->name, s35390a); + if (err < 0) { + dev_err(&client->dev, "irq %d request failed, %d\n", + client->irq, err); + return err; + } + } + if (status1 & S35390A_FLAG_INT2) rtc_update_irq(s35390a->rtc, 1, RTC_AF); From a32d290ab851600c8a9cdf79f088d5f446451a2c Mon Sep 17 00:00:00 2001 From: Zefa Chen Date: Thu, 10 Jul 2025 18:09:35 +0800 Subject: [PATCH 04/10] media: rockchip: vicap fixes size error of rgb888 Change-Id: I695e906bb07e62fb79348d15fe522cd06f506cad Signed-off-by: Zefa Chen --- drivers/media/platform/rockchip/cif/capture.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/media/platform/rockchip/cif/capture.c b/drivers/media/platform/rockchip/cif/capture.c index d249d2660127..4da7b20ffd6d 100644 --- a/drivers/media/platform/rockchip/cif/capture.c +++ b/drivers/media/platform/rockchip/cif/capture.c @@ -4058,7 +4058,7 @@ static int rkcif_csi_channel_init(struct rkcif_stream *stream, channel->fmt_val == CSI_WRDDR_TYPE_RGB565) channel->width = channel->width * fmt->bpp[0] / 8; - if (channel->fmt_val == CSI_WRDDR_TYPE_RGB888) + if (channel->fmt_val == CSI_WRDDR_TYPE_RGB888 && dev->chip_id < CHIP_RK3576_CIF) channel->width /= 2; /* * rk cif don't support output yuyv fmt data @@ -11218,7 +11218,7 @@ static void rkcif_dynamic_crop(struct rkcif_stream *stream) mbus->type == V4L2_MBUS_CCP2) { struct csi_channel_info *channel = &cif_dev->channels[stream->id]; - if (channel->fmt_val == CSI_WRDDR_TYPE_RGB888) + if (channel->fmt_val == CSI_WRDDR_TYPE_RGB888 && cif_dev->chip_id < CHIP_RK3576_CIF) crop_x = 3 * stream->crop[CROP_SRC_ACT].left / 2; else if (channel->fmt_val == CSI_WRDDR_TYPE_RGB565) crop_x = 2 * stream->crop[CROP_SRC_ACT].left; From b3d69d6c0394385640b3fa92e4734d114d4ffbd4 Mon Sep 17 00:00:00 2001 From: Liang Chen Date: Wed, 9 Jul 2025 15:18:40 +0800 Subject: [PATCH 05/10] arm64: dts: rockchip: rv1126b: adjust opp-supported-hw for npu Change-Id: Ib151747c2f9f848401ecad9fddea059b4749a4cc Signed-off-by: Liang Chen --- arch/arm64/boot/dts/rockchip/rv1126b.dtsi | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/arch/arm64/boot/dts/rockchip/rv1126b.dtsi b/arch/arm64/boot/dts/rockchip/rv1126b.dtsi index b6b931ef72af..76a69b31842d 100644 --- a/arch/arm64/boot/dts/rockchip/rv1126b.dtsi +++ b/arch/arm64/boot/dts/rockchip/rv1126b.dtsi @@ -3337,24 +3337,24 @@ opp-microvolt-L1 = <875000 875000 1050000>; }; opp-700000000 { - opp-supported-hw = <0xf7 0xffff>; + opp-supported-hw = <0xff 0xffff>; opp-hz = /bits/ 64 <700000000>; opp-microvolt = <850000 850000 1050000>; opp-microvolt-L0 = <900000 900000 1050000>; opp-microvolt-L1 = <875000 875000 1050000>; }; opp-800000000 { - opp-supported-hw = <0xf7 0xffff>; + opp-supported-hw = <0xff 0xffff>; opp-hz = /bits/ 64 <800000000>; opp-microvolt = <925000 925000 1050000>; }; opp-900000000 { - opp-supported-hw = <0xf7 0xffff>; + opp-supported-hw = <0xff 0xffff>; opp-hz = /bits/ 64 <900000000>; opp-microvolt = <975000 975000 1050000>; }; opp-950000000 { - opp-supported-hw = <0xf7 0xffff>; + opp-supported-hw = <0xff 0xffff>; opp-hz = /bits/ 64 <950000000>; opp-microvolt = <975000 975000 1050000>; opp-microvolt-L0 = <1000000 1000000 1050000>; From e91e88fce45619b433dfb5974122655617528075 Mon Sep 17 00:00:00 2001 From: Liang Chen Date: Wed, 9 Jul 2025 15:24:37 +0800 Subject: [PATCH 06/10] arm64: dts: rockchip: rv1126bp: set init-freq to 600M for npu Change-Id: I535100d95276518ed4df3afba5fbc50d0f37fb72 Signed-off-by: Liang Chen --- arch/arm64/boot/dts/rockchip/rv1126bp.dtsi | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rv1126bp.dtsi b/arch/arm64/boot/dts/rockchip/rv1126bp.dtsi index 627df949fcf3..509cb0fc6888 100644 --- a/arch/arm64/boot/dts/rockchip/rv1126bp.dtsi +++ b/arch/arm64/boot/dts/rockchip/rv1126bp.dtsi @@ -8,6 +8,10 @@ / { }; +&npu_opp_table { + rockchip,init-freq = <600000>; +}; + &rgb { /* * RV1126 compatible pin output mode 0. From 4924db663092aae8aa52ab56c963e1a6b7c7062e Mon Sep 17 00:00:00 2001 From: Sandy Huang Date: Wed, 9 Jul 2025 16:28:43 +0800 Subject: [PATCH 07/10] drm/rockchip: vop2: only esmart/cluster win0 need to manage done bit The esmart and cluster sub win done bit is controlled by one bit, and we must use win0 first, so only esmart/cluster win0 need to manage done bit. Fixes: fc46321d50a7 ("drm/rockchip: vop2: add support reserved plane display") Signed-off-by: Sandy Huang Change-Id: I16e16e6b4169f29232dde94c925680e6d44ab3f5 --- drivers/gpu/drm/rockchip/rockchip_drm_vop2.c | 22 +++++++++++++------- 1 file changed, 14 insertions(+), 8 deletions(-) diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c b/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c index 4222fc27bc75..2c1b41c5e093 100644 --- a/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c +++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c @@ -1112,6 +1112,8 @@ static inline void rk3588_vop2_dsc_cfg_done(struct drm_crtc *crtc); static inline void vop2_cfg_done(struct drm_crtc *crtc); static void vop2_wait_for_fs_by_done_bit_status(struct vop2_video_port *vp); static int vop2_clk_reset(struct reset_control *rstc); +static inline bool vop2_cluster_sub_window(struct vop2_win *win); +static inline bool vop2_multi_area_sub_window(struct vop2_win *win); static void vop2_wait_for_scan_timing_max_to_assigned_line(struct vop2_video_port *vp, u32 current_line, u32 wait_line); @@ -2285,14 +2287,17 @@ static void vop2_win_disable(struct vop2_win *win, bool skip_splice_win) } } - vp_id = ffs(win->vp_mask) - 1; - if (vp_id >= ROCKCHIP_MAX_CRTC) { - DRM_ERROR("Unsupported vp_id: %d\n", vp_id); - return; + if (!vop2_cluster_sub_window(win) && !vop2_multi_area_sub_window(win)) { + vp_id = ffs(win->vp_mask) - 1; + if (vp_id >= ROCKCHIP_MAX_CRTC) { + DRM_ERROR("%s unsupported vp_id: %d, win->vp_mask:0x%x\n", + win->name, vp_id, win->vp_mask); + return; + } + vp = &vop2->vps[vp_id]; + if (vp->reserved_plane_phy_id != ROCKCHIP_VOP2_PHY_ID_INVALID) + vp->win_cfg_done_bits |= BIT(win->reg_done_bit); } - vp = &vop2->vps[vp_id]; - if (vp->reserved_plane_phy_id != ROCKCHIP_VOP2_PHY_ID_INVALID) - vp->win_cfg_done_bits |= BIT(win->reg_done_bit); } if (win->left_win && win->splice_mode_right) { @@ -7164,7 +7169,8 @@ static void vop2_win_atomic_update(struct vop2_win *win, struct drm_rect *src, s VOP_CLUSTER_SET(vop2, win, frm_reset_en, 1); VOP_CLUSTER_SET(vop2, win, dma_stride_4k_disable, 1); } - vp->win_cfg_done_bits |= BIT(win->reg_done_bit); + if (!vop2_cluster_sub_window(win) && !vop2_multi_area_sub_window(win)) + vp->win_cfg_done_bits |= BIT(win->reg_done_bit); spin_unlock(&vop2->reg_lock); } From 9b1fbae3960d62b1dfbb4e31a20bb4775ffcc60c Mon Sep 17 00:00:00 2001 From: Algea Cao Date: Wed, 30 Apr 2025 15:37:20 +0800 Subject: [PATCH 08/10] drm/bridge: synopsys: dw-hdmi-qp: Fix hdmi is enabled twice during boot If hdmi uboot logo is disabled and hdmi resolution is HDMI 2.0 resolution(such as 4k60), hdmi->logo_plug_out will be set to true and won't be clear before hdmi is enabled. After hdmi is enabled, hdmi->disabled is set to false, and then mode_changed is set to true. hdmi will be disabled and enabled again. hdmi->logo_plug_out is mainly used to determine whether hdmi has been plugged from the end of uboot to the completion of kernel driver initialization when the uboot logo is enabled. So when setting it to true, it is necessary to determine whether the uboot logo is enabled. Change-Id: I1256f7d5e531dcb3e3ed8209a7839019aadef32e Signed-off-by: Algea Cao --- drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c b/drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c index b0e295235ee5..88b11021aede 100644 --- a/drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c +++ b/drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c @@ -3408,7 +3408,8 @@ static int dw_hdmi_connector_atomic_check(struct drm_connector *connector, drm_scdc_readb(hdmi->ddc, SCDC_TMDS_CONFIG, &val); /* if plug out before hdmi bind, reset hdmi */ if (vmode->mtmdsclock >= 340000000 && vmode->mpixelclock <= 600000000 && - !(val & SCDC_TMDS_BIT_CLOCK_RATIO_BY_40) && !hdmi->force_kernel_output) + !(val & SCDC_TMDS_BIT_CLOCK_RATIO_BY_40) && !hdmi->force_kernel_output && + hdmi->initialized) hdmi->logo_plug_out = true; } From 0642495196883a7b74ed78bdd93265af7645b53d Mon Sep 17 00:00:00 2001 From: Liang Chen Date: Thu, 18 Jul 2024 19:48:34 +0800 Subject: [PATCH 09/10] ARM: configs: add rockchip_rt.config for PREEMPT_RT Signed-off-by: Liang Chen Change-Id: If4b3ed245a4f0f4a207409fcb42d3430cbe26dbe --- arch/arm/configs/rockchip_rt.config | 31 +++++++++++++++++++++++++++++ 1 file changed, 31 insertions(+) create mode 100644 arch/arm/configs/rockchip_rt.config diff --git a/arch/arm/configs/rockchip_rt.config b/arch/arm/configs/rockchip_rt.config new file mode 100644 index 000000000000..a243dd87e0e7 --- /dev/null +++ b/arch/arm/configs/rockchip_rt.config @@ -0,0 +1,31 @@ +# CONFIG_ARM_PSCI_CPUIDLE is not set +# CONFIG_ARM_ROCKCHIP_DMC_DEVFREQ is not set +# CONFIG_CGROUP_CPUACCT is not set +# CONFIG_CGROUP_SCHED is not set +# CONFIG_CPU_FREQ_TIMES is not set +# CONFIG_CPU_FREQ_THERMAL is not set +# CONFIG_DEBUG_SPINLOCK is not set +# CONFIG_FTRACE is not set +# CONFIG_IRQ_TIME_ACCOUNTING is not set +# CONFIG_MALI_BIFROST_ENABLE_TRACE is not set +# CONFIG_MALI_BIFROST_SYSTEM_TRACE is not set +# CONFIG_PSI is not set +# CONFIG_PERF_EVENTS is not set +# CONFIG_PROFILING is not set +# CONFIG_SCHED_DEBUG is not set +# CONFIG_SCHED_INFO is not set +# CONFIG_SWAP is not set +# CONFIG_TASKSTATS is not set +# CONFIG_ZRAM is not set +# CONFIG_ARM_PATCH_PHYS_VIRT is not set +# CONFIG_ARCH_MULTIPLATFORM is not set +# CONFIG_VMAP_STACK is not set +# CONFIG_HARDEN_BRANCH_PREDICTOR is not set +# CONFIG_HARDEN_BRANCH_HISTORY is not set +# CONFIG_COMPACTION is not set +# CONFIG_MIGRATION is not set +CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y +CONFIG_HZ_PERIODIC=y +CONFIG_HZ_1000=y +CONFIG_PREEMPT_RT=y +CONFIG_VDSO=y From b611ab7090264b5a01181aa21a436f4bce2ef9bc Mon Sep 17 00:00:00 2001 From: Liang Chen Date: Tue, 4 Jul 2023 11:47:16 +0800 Subject: [PATCH 10/10] arm64: configs: optimize latency for PREEMPT_RT Change-Id: I463d66d69d8ab45435511265d0b977040bc26dac Signed-off-by: Liang Chen --- arch/arm64/configs/rockchip_rt.config | 24 ++++++++++++++++++++++-- 1 file changed, 22 insertions(+), 2 deletions(-) diff --git a/arch/arm64/configs/rockchip_rt.config b/arch/arm64/configs/rockchip_rt.config index ff2a28322cf8..4bd3742c625e 100644 --- a/arch/arm64/configs/rockchip_rt.config +++ b/arch/arm64/configs/rockchip_rt.config @@ -1,5 +1,25 @@ -# CONFIG_ARM_ROCKCHIP_DMC_DEVFREQ is not set # CONFIG_ARM_PSCI_CPUIDLE is not set +# CONFIG_ARM_ROCKCHIP_DMC_DEVFREQ is not set +# CONFIG_CGROUP_CPUACCT is not set +# CONFIG_CGROUP_SCHED is not set # CONFIG_CPU_FREQ_TIMES is not set -CONFIG_NO_HZ_FULL=y +# CONFIG_CPU_FREQ_THERMAL is not set +# CONFIG_DEBUG_SPINLOCK is not set +# CONFIG_FTRACE is not set +# CONFIG_IRQ_TIME_ACCOUNTING is not set +# CONFIG_MALI_BIFROST_ENABLE_TRACE is not set +# CONFIG_MALI_BIFROST_SYSTEM_TRACE is not set +# CONFIG_PSI is not set +# CONFIG_PERF_EVENTS is not set +# CONFIG_PROFILING is not set +# CONFIG_SCHED_DEBUG is not set +# CONFIG_SCHED_INFO is not set +# CONFIG_SWAP is not set +# CONFIG_TASKSTATS is not set +# CONFIG_ZRAM is not set +# CONFIG_MIGRATION is not set +CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y +CONFIG_JUMP_LABEL=y +CONFIG_HZ_PERIODIC=y +CONFIG_HZ_1000=y CONFIG_PREEMPT_RT=y