dv: The first frame is abnormal when play video [1/1]

PD#SWPL-6480

Problem:
core1 reg is set wrong for g12 and tm2

Solution:
correct core1 reg for g12 and tm2

Verify:
verified by u212

Change-Id: Ie9de107fce6f23ded1397827ebe95a00939df8c1
Signed-off-by: yao liu <yao.liu@amlogic.com>
This commit is contained in:
yao liu
2019-05-17 17:32:59 +08:00
committed by Chris KIM
parent 1cf0552cdf
commit 1122e2b690

View File

@@ -2002,7 +2002,7 @@ static int dolby_core1_set(
}
if (dolby_vision_on_count
<= dolby_vision_run_mode_delay) {
< dolby_vision_run_mode_delay) {
VSYNC_WR_DV_REG(
VPP_VD1_CLIP_MISC0,
(0x200 << 10) | 0x200);
@@ -3228,18 +3228,30 @@ void enable_dolby_vision(int enable)
if (!dolby_vision_core1_on
&& (dolby_vision_mask & 1)
&& dovi_setting_video_flag) {
VSYNC_WR_DV_REG_BITS(
VIU_MISC_CTRL1,
0,
16, 1); /* core1 */
if (is_meson_g12() || is_meson_tm2_stbmode())
VSYNC_WR_DV_REG_BITS(
DOLBY_PATH_CTRL,
/* enable core1 */
0, 0, 1);
else
VSYNC_WR_DV_REG_BITS(
VIU_MISC_CTRL1,
0,
16, 1); /* core1 */
dolby_vision_core1_on = true;
} else if (dolby_vision_core1_on
&& (!(dolby_vision_mask & 1)
|| !dovi_setting_video_flag)){
VSYNC_WR_DV_REG_BITS(
VIU_MISC_CTRL1,
1,
16, 1); /* core1 */
|| !dovi_setting_video_flag)) {
if (is_meson_g12() || is_meson_tm2_stbmode())
VSYNC_WR_DV_REG_BITS(
DOLBY_PATH_CTRL,
/* disable core1 */
1, 0, 1);
else
VSYNC_WR_DV_REG_BITS(
VIU_MISC_CTRL1,
1,
16, 1); /* core1 */
dolby_vision_core1_on = false;
}
}