drm/rockchip: dw_hdmi: use crtc_clock as vpll clock rate

adjusted_mode.crtc_clock is the real pixel clock rate.

Change-Id: Iac242b89e3144bc53c40170c2cec0c0913ef6ee0
Signed-off-by: Zheng Yang <zhengyang@rock-chips.com>
This commit is contained in:
Zheng Yang
2017-02-24 14:56:40 +08:00
committed by Huang, Tao
parent cc81ed9f9b
commit 1300b43673

View File

@@ -285,7 +285,9 @@ static void dw_hdmi_rockchip_encoder_enable(struct drm_encoder *encoder)
if (WARN_ON(!crtc || !crtc->state))
return;
clk_set_rate(hdmi->vpll_clk, crtc->state->adjusted_mode.clock * 1000);
clk_set_rate(hdmi->vpll_clk,
crtc->state->adjusted_mode.crtc_clock * 1000);
switch (hdmi->dev_type) {
case RK3288_HDMI: