arm64: dts: rockchip: rk3368: add hdmi node

Change-Id: I7c9a7a0a2befb6635f7b77c0c779a3420e9f3e7b
Signed-off-by: Zheng Yang <zhengyang@rock-chips.com>
This commit is contained in:
Zheng Yang
2016-02-15 16:48:01 +08:00
committed by Huang, Tao
parent fc7ae0478f
commit 13aef9979a

View File

@@ -1024,6 +1024,19 @@
};
};
hdmi_i2c {
hdmii2c_xfer: hdmii2c-xfer {
rockchip,pins = <3 26 RK_FUNC_1 &pcfg_pull_none>,
<3 27 RK_FUNC_1 &pcfg_pull_none>;
};
};
hdmi_pin {
hdmi_cec: hdmi-cec {
rockchip,pins = <3 23 RK_FUNC_1 &pcfg_pull_none>;
};
};
i2c0 {
i2c0_xfer: i2c0-xfer {
rockchip,pins = <0 6 RK_FUNC_1 &pcfg_pull_none>,
@@ -1064,6 +1077,10 @@
rockchip,pins = <3 26 RK_FUNC_2 &pcfg_pull_none>,
<3 27 RK_FUNC_2 &pcfg_pull_none>;
};
i2c5_gpio: i2c5-gpio {
rockchip,pins = <3 26 RK_FUNC_GPIO &pcfg_pull_none>,
<3 27 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
i2s {
@@ -1475,6 +1492,23 @@
status = "disabled";
};
hdmi: hdmi@ff980000 {
compatible = "rockchip,rk3368-hdmi";
reg = <0x0 0xff980000 0x0 0x20000>;
interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_HDMI_CTRL>,
<&cru SCLK_HDMI_HDCP>,
<&cru SCLK_HDMI_CEC>;
clock-names = "pclk_hdmi", "hdcp_clk_hdmi", "cec_clk_hdmi";
/*power-domains = <&power PD_VIO>;*/
resets = <&cru SRST_HDMI>;
reset-names = "hdmi";
pinctrl-names = "default", "gpio";
pinctrl-0 = <&hdmii2c_xfer &hdmi_cec>;
pinctrl-1 = <&i2c5_gpio>;
status = "disabled";
};
iep_mmu: iep-mmu {
dbgname = "iep";
compatible = "rockchip,iep_mmu";