diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c b/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c
index 2b7cd013cd60..722865a68aba 100644
--- a/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c
+++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c
@@ -5407,14 +5407,14 @@ vop2_crtc_mode_valid(struct drm_crtc *crtc, const struct drm_display_mode *mode)
 	if (mode->flags & DRM_MODE_FLAG_DBLCLK)
 		request_clock *= 2;
 
-	if (request_clock <= VOP2_MAX_DCLK_RATE) {
-		if (vop2_extend_clk_find_by_name(vop2, "hdmi0_phy_pll") ||
-		    vop2_extend_clk_find_by_name(vop2, "hdmi1_phy_pll"))
-			clock = request_clock;
-		else
-			clock = clk_round_rate(vp->dclk, request_clock * 1000) / 1000;
-	} else {
+	if ((request_clock <= VOP2_MAX_DCLK_RATE) &&
+	    (vop2_extend_clk_find_by_name(vop2, "hdmi0_phy_pll") ||
+	     vop2_extend_clk_find_by_name(vop2, "hdmi1_phy_pll"))) {
 		clock = request_clock;
+	} else {
+		if (request_clock > VOP2_MAX_DCLK_RATE)
+			request_clock = request_clock >> 2;
+		clock = clk_round_rate(vp->dclk, request_clock * 1000) / 1000;
 	}
 
 	/*
@@ -5955,8 +5955,10 @@ static int vop2_calc_if_clk(struct drm_crtc *crtc, const struct vop2_connector_i
 			if (vcstate->output_mode == ROCKCHIP_OUT_MODE_YUV420 ||
 			    (vcstate->output_flags & ROCKCHIP_OUTPUT_DUAL_CHANNEL_LEFT_RIGHT_MODE))
 				v_pixclk = v_pixclk >> 1;
-			clk_set_rate(dclk->hw.clk, v_pixclk);
+		} else {
+			v_pixclk = v_pixclk >> 2;
 		}
+		clk_set_rate(dclk->hw.clk, v_pixclk);
 	}
 
 	if (vcstate->dsc_enable) {