From 158114da5ce63fbb4d4ec7fbcca70f1328742c10 Mon Sep 17 00:00:00 2001
From: Finley Xiao <finley.xiao@rock-chips.com>
Date: Wed, 7 Mar 2018 16:49:18 +0800
Subject: [PATCH] clk: rockchip: px30: Make pll_npll critical

Change-Id: I14c44b2a467c58f2285afe6219add2c51e1c66eb
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
---
 drivers/clk/rockchip/clk-px30.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/clk/rockchip/clk-px30.c b/drivers/clk/rockchip/clk-px30.c
index dcb5e75804f5..7a60c382e53f 100644
--- a/drivers/clk/rockchip/clk-px30.c
+++ b/drivers/clk/rockchip/clk-px30.c
@@ -925,6 +925,7 @@ static const char *const px30_pmucru_critical_clocks[] __initconst = {
 	"pclk_top_pre",
 	"pclk_pmu_pre",
 	"hclk_usb_niu",
+	"pll_npll",
 };
 
 static void __iomem *px30_cru_base;