From 15fdfc37fadd53733dba85434dcea74c52c85356 Mon Sep 17 00:00:00 2001 From: Wyon Bi Date: Sat, 11 Jun 2022 09:07:03 +0000 Subject: [PATCH] drm/rockchip: dw-dp: Add DP PHY max_link_rate limit Signed-off-by: Wyon Bi Change-Id: I2f4522af3b997cb0c3a6209bbe142e550782e2fc --- drivers/gpu/drm/rockchip/dw-dp.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/rockchip/dw-dp.c b/drivers/gpu/drm/rockchip/dw-dp.c index 152c8695c334..23ccaf056431 100644 --- a/drivers/gpu/drm/rockchip/dw-dp.c +++ b/drivers/gpu/drm/rockchip/dw-dp.c @@ -871,7 +871,8 @@ static int dw_dp_link_probe(struct dw_dp *dp) !!(dpcd & DP_VSC_SDP_EXT_FOR_COLORIMETRY_SUPPORTED); link->revision = link->dpcd[DP_DPCD_REV]; - link->rate = drm_dp_max_link_rate(link->dpcd); + link->rate = min_t(u32, dp->phy->attrs.max_link_rate * 100, + drm_dp_max_link_rate(link->dpcd)); link->lanes = min_t(u8, phy_get_bus_width(dp->phy), drm_dp_max_lane_count(link->dpcd));