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ARM64: dts: rockchip: rk3366: add initial clock rate for plls

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Change-Id: I9ea6bcac10a7b67471613aea3ea41aff44a8fe34
Signed-off-by: Feng Xiao <xf@rock-chips.com>
This commit is contained in:
Feng Xiao
2016-03-02 23:15:31 +08:00
committed by Huang, Tao
parent 764276eeef
commit 16a036448a
1 changed files with 8 additions and 0 deletions
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8
arch/arm64/boot/dts/rockchip/rk3366.dtsi
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@@ -545,6 +545,14 @@
rockchip,grf = <&grf>;
#clock-cells = <1>;
#reset-cells = <1>;
assigned-clocks =
<&cru PLL_CPLL>, <&cru PLL_GPLL>,
<&cru PLL_NPLL>, <&cru PLL_MPLL>,
<&cru PLL_WPLL>, <&cru PLL_BPLL>;
assigned-clock-rates =
<750000000>, <576000000>,
<594000000>, <594000000>,
<480000000>, <520000000>;
};
grf: syscon@ff770000 {