From 17e8848752dfeae49f8441e9e1a45fca24b4e8bf Mon Sep 17 00:00:00 2001 From: Jon Lin Date: Fri, 6 Jan 2023 10:00:42 +0800 Subject: [PATCH] PCI: rockchip: dw: Add mask for the irq handler DMA interrupt status When the DMA interrupt masked, the conresbonding DMA interrupt stastus should be ignored in the interrupt handler. Change-Id: I76a2b8bef08e024f76792c765150c3e5a0ff804e Signed-off-by: Jon Lin --- drivers/pci/controller/dwc/pcie-dw-ep-rockchip.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/drivers/pci/controller/dwc/pcie-dw-ep-rockchip.c b/drivers/pci/controller/dwc/pcie-dw-ep-rockchip.c index b0215077026f..17cd0818ad75 100644 --- a/drivers/pci/controller/dwc/pcie-dw-ep-rockchip.c +++ b/drivers/pci/controller/dwc/pcie-dw-ep-rockchip.c @@ -600,7 +600,7 @@ static irqreturn_t rockchip_pcie_sys_irq_handler(int irq, void *arg) u32 chn; union int_status status; union int_clear clears; - u32 reg, val; + u32 reg, val, mask; /* ELBI helper, only check the valid bits, and discard the rest interrupts */ dlbi_reg = dw_pcie_readl_dbi(pci, PCIE_ELBI_LOCAL_BASE + PCIE_ELBI_APP_ELBI_INT_GEN0); @@ -612,8 +612,8 @@ static irqreturn_t rockchip_pcie_sys_irq_handler(int irq, void *arg) rockchip_pcie_elbi_clear(rockchip); /* DMA helper */ - status.asdword = dw_pcie_readl_dbi(pci, PCIE_DMA_OFFSET + - PCIE_DMA_WR_INT_STATUS); + mask = dw_pcie_readl_dbi(pci, PCIE_DMA_OFFSET + PCIE_DMA_WR_INT_MASK); + status.asdword = dw_pcie_readl_dbi(pci, PCIE_DMA_OFFSET + PCIE_DMA_WR_INT_STATUS) & (~mask); for (chn = 0; chn < PCIE_DMA_CHANEL_MAX_NUM; chn++) { if (status.donesta & BIT(chn)) { clears.doneclr = 0x1 << chn; @@ -631,8 +631,8 @@ static irqreturn_t rockchip_pcie_sys_irq_handler(int irq, void *arg) } } - status.asdword = dw_pcie_readl_dbi(pci, PCIE_DMA_OFFSET + - PCIE_DMA_RD_INT_STATUS); + mask = dw_pcie_readl_dbi(pci, PCIE_DMA_OFFSET + PCIE_DMA_RD_INT_MASK); + status.asdword = dw_pcie_readl_dbi(pci, PCIE_DMA_OFFSET + PCIE_DMA_RD_INT_STATUS) & (~mask); for (chn = 0; chn < PCIE_DMA_CHANEL_MAX_NUM; chn++) { if (status.donesta & BIT(chn)) { clears.doneclr = 0x1 << chn;