diff --git a/arch/arm/boot/dts/rv1126.dtsi b/arch/arm/boot/dts/rv1126.dtsi
index 03409cd01347..ace03aea9883 100644
--- a/arch/arm/boot/dts/rv1126.dtsi
+++ b/arch/arm/boot/dts/rv1126.dtsi
@@ -1289,6 +1289,23 @@
 		npu_leakage: npu-leakage@19 {
 			reg = <0x19 0x1>;
 		};
+		cpu_tsadc_trim_l: cpu-tsadc-trim-l@23 {
+			reg = <0x23 0x1>;
+		};
+		cpu_tsadc_trim_h: cpu-tsadc-trim-h@24 {
+			reg = <0x24 0x1>;
+			bits = <0 4>;
+		};
+		npu_tsadc_trim_l: npu-tsadc-trim-l@25 {
+			reg = <0x25 0x1>;
+		};
+		npu_tsadc_trim_h: npu-tsadc-trim-h@26 {
+			reg = <0x26 0x1>;
+			bits = <0 4>;
+		};
+		tsadc_trim_base: tsadc-trim-base@27 {
+			reg = <0x27 0x1>;
+		};
 	};
 
 	saradc: saradc@ff5e0000 {
@@ -1318,6 +1335,8 @@
 		reset-names = "tsadc-apb", "tsadc", "tsadc-phy";
 		rockchip,hw-tshut-temp = <120000>;
 		#thermal-sensor-cells = <1>;
+		nvmem-cells = <&cpu_tsadc_trim_l>, <&cpu_tsadc_trim_h>, <&tsadc_trim_base>;
+		nvmem-cell-names = "trim_l", "trim_h", "trim_base";
 		status = "disabled";
 	};
 
@@ -1336,6 +1355,8 @@
 		reset-names = "tsadc-apb", "tsadc", "tsadc-phy";
 		rockchip,hw-tshut-temp = <120000>;
 		#thermal-sensor-cells = <1>;
+		nvmem-cells = <&npu_tsadc_trim_l>, <&npu_tsadc_trim_h>, <&tsadc_trim_base>;
+		nvmem-cell-names = "trim_l", "trim_h", "trim_base";
 		status = "disabled";
 	};