diff --git a/arch/arm64/boot/dts/rockchip/overlays/odroidm1/Makefile b/arch/arm64/boot/dts/rockchip/overlays/odroidm1/Makefile
index cfda2a50a5e7..20010401ba2d 100644
--- a/arch/arm64/boot/dts/rockchip/overlays/odroidm1/Makefile
+++ b/arch/arm64/boot/dts/rockchip/overlays/odroidm1/Makefile
@@ -1,5 +1,15 @@
 # Overlays for the Odroid platform
 
+dtbo-$(CONFIG_ARCH_ROCKCHIP_ODROIDM1) += \
+	i2c0.dtbo \
+	i2c1.dtbo \
+	pwm1.dtbo \
+	pwm2.dtbo \
+	pwm9.dtbo \
+	spi0.dtbo \
+	uart0-with-ctsrts.dtbo \
+	uart0.dtbo \
+	uart1.dtbo
 
 targets += $(dtbo-y)
 always := $(dtbo-y)
diff --git a/arch/arm64/boot/dts/rockchip/overlays/odroidm1/i2c0.dts b/arch/arm64/boot/dts/rockchip/overlays/odroidm1/i2c0.dts
new file mode 100644
index 000000000000..a6942df06650
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/overlays/odroidm1/i2c0.dts
@@ -0,0 +1,14 @@
+/dts-v1/;
+/plugin/;
+
+/ {
+	fragment@0 {
+		// i2c3 aliased with i2c0.
+		// This activates i2c3 but it will be named as i2c0 on the userspace.
+		target = <&i2c3>;
+
+		__overlay__ {
+			status = "okay";
+		};
+	};
+};
diff --git a/arch/arm64/boot/dts/rockchip/overlays/odroidm1/i2c1.dts b/arch/arm64/boot/dts/rockchip/overlays/odroidm1/i2c1.dts
new file mode 100644
index 000000000000..7cb8b7971e41
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/overlays/odroidm1/i2c1.dts
@@ -0,0 +1,12 @@
+/dts-v1/;
+/plugin/;
+
+/ {
+	fragment@0 {
+		target = <&i2c1>;
+
+		__overlay__ {
+			status = "okay";
+		};
+	};
+};
\ No newline at end of file
diff --git a/arch/arm64/boot/dts/rockchip/overlays/odroidm1/pwm1.dts b/arch/arm64/boot/dts/rockchip/overlays/odroidm1/pwm1.dts
new file mode 100644
index 000000000000..0b78ad96ba8b
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/overlays/odroidm1/pwm1.dts
@@ -0,0 +1,13 @@
+/dts-v1/;
+/plugin/;
+
+/ {
+	fragment@0 {
+		// pwmchip0, pwm@fdd70010
+		target = <&pwm1>;
+
+		__overlay__ {
+			status = "okay";
+		};
+	};
+};
diff --git a/arch/arm64/boot/dts/rockchip/overlays/odroidm1/pwm2.dts b/arch/arm64/boot/dts/rockchip/overlays/odroidm1/pwm2.dts
new file mode 100644
index 000000000000..c7f1898e5903
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/overlays/odroidm1/pwm2.dts
@@ -0,0 +1,13 @@
+/dts-v1/;
+/plugin/;
+
+/ {
+	fragment@0 {
+		// pwmchip1, pwm@fdd70020
+		target = <&pwm2>;
+
+		__overlay__ {
+			status = "okay";
+		};
+	};
+};
diff --git a/arch/arm64/boot/dts/rockchip/overlays/odroidm1/pwm9.dts b/arch/arm64/boot/dts/rockchip/overlays/odroidm1/pwm9.dts
new file mode 100644
index 000000000000..69a0165bfb8c
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/overlays/odroidm1/pwm9.dts
@@ -0,0 +1,13 @@
+/dts-v1/;
+/plugin/;
+
+/ {
+	fragment@0 {
+		// pwmchip3, pwm@fe6f0010
+		target = <&pwm9>;
+
+		__overlay__ {
+			status = "okay";
+		};
+	};
+};
\ No newline at end of file
diff --git a/arch/arm64/boot/dts/rockchip/overlays/odroidm1/spi0.dts b/arch/arm64/boot/dts/rockchip/overlays/odroidm1/spi0.dts
new file mode 100644
index 000000000000..e512300ffccd
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/overlays/odroidm1/spi0.dts
@@ -0,0 +1,22 @@
+/dts-v1/;
+/plugin/;
+
+/ {
+	fragment@0 {
+		target = <&spi0>;
+
+		__overlay__ {
+			status = "okay";
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			spidev: spidev@0 {
+				status = "okay";
+				compatible = "rockchip,spidev";
+				reg = <0>;
+				/* spi default max clock 100Mhz */
+				spi-max-frequency = <100000000>;
+			};
+		};
+	};
+};
diff --git a/arch/arm64/boot/dts/rockchip/overlays/odroidm1/uart0-with-ctsrts.dts b/arch/arm64/boot/dts/rockchip/overlays/odroidm1/uart0-with-ctsrts.dts
new file mode 100644
index 000000000000..fb855965f9ae
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/overlays/odroidm1/uart0-with-ctsrts.dts
@@ -0,0 +1,14 @@
+/dts-v1/;
+/plugin/;
+
+/ {
+	fragment@0 {
+		// uart1 aliased with serial0.
+		target = <&uart1>;
+
+		__overlay__ {
+			status = "okay";
+			pinctrl-names = "not_use_it", "default";
+		};
+	};
+};
diff --git a/arch/arm64/boot/dts/rockchip/overlays/odroidm1/uart0.dts b/arch/arm64/boot/dts/rockchip/overlays/odroidm1/uart0.dts
new file mode 100644
index 000000000000..e57ba5499820
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/overlays/odroidm1/uart0.dts
@@ -0,0 +1,13 @@
+/dts-v1/;
+/plugin/;
+
+/ {
+	fragment@0 {
+		// uart1 aliased with serial0.
+		target = <&uart1>;
+
+		__overlay__ {
+			status = "okay";
+		};
+	};
+};
diff --git a/arch/arm64/boot/dts/rockchip/overlays/odroidm1/uart1.dts b/arch/arm64/boot/dts/rockchip/overlays/odroidm1/uart1.dts
new file mode 100644
index 000000000000..cab55b10c0cc
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/overlays/odroidm1/uart1.dts
@@ -0,0 +1,15 @@
+/dts-v1/;
+/plugin/;
+
+/ {
+	fragment@0 {
+		// uart0 aliased with serial1.
+		target = <&uart0>;
+
+		__overlay__ {
+			status = "okay";
+
+			dma-names = "tx", "rx";
+		};
+	};
+};
\ No newline at end of file
diff --git a/arch/arm64/boot/dts/rockchip/rk3568-odroid-m1.dts b/arch/arm64/boot/dts/rockchip/rk3568-odroid-m1.dts
index 9097f5e259f6..b9bc207a9f7d 100644
--- a/arch/arm64/boot/dts/rockchip/rk3568-odroid-m1.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3568-odroid-m1.dts
@@ -152,6 +152,12 @@
 		"", "", "", "", "", "", "", "";
 };
 
+&i2c3 {
+	status = "disabled";
+	pinctrl-names = "default";
+	pinctrl-0 = <&i2c3m1_xfer>;
+};
+
 &pcie30phy {
 	status = "okay";
 };
@@ -162,6 +168,16 @@
 	status = "okay";
 };
 
+&pwm1 {
+	status = "disabled";
+	pinctrl-0 = <&pwm1m1_pins>;
+};
+
+&pwm2 {
+	status = "disabled";
+	pinctrl-0 = <&pwm2m1_pins>;
+};
+
 &sata2 {
 	status = "okay";
 };
@@ -172,3 +188,21 @@
 	pinctrl-names = "default";
 	pinctrl-0 = <&fspi_pins>;
 };
+
+&spi0 {
+	status = "disabled";
+
+	pinctrl-0 = <&spi0m1_pins>;
+	pinctrl-1 = <&spi0m1_pins_hs>;
+	num_chipselect = <1>;
+
+	cs-gpios = <&gpio2 RK_PD2 GPIO_ACTIVE_LOW>;
+};
+
+&uart1 {
+	status = "disabled";
+	dma-names = "tx", "rx";
+	/* uart1 uart1-with-ctsrts */
+	pinctrl-0 = <&uart1m1_xfer>;
+	pinctrl-1 = <&uart1m1_xfer &uart1m1_ctsn &uart1m1_rtsn>;
+};