From 19f0cc15dc270b9c9e1b3f1dd9ef4641d46982fa Mon Sep 17 00:00:00 2001
From: Algea Cao <algea.cao@rock-chips.com>
Date: Tue, 8 Mar 2022 17:39:20 +0800
Subject: [PATCH] arm64: dts: rockchip: rk630-rk3568-ddr3-v10: Add rk630 node

Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
Change-Id: Ifbf1e996886123aec8718f42388609f1373cddad
---
 .../dts/rockchip/rk630-rk3568-ddr3-v10.dts    | 20 +++++++++++++++++++
 1 file changed, 20 insertions(+)

diff --git a/arch/arm64/boot/dts/rockchip/rk630-rk3568-ddr3-v10.dts b/arch/arm64/boot/dts/rockchip/rk630-rk3568-ddr3-v10.dts
index 0b12177a0e52..92b7d3d4b52e 100644
--- a/arch/arm64/boot/dts/rockchip/rk630-rk3568-ddr3-v10.dts
+++ b/arch/arm64/boot/dts/rockchip/rk630-rk3568-ddr3-v10.dts
@@ -491,6 +491,26 @@
 	};
 };
 
+&i2c3 {
+	status = "okay";
+
+	rk630: rk630@51 {
+		reg = <0x51>;
+		interrupt-parent = <&gpio0>;
+		interrupts = <8 IRQ_TYPE_LEVEL_HIGH>;
+		reset-gpios = <&gpio3 RK_PC7 GPIO_ACTIVE_HIGH>;
+		clocks = <&cru CLK_MAC1_OUT>;
+		clock-names = "ref";
+		assigned-clocks = <&cru CLK_MAC1_OUT>;
+		assigned-clock-rates = <25000000>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&eth1m0_pins>;
+		status = "okay";
+	};
+};
+
+#include "rk630.dtsi"
+
 &pinctrl {
 	pmic {
 		pmic_int: pmic_int {