From 1a93d3ca2365eb355d1ec86f3b2cb60a986e2a7d Mon Sep 17 00:00:00 2001 From: Shawn Lin Date: Tue, 8 Jul 2025 15:16:43 +0800 Subject: [PATCH] phy: rockchip-snps-pcie3: increase sram init timeout It's reported that one of RK3568 boards could be timeout when doing s2r test. Increasing the timeout value solves the problem. At this time, reuse RK_PCIE_SRAM_INIT_TIMEOUT instead. Change-Id: I9a935104cf3cf6058d69181c4604749692292ff9 Signed-off-by: Shawn Lin --- drivers/phy/rockchip/phy-rockchip-snps-pcie3.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/phy/rockchip/phy-rockchip-snps-pcie3.c b/drivers/phy/rockchip/phy-rockchip-snps-pcie3.c index a370f8feff45..2933c6fdfb46 100644 --- a/drivers/phy/rockchip/phy-rockchip-snps-pcie3.c +++ b/drivers/phy/rockchip/phy-rockchip-snps-pcie3.c @@ -119,7 +119,7 @@ static int rockchip_p3phy_rk3568_init(struct rockchip_p3phy_priv *priv) ret = regmap_read_poll_timeout(priv->phy_grf, GRF_PCIE30PHY_STATUS0, reg, SRAM_INIT_DONE(reg), - 0, 500); + 0, RK_PCIE_SRAM_INIT_TIMEOUT); if (ret) { dev_err(&priv->phy->dev, "%s: lock failed 0x%x, check input refclk and power supply\n", __func__, reg);