diff --git a/arch/arm/boot/dts/rv1106-evb-cam.dtsi b/arch/arm/boot/dts/rv1106-evb-cam.dtsi new file mode 100644 index 000000000000..bedbd8707476 --- /dev/null +++ b/arch/arm/boot/dts/rv1106-evb-cam.dtsi @@ -0,0 +1,142 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2022 Rockchip Electronics Co., Ltd. + * + */ + +&csi2_dphy_hw { + status = "okay"; +}; + +&csi2_dphy0 { + status = "okay"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + #address-cells = <1>; + #size-cells = <0>; + + csi_dphy_input: endpoint@1 { + reg = <1>; + remote-endpoint = <&sc4336_out>; + data-lanes = <1 2>; + }; + }; + + port@1 { + reg = <1>; + #address-cells = <1>; + #size-cells = <0>; + + csi_dphy_output: endpoint@0 { + reg = <0>; + remote-endpoint = <&mipi_csi2_input>; + }; + }; + }; +}; + +&i2c4 { + status = "okay"; + clock-frequency = <400000>; + pinctrl-names = "default"; + pinctrl-0 = <&i2c4m2_xfer>; + + sc4336: sc4336@30 { + compatible = "smartsens,sc4336"; + status = "okay"; + reg = <0x30>; + clocks = <&cru MCLK_REF_MIPI0>; + clock-names = "xvclk"; + reset-gpios = <&gpio3 RK_PC5 GPIO_ACTIVE_HIGH>; + pwdn-gpios = <&gpio3 RK_PD2 GPIO_ACTIVE_HIGH>; + rockchip,camera-module-index = <0>; + rockchip,camera-module-facing = "back"; + rockchip,camera-module-name = "CMK-OT2117-PC1"; + rockchip,camera-module-lens-name = "YT10123-5MP"; + port { + sc4336_out: endpoint { + remote-endpoint = <&csi_dphy_input>; + data-lanes = <1 2>; + }; + }; + }; +}; + +&mipi0_csi2 { + status = "okay"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + #address-cells = <1>; + #size-cells = <0>; + + mipi_csi2_input: endpoint@1 { + reg = <1>; + remote-endpoint = <&csi_dphy_output>; + }; + }; + + port@1 { + reg = <1>; + #address-cells = <1>; + #size-cells = <0>; + + mipi_csi2_output: endpoint@0 { + reg = <0>; + remote-endpoint = <&cif_mipi_in>; + }; + }; + }; +}; + +&rkcif { + status = "okay"; +}; + +&rkcif_mipi_lvds { + status = "okay"; + + pinctrl-names = "default"; + pinctrl-0 = <&vicapm0_pins>; + port { + /* MIPI CSI-2 endpoint */ + cif_mipi_in: endpoint { + remote-endpoint = <&mipi_csi2_output>; + }; + }; +}; + +&rkcif_mipi_lvds_sditf { + status = "okay"; + + port { + /* MIPI CSI-2 endpoint */ + mipi_lvds_sditf: endpoint { + remote-endpoint = <&isp_in>; + }; + }; +}; + +&rkisp { + status = "okay"; +}; + +&rkisp_vir0 { + status = "okay"; + + port@0 { + isp_in: endpoint { + remote-endpoint = <&mipi_lvds_sditf>; + }; + }; +}; + diff --git a/arch/arm/boot/dts/rv1106g-evb1-v10.dts b/arch/arm/boot/dts/rv1106g-evb1-v10.dts index 6761d5334cd5..76609223112f 100644 --- a/arch/arm/boot/dts/rv1106g-evb1-v10.dts +++ b/arch/arm/boot/dts/rv1106g-evb1-v10.dts @@ -7,6 +7,7 @@ #include "rv1106.dtsi" #include "rv1106-evb-v10.dtsi" +#include "rv1106-evb-cam.dtsi" / { model = "Rockchip RV1106G EVB1 V10 Board";