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FROMLIST: scsi: ufs: Add dev ref clock gating wait time support
In UFS version 3.0, a newly added attribute bRefClkGatingWaitTime defines the minimum time for which the reference clock is required by device during transition to LS-MODE or HIBERN8 state. Make this change to reflect the new requirement by adding delays before turning off the clock. Bug: 143632303 Change-Id: I8d5c1dfcb8cdf0e829933d34a7e9bb207d0e1084 Link: https://lore.kernel.org/patchwork/patch/1149892/ Signed-off-by: Can Guo <cang@codeaurora.org> Signed-off-by: Asutosh Das <asutoshd@codeaurora.org>
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@@ -168,6 +168,7 @@ enum attr_idn {
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QUERY_ATTR_IDN_FFU_STATUS = 0x14,
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QUERY_ATTR_IDN_PSA_STATE = 0x15,
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QUERY_ATTR_IDN_PSA_DATA_SIZE = 0x16,
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QUERY_ATTR_IDN_REF_CLK_GATING_WAIT_TIME = 0x17,
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};
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/* Descriptor idn for Query requests */
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@@ -530,6 +531,8 @@ struct ufs_dev_info {
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bool f_power_on_wp_en;
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/* Keeps information if any of the LU is power on write protected */
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bool is_lu_power_on_wp;
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u16 spec_version;
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u32 clk_gating_wait_us;
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};
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#define MAX_MODEL_LEN 16
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@@ -92,6 +92,9 @@
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/* default delay of autosuspend: 2000 ms */
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#define RPM_AUTOSUSPEND_DELAY_MS 2000
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/* Default value of wait time before gating device ref clock */
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#define UFSHCD_REF_CLK_GATING_WAIT_US 0xFF /* microsecs */
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#define ufshcd_toggle_vreg(_dev, _vreg, _on) \
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({ \
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int _ret; \
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@@ -3395,6 +3398,37 @@ static inline int ufshcd_read_unit_desc_param(struct ufs_hba *hba,
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param_offset, param_read_buf, param_size);
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}
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static int ufshcd_get_ref_clk_gating_wait(struct ufs_hba *hba)
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{
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int err = 0;
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u32 gating_wait = UFSHCD_REF_CLK_GATING_WAIT_US;
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if (hba->dev_info.spec_version >= 0x300) {
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err = ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_READ_ATTR,
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QUERY_ATTR_IDN_REF_CLK_GATING_WAIT_TIME, 0, 0,
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&gating_wait);
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if (err)
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dev_err(hba->dev, "Failed reading bRefClkGatingWait. err = %d, use default %uus\n",
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err, gating_wait);
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if (gating_wait == 0) {
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gating_wait = UFSHCD_REF_CLK_GATING_WAIT_US;
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dev_err(hba->dev, "Undefined ref clk gating wait time, use default %uus\n",
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gating_wait);
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}
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/*
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* bRefClkGatingWaitTime defines the minimum time for which the
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* reference clock is required by device during transition from
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* HS-MODE to LS-MODE or HIBERN8 state. Give it more time to be
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* on the safe side.
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*/
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hba->dev_info.clk_gating_wait_us = gating_wait + 50;
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}
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return err;
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}
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/**
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* ufshcd_memory_alloc - allocate memory for host memory space data structures
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* @hba: per adapter instance
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@@ -6700,6 +6734,10 @@ static int ufs_get_device_desc(struct ufs_hba *hba,
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dev_desc->wmanufacturerid = desc_buf[DEVICE_DESC_PARAM_MANF_ID] << 8 |
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desc_buf[DEVICE_DESC_PARAM_MANF_ID + 1];
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/* getting Specification Version in big endian format */
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hba->dev_info.spec_version = desc_buf[DEVICE_DESC_PARAM_SPEC_VER] << 8 |
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desc_buf[DEVICE_DESC_PARAM_SPEC_VER + 1];
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model_index = desc_buf[DEVICE_DESC_PARAM_PRDCT_NAME];
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err = ufshcd_read_string_desc(hba, model_index,
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&dev_desc->model, SD_ASCII_STD);
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@@ -7116,6 +7154,9 @@ static int ufshcd_probe_hba(struct ufs_hba *hba)
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/* clear any previous UFS device information */
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memset(&hba->dev_info, 0, sizeof(hba->dev_info));
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ufshcd_get_ref_clk_gating_wait(hba);
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if (!ufshcd_query_flag_retry(hba, UPIU_QUERY_OPCODE_READ_FLAG,
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QUERY_FLAG_IDN_PWR_ON_WPE, &flag))
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hba->dev_info.f_power_on_wp_en = flag;
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@@ -7442,12 +7483,17 @@ static int __ufshcd_setup_clocks(struct ufs_hba *hba, bool on,
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struct ufs_clk_info *clki;
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struct list_head *head = &hba->clk_list_head;
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unsigned long flags;
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unsigned long gating_wait;
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ktime_t start = ktime_get();
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bool clk_state_changed = false;
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if (list_empty(head))
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goto out;
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gating_wait = (unsigned long)hba->dev_info.clk_gating_wait_us;
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if (!on && !skip_ref_clk && !!gating_wait)
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usleep_range(gating_wait, gating_wait + 10);
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ret = ufshcd_vops_setup_clocks(hba, on, PRE_CHANGE);
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if (ret)
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return ret;
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