From 5a44afbcdff8eee02a600ffe32464a8275aa9fb3 Mon Sep 17 00:00:00 2001
From: Cai YiWei <cyw@rock-chips.com>
Date: Tue, 1 Apr 2025 11:19:56 +0800
Subject: [PATCH 01/24] media: rockchip: isp: add attach info for isp35

Change-Id: I4e5829367cf21ecdd5b7e1d03fecfa7479cecb90
Signed-off-by: Cai YiWei <cyw@rock-chips.com>
---
 .../media/platform/rockchip/isp/capture_v35.c | 43 ++++++++++++++++---
 .../media/platform/rockchip/isp/isp_rockit.c  | 26 +++++++++++
 include/soc/rockchip/rockchip_rockit.h        | 18 ++++++++
 3 files changed, 81 insertions(+), 6 deletions(-)

diff --git a/drivers/media/platform/rockchip/isp/capture_v35.c b/drivers/media/platform/rockchip/isp/capture_v35.c
index f7f7ec6b373a..a566bd78a940 100644
--- a/drivers/media/platform/rockchip/isp/capture_v35.c
+++ b/drivers/media/platform/rockchip/isp/capture_v35.c
@@ -910,7 +910,7 @@ static int mi_frame_end(struct rkisp_stream *stream, u32 state)
 	struct capture_fmt *isp_fmt = &stream->out_isp_fmt;
 	unsigned long lock_flags = 0;
 	struct rkisp_buffer *buf = NULL;
-	u32 i;
+	u32 i, seq;
 
 	/* STREAM_VIR or STREAM_MP wrap buf from rockit */
 	if (stream->id == RKISP_STREAM_VIR ||
@@ -955,22 +955,50 @@ static int mi_frame_end(struct rkisp_stream *stream, u32 state)
 			goto end;
 		}
 
+		rkisp_dmarx_get_frame(dev, &seq, NULL, &ns, !dev->is_aiisp_en);
+		if (!ns)
+			ns = rkisp_time_get_ns(dev);
+
 		for (i = 0; i < isp_fmt->mplanes; i++) {
 			u32 payload_size = stream->out_fmt.plane_fmt[i].sizeimage;
 
 			vb2_set_plane_payload(vb2_buf, i, payload_size);
+			if (stream->is_attach_info &&
+			    vb2_buf->memory && i == isp_fmt->mplanes - 1) {
+				struct rkisp_frame_info *info = buf->vaddr[i] + payload_size;
+				struct sensor_exposure_cfg *exp = &dev->params_vdev.exposure;
+
+				info->seq = seq;
+				info->hdr = dev->params_vdev.is_hdr;
+				info->timestamp = IS_HDR_RDBK(dev->rd_mode) ? ns : dev->vicap_sof.timestamp;
+				info->rolling_shutter_skew = exp->linear_exp.rolling_shutter_skew;
+				info->sensor_exposure_time = exp->linear_exp.coarse_integration_time;
+				info->sensor_analog_gain = exp->linear_exp.analog_gain_code_global;
+				info->sensor_digital_gain = exp->linear_exp.digital_gain_global;
+				info->isp_digital_gain = exp->linear_exp.isp_digital_gain;
+				if (info->hdr) {
+					info->rolling_shutter_skew = exp->hdr_exp[0].rolling_shutter_skew;
+
+					info->sensor_exposure_time = exp->hdr_exp[0].coarse_integration_time;
+					info->sensor_analog_gain = exp->hdr_exp[0].analog_gain_code_global;
+					info->sensor_digital_gain = exp->hdr_exp[0].digital_gain_global;
+					info->isp_digital_gain = exp->hdr_exp[0].isp_digital_gain;
+
+					info->sensor_exposure_time_l = exp->hdr_exp[1].coarse_integration_time;
+					info->sensor_analog_gain_l = exp->hdr_exp[1].analog_gain_code_global;
+					info->sensor_digital_gain_l = exp->hdr_exp[1].digital_gain_global;
+					info->isp_digital_gain_l = exp->hdr_exp[1].isp_digital_gain;
+				}
+			}
 		}
 
-		rkisp_dmarx_get_frame(dev, &i, NULL, &ns, !dev->is_aiisp_en);
-		if (!ns)
-			ns = rkisp_time_get_ns(dev);
-		buf->vb.sequence = i;
+		buf->vb.sequence = seq;
 		vb2_buf->timestamp = ns;
 		ns = rkisp_time_get_ns(dev);
 		stream->dbg.interval = ns - stream->dbg.timestamp;
 		stream->dbg.delay = ns - vb2_buf->timestamp;
 		stream->dbg.timestamp = ns;
-		stream->dbg.id = i;
+		stream->dbg.id = seq;
 
 		if (vir->streaming && vir->conn_id == stream->id) {
 			spin_lock_irqsave(&vir->vbq_lock, lock_flags);
@@ -1120,6 +1148,9 @@ static int rkisp_queue_setup(struct vb2_queue *queue,
 			plane_fmt->sizeimage / height *
 			ALIGN(height, 16) :
 			plane_fmt->sizeimage;
+		/* attach information size */
+		if (stream->is_attach_info && i == isp_fmt->mplanes - 1)
+			sizes[i] += sizeof(struct rkisp_frame_info);
 	}
 
 	rkisp_chk_tb_over(dev);
diff --git a/drivers/media/platform/rockchip/isp/isp_rockit.c b/drivers/media/platform/rockchip/isp/isp_rockit.c
index 865c40b18a1b..34b414ef0dc3 100644
--- a/drivers/media/platform/rockchip/isp/isp_rockit.c
+++ b/drivers/media/platform/rockchip/isp/isp_rockit.c
@@ -320,6 +320,32 @@ int rkisp_rockit_buf_done(struct rkisp_stream *stream, int cmd, struct rkisp_buf
 				ISP33_ISP2ENC_FRM_CNT(rkisp_read(dev, ISP3X_ISP_DEBUG1, true));
 	}
 
+	if (stream->is_attach_info) {
+		struct sensor_exposure_cfg *exp = &dev->params_vdev.exposure;
+
+		if (!IS_HDR_RDBK(dev->rd_mode))
+			rockit_cfg->frame.u64PTS = dev->vicap_sof.timestamp;
+		rockit_cfg->frame.hdr = dev->params_vdev.is_hdr;
+		rockit_cfg->frame.rolling_shutter_skew = exp->linear_exp.rolling_shutter_skew;
+		rockit_cfg->frame.sensor_exposure_time = exp->linear_exp.coarse_integration_time;
+		rockit_cfg->frame.sensor_analog_gain = exp->linear_exp.analog_gain_code_global;
+		rockit_cfg->frame.sensor_digital_gain = exp->linear_exp.digital_gain_global;
+		rockit_cfg->frame.isp_digital_gain = exp->linear_exp.isp_digital_gain;
+		if (rockit_cfg->frame.hdr) {
+			rockit_cfg->frame.rolling_shutter_skew = exp->hdr_exp[0].rolling_shutter_skew;
+
+			rockit_cfg->frame.sensor_exposure_time = exp->hdr_exp[0].coarse_integration_time;
+			rockit_cfg->frame.sensor_analog_gain = exp->hdr_exp[0].analog_gain_code_global;
+			rockit_cfg->frame.sensor_digital_gain = exp->hdr_exp[0].digital_gain_global;
+			rockit_cfg->frame.isp_digital_gain = exp->hdr_exp[0].isp_digital_gain;
+
+			rockit_cfg->frame.sensor_exposure_time_l = exp->hdr_exp[1].coarse_integration_time;
+			rockit_cfg->frame.sensor_analog_gain_l = exp->hdr_exp[1].analog_gain_code_global;
+			rockit_cfg->frame.sensor_digital_gain_l = exp->hdr_exp[1].digital_gain_global;
+			rockit_cfg->frame.isp_digital_gain_l = exp->hdr_exp[1].isp_digital_gain;
+		}
+	}
+
 	rockit_cfg->is_color = !rkisp_read(dev, ISP3X_IMG_EFF_CTRL, true);
 
 	rockit_cfg->frame.u32Height = stream->out_fmt.height;
diff --git a/include/soc/rockchip/rockchip_rockit.h b/include/soc/rockchip/rockchip_rockit.h
index ab4a9b7b5387..a9fd87681a67 100644
--- a/include/soc/rockchip/rockchip_rockit.h
+++ b/include/soc/rockchip/rockchip_rockit.h
@@ -57,6 +57,24 @@ struct ISP_VIDEO_FRAMES {
 	u64	u64PrivateData;
 	u32	u32FrameFlag;     /* FRAME_FLAG_E, can be OR operation. */
 	u8	ispEncCnt;
+
+	u32	hdr;
+	u32	rolling_shutter_skew;
+	/* linear or hdr short frame */
+	u32	sensor_exposure_time;
+	u32	sensor_analog_gain;
+	u32	sensor_digital_gain;
+	u32	isp_digital_gain;
+	/* hdr mid-frame */
+	u32	sensor_exposure_time_m;
+	u32	sensor_analog_gain_m;
+	u32	sensor_digital_gain_m;
+	u32	isp_digital_gain_m;
+	/* hdr long frame */
+	u32	sensor_exposure_time_l;
+	u32	sensor_analog_gain_l;
+	u32	sensor_digital_gain_l;
+	u32	isp_digital_gain_l;
 };
 
 struct rkisp_dev_cfg {

From 06376fa564014386ae126b58d9c19373f6bf802f Mon Sep 17 00:00:00 2001
From: Cai YiWei <cyw@rock-chips.com>
Date: Tue, 1 Apr 2025 16:17:27 +0800
Subject: [PATCH 02/24] media: rockchip: vpss: attach info for rockit

Change-Id: I4411edb68f7cf9e3e22ffcc6aa9d53a56d0e0e73
Signed-off-by: Cai YiWei <cyw@rock-chips.com>
---
 .../media/platform/rockchip/vpss/stream_v20.c |  3 ++-
 .../platform/rockchip/vpss/vpss_rockit.c      | 23 +++++++++++++++++++
 2 files changed, 25 insertions(+), 1 deletion(-)

diff --git a/drivers/media/platform/rockchip/vpss/stream_v20.c b/drivers/media/platform/rockchip/vpss/stream_v20.c
index 8fc95b210f39..731c5dfaa6f1 100644
--- a/drivers/media/platform/rockchip/vpss/stream_v20.c
+++ b/drivers/media/platform/rockchip/vpss/stream_v20.c
@@ -1184,7 +1184,8 @@ static void rkvpss_frame_end(struct rkvpss_stream *stream)
 
 			vb2_set_plane_payload(vb2_buf, i, payload_size);
 
-			if (stream->is_attach_info && i == fmt->mplanes - 1) {
+			if (stream->is_attach_info &&
+			    vb2_buf->memory && i == fmt->mplanes - 1) {
 				struct rkvpss_frame_info *dst_info = buf->vaddr[i] + payload_size;
 				struct rkisp_vpss_frame_info *src_info = &dev->frame_info;
 
diff --git a/drivers/media/platform/rockchip/vpss/vpss_rockit.c b/drivers/media/platform/rockchip/vpss/vpss_rockit.c
index 5d6bf1f3315f..f54655f1c6a6 100644
--- a/drivers/media/platform/rockchip/vpss/vpss_rockit.c
+++ b/drivers/media/platform/rockchip/vpss/vpss_rockit.c
@@ -314,6 +314,29 @@ int rkvpss_rockit_buf_done(struct rkvpss_stream *stream, int cmd, struct rkvpss_
 	rockit_vpss_cfg->node = stream_cfg->node;
 	rockit_vpss_cfg->event = cmd;
 
+	if (stream->is_attach_info) {
+		struct rkisp_vpss_frame_info *src_info = &vpss_dev->frame_info;
+
+		rockit_vpss_cfg->frame.u64PTS = src_info->timestamp;
+		rockit_vpss_cfg->frame.hdr = src_info->hdr;
+		rockit_vpss_cfg->frame.rolling_shutter_skew = src_info->rolling_shutter_skew;
+
+		rockit_vpss_cfg->frame.sensor_exposure_time = src_info->sensor_exposure_time;
+		rockit_vpss_cfg->frame.sensor_analog_gain = src_info->sensor_analog_gain;
+		rockit_vpss_cfg->frame.sensor_digital_gain = src_info->sensor_digital_gain;
+		rockit_vpss_cfg->frame.isp_digital_gain = src_info->isp_digital_gain;
+
+		rockit_vpss_cfg->frame.sensor_exposure_time_m = src_info->sensor_exposure_time_m;
+		rockit_vpss_cfg->frame.sensor_analog_gain_m = src_info->sensor_analog_gain_m;
+		rockit_vpss_cfg->frame.sensor_digital_gain_m = src_info->sensor_digital_gain_m;
+		rockit_vpss_cfg->frame.isp_digital_gain_m = src_info->isp_digital_gain_m;
+
+		rockit_vpss_cfg->frame.sensor_exposure_time_l = src_info->sensor_exposure_time_l;
+		rockit_vpss_cfg->frame.sensor_analog_gain_l = src_info->sensor_analog_gain_l;
+		rockit_vpss_cfg->frame.sensor_digital_gain_l = src_info->sensor_digital_gain_l;
+		rockit_vpss_cfg->frame.isp_digital_gain_l = src_info->isp_digital_gain_l;
+	}
+
 	if (list_empty(&stream->buf_queue))
 		rockit_vpss_cfg->is_empty = true;
 	else

From e00b69700557a0235b079798822d0e7ad15558ef Mon Sep 17 00:00:00 2001
From: Jianwei Fan <jianwei.fan@rock-chips.com>
Date: Mon, 24 Feb 2025 19:50:52 +0800
Subject: [PATCH 03/24] media: i2c: lt6911uxe: add yuv420-8bit legacy support

Signed-off-by: Jianwei Fan <jianwei.fan@rock-chips.com>
Change-Id: Iea357d3633242e362024992cdc99e13230392d68
---
 drivers/media/i2c/lt6911uxe.c | 153 +++++++++++++++++++++-------------
 1 file changed, 94 insertions(+), 59 deletions(-)

diff --git a/drivers/media/i2c/lt6911uxe.c b/drivers/media/i2c/lt6911uxe.c
index 829080a19f11..b3a6c1a7601b 100644
--- a/drivers/media/i2c/lt6911uxe.c
+++ b/drivers/media/i2c/lt6911uxe.c
@@ -14,6 +14,7 @@
  *  1.fix some errors.
  *  2.add dphy timing reg.
  * V0.0X01.0X05 add dual mipi mode support
+ * V0.0X01.0X06 add yuv420 8bit
  *
  */
 // #define DEBUG
@@ -41,7 +42,7 @@
 #include <media/v4l2-event.h>
 #include <media/v4l2-fwnode.h>
 
-#define DRIVER_VERSION			KERNEL_VERSION(0, 0x01, 0x05)
+#define DRIVER_VERSION			KERNEL_VERSION(0, 0x01, 0x06)
 
 static int debug;
 module_param(debug, int, 0644);
@@ -131,12 +132,38 @@ MODULE_PARM_DESC(debug, "debug level (0-3)");
 #define MIPI_TX_PT0_LPTX	0xe234
 #define MIPI_TX_PT1_LPTX	0xe244
 
-// #define LT6911UXE_OUT_RGB
-#ifdef LT6911UXE_OUT_RGB
-#define LT6911UXE_MEDIA_BUS_FMT		MEDIA_BUS_FMT_BGR888_1X24
-#else
-#define LT6911UXE_MEDIA_BUS_FMT		MEDIA_BUS_FMT_UYVY8_2X8
-#endif
+enum lt6911uxe_bus_fmt {
+	RGB_6Bit = 0,
+	RGB_8Bit,
+	RGB_10Bit,
+	RGB_12Bit,
+	YUV444_8Bit,
+	YUV444_10Bit,
+	YUV444_12Bit,
+	YUV422_8Bit,
+	YUV422_10Bit,
+	YUV422_12Bit,
+	YUV420_8Bit,
+	YUV420_10Bit,
+	YUV420_12Bit,
+};
+
+static const char * const bus_format_str[] = {
+	"RGB_6Bit",
+	"RGB_8Bit",
+	"RGB_10Bit",
+	"RGB_12Bit",
+	"YUV444_8Bit",
+	"YUV444_10Bit",
+	"YUV444_12Bit",
+	"YUV422_8Bit",
+	"YUV422_10Bit",
+	"YUV422_12Bit",
+	"YUV420_8Bit",
+	"YUV420_10Bit",
+	"YUV420_12Bit",
+	"UNKNOWN",
+};
 
 #define LT6911UXE_NAME			"LT6911UXE"
 
@@ -200,6 +227,9 @@ struct lt6911uxe {
 	u32 audio_sampling_rate;
 	int lane_in_use;
 	bool dual_mipi_port;
+	u8 bus_fmt;
+	bool rgb_out;
+	u32 cur_fps;
 };
 
 static const struct v4l2_dv_timings_cap lt6911uxe_timings_cap = {
@@ -788,7 +818,7 @@ static int lt6911uxe_get_detected_timings(struct v4l2_subdev *sd,
 	struct lt6911uxe *lt6911uxe = to_lt6911uxe(sd);
 	struct v4l2_bt_timings *bt = &timings->bt;
 	u32 hact, vact, htotal, vtotal, hs, vs, hbp, vbp, hfp, vfp;
-	u32 pixel_clock, fps, halt_pix_clk;
+	u32 pixel_clock, halt_pix_clk;
 	u8 clk_h, clk_m, clk_l;
 	u8 val_h, val_l;
 	u32 byte_clk, mipi_clk, mipi_data_rate;
@@ -839,6 +869,15 @@ static int lt6911uxe_get_detected_timings(struct v4l2_subdev *sd,
 
 	vbp = vtotal - vact - vs - vfp;
 
+	lt6911uxe->bus_fmt = i2c_rd8(sd, BUS_FMT);
+	if (lt6911uxe->bus_fmt == YUV420_8Bit) {
+		hact *= 2;
+		hs *= 2;
+		hfp *= 2;
+		hbp *= 2;
+		htotal *= 2;
+		pixel_clock *= 2;
+	}
 	lt6911uxe->nosignal = false;
 	lt6911uxe->is_audio_present = true;
 	timings->type = V4L2_DV_BT_656_1120;
@@ -852,7 +891,7 @@ static int lt6911uxe_get_detected_timings(struct v4l2_subdev *sd,
 	bt->hbackporch = hbp;
 	bt->vbackporch = vbp;
 	bt->pixelclock = pixel_clock;
-	fps = pixel_clock / (htotal * vtotal);
+	lt6911uxe->cur_fps = pixel_clock / (htotal * vtotal);
 
 	/* for interlaced res 1080i 576i 480i*/
 	if ((hact == 1920 && vact == 540) || (hact == 1440 && vact == 288)
@@ -864,14 +903,23 @@ static int lt6911uxe_get_detected_timings(struct v4l2_subdev *sd,
 		bt->interlaced = V4L2_DV_PROGRESSIVE;
 	}
 
-	if (!lt6911uxe_rcv_supported_res(sd, hact, bt->height)) {
-		lt6911uxe->nosignal = true;
-		v4l2_err(sd, "%s: rcv err res, return no signal!\n", __func__);
-		return -EINVAL;
+	if (lt6911uxe->bus_fmt == YUV420_8Bit) {
+		lt6911uxe->mbus_fmt_code = MEDIA_BUS_FMT_UV8_1X8;
+	} else {
+		if (lt6911uxe->rgb_out)
+			lt6911uxe->mbus_fmt_code = MEDIA_BUS_FMT_BGR888_1X24;
+		else
+			lt6911uxe->mbus_fmt_code = MEDIA_BUS_FMT_UYVY8_2X8;
 	}
 
-	v4l2_info(sd, "act:%dx%d, total:%dx%d, pixclk:%d, fps:%d\n",
-			hact, vact, htotal, vtotal, pixel_clock, fps);
+	if (!lt6911uxe_rcv_supported_res(sd, bt->width, bt->height)) {
+		lt6911uxe->nosignal = true;
+		v4l2_err(sd, "%s: rcv err res, return no signal!\n", __func__);
+	}
+
+	v4l2_info(sd, "act:%dx%d, total:%dx%d, pixclk:%u, fps:%d, bus fmt:%s\n",
+			hact, vact, htotal, vtotal, pixel_clock,
+			lt6911uxe->cur_fps, bus_format_str[lt6911uxe->bus_fmt]);
 	v4l2_info(sd, "byte_clk:%u, mipi_clk:%u, mipi_data_rate:%u\n",
 			byte_clk, mipi_clk, mipi_data_rate);
 	v4l2_info(sd, "hfp:%d, hs:%d, hbp:%d, vfp:%d, vs:%d, vbp:%d, inerlaced:%d\n",
@@ -936,42 +984,14 @@ static int lt6911uxe_update_controls(struct v4l2_subdev *sd)
 	return ret;
 }
 
-static void lt6911uxe_config_dphy_timing(struct v4l2_subdev *sd)
-{
-	u8 val;
-
-	val = i2c_rd8(sd, CLK_ZERO_REG);
-	i2c_wr8(sd, CLK_ZERO_REG, val);
-
-	val = i2c_rd8(sd, HS_PREPARE_REG);
-	i2c_wr8(sd, HS_PREPARE_REG, val);
-
-	val = i2c_rd8(sd, HS_TRAIL);
-	i2c_wr8(sd, HS_TRAIL, val);
-	v4l2_info(sd, "%s: dphy timing: hs trail = %x\n", __func__, val);
-
-	val = i2c_rd8(sd, MIPI_TX_PT0_TX0_DLY);
-	i2c_wr8_and_or(sd, MIPI_TX_PT0_TX0_DLY, ~MIPI_TIMING_MASK, val);
-	v4l2_info(sd, "%s: dphy timing: port0 tx0 delay = %x\n", __func__, val);
-
-	val = i2c_rd8(sd, MIPI_TX_PT0_LPTX);
-	i2c_wr8(sd, MIPI_TX_PT0_LPTX, val);
-	v4l2_info(sd, "%s: dphy timing: port0 lptx = %x\n", __func__, val);
-
-	v4l2_info(sd, "%s: dphy timing config done.\n", __func__);
-}
-
 static inline void enable_stream(struct v4l2_subdev *sd, bool enable)
 {
 	struct lt6911uxe *lt6911uxe = to_lt6911uxe(sd);
 
-	if (enable) {
-		lt6911uxe_config_dphy_timing(sd);
-		usleep_range(5000, 6000);
+	if (enable)
 		i2c_wr8(&lt6911uxe->sd, STREAM_CTL, ENABLE_STREAM);
-	} else {
+	else
 		i2c_wr8(&lt6911uxe->sd, STREAM_CTL, DISABLE_STREAM);
-	}
 	msleep(20);
 
 	v4l2_dbg(2, debug, sd, "%s: %sable\n",
@@ -1170,11 +1190,8 @@ static int lt6911uxe_s_stream(struct v4l2_subdev *sd, int on)
 	struct i2c_client *client = lt6911uxe->i2c_client;
 
 	dev_info(&client->dev, "%s: on: %d, %dx%d%s%d\n", __func__, on,
-				lt6911uxe->cur_mode->width,
-				lt6911uxe->cur_mode->height,
-				lt6911uxe->cur_mode->interlace ? "I" : "P",
-		DIV_ROUND_CLOSEST(lt6911uxe->cur_mode->max_fps.denominator,
-				  lt6911uxe->cur_mode->max_fps.numerator));
+		lt6911uxe->timings.bt.width, lt6911uxe->timings.bt.height,
+		lt6911uxe->timings.bt.interlaced ? "I" : "P", lt6911uxe->cur_fps);
 	enable_stream(sd, on);
 
 	return 0;
@@ -1184,9 +1201,11 @@ static int lt6911uxe_enum_mbus_code(struct v4l2_subdev *sd,
 			struct v4l2_subdev_state *sd_state,
 			struct v4l2_subdev_mbus_code_enum *code)
 {
+	struct lt6911uxe *lt6911uxe = to_lt6911uxe(sd);
+
 	switch (code->index) {
 	case 0:
-		code->code = LT6911UXE_MEDIA_BUS_FMT;
+		code->code = lt6911uxe->mbus_fmt_code;
 		break;
 
 	default:
@@ -1205,7 +1224,7 @@ static int lt6911uxe_enum_frame_sizes(struct v4l2_subdev *sd,
 	if (fse->index >= lt6911uxe->cfg_num)
 		return -EINVAL;
 
-	if (fse->code != LT6911UXE_MEDIA_BUS_FMT)
+	if (fse->code != lt6911uxe->mbus_fmt_code)
 		return -EINVAL;
 
 	fse->min_width  = lt6911uxe->support_modes[fse->index].width;
@@ -1225,7 +1244,7 @@ static int lt6911uxe_enum_frame_interval(struct v4l2_subdev *sd,
 	if (fie->index >= lt6911uxe->cfg_num)
 		return -EINVAL;
 
-	fie->code = LT6911UXE_MEDIA_BUS_FMT;
+	fie->code = lt6911uxe->mbus_fmt_code;
 
 	fie->width = lt6911uxe->support_modes[fie->index].width;
 	fie->height = lt6911uxe->support_modes[fie->index].height;
@@ -1327,9 +1346,18 @@ static int lt6911uxe_set_fmt(struct v4l2_subdev *sd,
 		return ret;
 
 	switch (code) {
-	case LT6911UXE_MEDIA_BUS_FMT:
-		break;
-
+	case MEDIA_BUS_FMT_UYVY8_2X8:
+		if (lt6911uxe->mbus_fmt_code == MEDIA_BUS_FMT_UYVY8_2X8)
+			break;
+		return -EINVAL;
+	case MEDIA_BUS_FMT_BGR888_1X24:
+		if (lt6911uxe->mbus_fmt_code == MEDIA_BUS_FMT_BGR888_1X24)
+			break;
+		return -EINVAL;
+	case MEDIA_BUS_FMT_UV8_1X8:
+		if (lt6911uxe->mbus_fmt_code == MEDIA_BUS_FMT_UV8_1X8)
+			break;
+		return -EINVAL;
 	default:
 		return -EINVAL;
 	}
@@ -1542,7 +1570,7 @@ static int lt6911uxe_open(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh)
 	/* Initialize try_fmt */
 	try_fmt->width = def_mode->width;
 	try_fmt->height = def_mode->height;
-	try_fmt->code = LT6911UXE_MEDIA_BUS_FMT;
+	try_fmt->code = lt6911uxe->mbus_fmt_code;
 	try_fmt->field = V4L2_FIELD_NONE;
 	mutex_unlock(&lt6911uxe->confctl_mutex);
 
@@ -1719,6 +1747,9 @@ static int lt6911uxe_probe_of(struct lt6911uxe *lt6911uxe)
 		return ret;
 	}
 
+	if (of_property_read_bool(dev->of_node, "output-rgb"))
+		lt6911uxe->rgb_out = true;
+
 	ep = of_graph_get_next_endpoint(dev->of_node, NULL);
 	if (!ep) {
 		dev_err(dev, "missing endpoint node\n");
@@ -1844,7 +1875,6 @@ static int lt6911uxe_probe(struct i2c_client *client,
 
 	sd = &lt6911uxe->sd;
 	lt6911uxe->i2c_client = client;
-	lt6911uxe->mbus_fmt_code = LT6911UXE_MEDIA_BUS_FMT;
 
 	err = lt6911uxe_probe_of(lt6911uxe);
 	if (err) {
@@ -1854,6 +1884,10 @@ static int lt6911uxe_probe(struct i2c_client *client,
 
 	lt6911uxe->timings = default_timing;
 	lt6911uxe->cur_mode = &lt6911uxe->support_modes[0];
+	if (lt6911uxe->rgb_out)
+		lt6911uxe->mbus_fmt_code = MEDIA_BUS_FMT_BGR888_1X24;
+	else
+		lt6911uxe->mbus_fmt_code = MEDIA_BUS_FMT_UYVY8_2X8;
 
 	err = lt6911uxe_get_multi_dev_info(lt6911uxe);
 	if (err)
@@ -1940,7 +1974,8 @@ static int lt6911uxe_probe(struct i2c_client *client,
 		v4l2_err(sd, "v4l2 ctrl handler setup failed! err:%d\n", err);
 		goto err_work_queues;
 	}
-	enable_stream(sd, false);
+
+	schedule_delayed_work(&lt6911uxe->delayed_work_res_change, msecs_to_jiffies(50));
 	v4l2_info(sd, "%s found @ 0x%x (%s)\n", client->name,
 			client->addr << 1, client->adapter->name);
 

From 5dacb1ab68313e7d881bbf6bc4322d0592cd7511 Mon Sep 17 00:00:00 2001
From: Jianwei Fan <jianwei.fan@rock-chips.com>
Date: Mon, 24 Feb 2025 19:59:57 +0800
Subject: [PATCH 04/24] media: i2c: lt6911uxe: calculate mipi freq from pixclk

Signed-off-by: Jianwei Fan <jianwei.fan@rock-chips.com>
Change-Id: I8037409e179939bdeae0e070400c1afb0423d8de
---
 drivers/media/i2c/lt6911uxe.c | 90 ++++++++++++++++++++++++++++-------
 1 file changed, 74 insertions(+), 16 deletions(-)

diff --git a/drivers/media/i2c/lt6911uxe.c b/drivers/media/i2c/lt6911uxe.c
index b3a6c1a7601b..9364fcdf713d 100644
--- a/drivers/media/i2c/lt6911uxe.c
+++ b/drivers/media/i2c/lt6911uxe.c
@@ -52,14 +52,19 @@ MODULE_PARM_DESC(debug, "debug level (0-3)");
 #define POLL_INTERVAL_MS	1000
 
 #define LT6911UXE_LINK_FREQ_1250M	1250000000
+#define LT6911UXE_LINK_FREQ_1100M	1100000000
+#define LT6911UXE_LINK_FREQ_1000M	1000000000
 #define LT6911UXE_LINK_FREQ_900M	900000000
+#define LT6911UXE_LINK_FREQ_800M	800000000
+#define LT6911UXE_LINK_FREQ_700M	700000000
 #define LT6911UXE_LINK_FREQ_600M	600000000
-#define LT6911UXE_LINK_FREQ_450M	450000000
+#define LT6911UXE_LINK_FREQ_500M	500000000
 #define LT6911UXE_LINK_FREQ_400M	400000000
 #define LT6911UXE_LINK_FREQ_300M	300000000
 #define LT6911UXE_LINK_FREQ_200M	200000000
 #define LT6911UXE_LINK_FREQ_150M	150000000
 #define LT6911UXE_LINK_FREQ_100M	100000000
+#define LT6911UXE_LINK_FREQ_50M		50000000
 #define LT6911UXE_PIXEL_RATE		800000000
 
 #define LT6911UXE_CHIPID	0x0221
@@ -167,25 +172,22 @@ static const char * const bus_format_str[] = {
 
 #define LT6911UXE_NAME			"LT6911UXE"
 
-#ifdef LT6911UXE_OUT_RGB
 static const s64 link_freq_menu_items[] = {
 	LT6911UXE_LINK_FREQ_1250M,
+	LT6911UXE_LINK_FREQ_1100M,
+	LT6911UXE_LINK_FREQ_1000M,
 	LT6911UXE_LINK_FREQ_900M,
+	LT6911UXE_LINK_FREQ_800M,
+	LT6911UXE_LINK_FREQ_700M,
 	LT6911UXE_LINK_FREQ_600M,
-	LT6911UXE_LINK_FREQ_450M,
-	LT6911UXE_LINK_FREQ_300M,
-	LT6911UXE_LINK_FREQ_150M,
-};
-#else
-static const s64 link_freq_menu_items[] = {
-	LT6911UXE_LINK_FREQ_1250M,
-	LT6911UXE_LINK_FREQ_600M,
+	LT6911UXE_LINK_FREQ_500M,
 	LT6911UXE_LINK_FREQ_400M,
 	LT6911UXE_LINK_FREQ_300M,
 	LT6911UXE_LINK_FREQ_200M,
+	LT6911UXE_LINK_FREQ_150M,
 	LT6911UXE_LINK_FREQ_100M,
+	LT6911UXE_LINK_FREQ_50M,
 };
-#endif
 
 struct lt6911uxe {
 	struct v4l2_mbus_config_mipi_csi2 bus;
@@ -1295,12 +1297,69 @@ lt6911uxe_find_best_fit(struct lt6911uxe *lt6911uxe)
 	return &lt6911uxe->support_modes[cur_best_fit];
 }
 
+static int lt6911uxe_get_format_bpp(struct v4l2_subdev *sd)
+{
+	struct lt6911uxe *lt6911uxe = to_lt6911uxe(sd);
+	u32 code = lt6911uxe->mbus_fmt_code;
+
+	switch (code) {
+	case MEDIA_BUS_FMT_UYVY8_2X8:
+		return 16;
+	case MEDIA_BUS_FMT_BGR888_1X24:
+		return 24;
+	case MEDIA_BUS_FMT_UV8_1X8:
+		return 12;
+	default:
+		return 16;
+	}
+}
+
+static u64 lt6911uxe_get_lane_rate_bps(struct v4l2_subdev *sd)
+{
+	struct lt6911uxe *lt6911uxe = to_lt6911uxe(sd);
+	u64 lane_rate;
+	u64 max_lane_rate = 2500000000U;
+	u8 bpp;
+	u64 pixelclock = lt6911uxe->timings.bt.pixelclock;
+	u32 lanes = lt6911uxe->bus_cfg.bus.mipi_csi2.num_data_lanes;
+
+	bpp = lt6911uxe_get_format_bpp(sd);
+	lane_rate = pixelclock * bpp;
+	lane_rate = div_u64(lane_rate, lanes);
+	lane_rate = DIV_ROUND_UP(lane_rate * 10, 9);
+
+	if (lane_rate > max_lane_rate)
+		lane_rate = max_lane_rate;
+
+	return lane_rate;
+}
+
+static int lt6911uxe_get_mipi_freq_idx(struct v4l2_subdev *sd)
+{
+	u64 mipi_freq;
+	u64 dist;
+	u64 cur_best_idx = 0;
+	u64 cur_dist;
+	unsigned int i;
+
+	mipi_freq = lt6911uxe_get_lane_rate_bps(sd) / 2;
+	dist = abs(mipi_freq - link_freq_menu_items[0]);
+	for (i = 0; i < ARRAY_SIZE(link_freq_menu_items); i++) {
+		cur_dist = abs(mipi_freq - link_freq_menu_items[i]);
+		if (cur_dist < dist) {
+			dist = cur_dist;
+			cur_best_idx = i;
+		}
+	}
+	return cur_best_idx;
+}
+
 static int lt6911uxe_get_fmt(struct v4l2_subdev *sd,
 			struct v4l2_subdev_state *sd_state,
 			struct v4l2_subdev_format *format)
 {
 	struct lt6911uxe *lt6911uxe = to_lt6911uxe(sd);
-	const struct lt6911uxe_mode *mode;
+	int mipi_freq_idx;
 
 	mutex_lock(&lt6911uxe->confctl_mutex);
 	format->format.code = lt6911uxe->mbus_fmt_code;
@@ -1312,15 +1371,14 @@ static int lt6911uxe_get_fmt(struct v4l2_subdev *sd,
 	format->format.colorspace = V4L2_COLORSPACE_SRGB;
 	mutex_unlock(&lt6911uxe->confctl_mutex);
 
-	mode = lt6911uxe_find_best_fit(lt6911uxe);
-	lt6911uxe->cur_mode = mode;
+	mipi_freq_idx = lt6911uxe_get_mipi_freq_idx(sd);
 
 	__v4l2_ctrl_s_ctrl_int64(lt6911uxe->pixel_rate,
 				LT6911UXE_PIXEL_RATE);
 	__v4l2_ctrl_s_ctrl(lt6911uxe->link_freq,
-				mode->mipi_freq_idx);
+				mipi_freq_idx);
 
-	v4l2_dbg(1, debug, sd, "%s: mode->mipi_freq_idx(%d)", __func__, mode->mipi_freq_idx);
+	v4l2_dbg(1, debug, sd, "%s: mipi_freq_idx(%d)", __func__, mipi_freq_idx);
 
 	v4l2_dbg(1, debug, sd, "%s: fmt code:%d, w:%d, h:%d, field code:%d\n",
 			__func__, format->format.code, format->format.width,

From ac9dc34b8c7e28050d62b14245d5c220311ff758 Mon Sep 17 00:00:00 2001
From: Simon Xue <xxm@rock-chips.com>
Date: Tue, 1 Apr 2025 14:49:03 +0800
Subject: [PATCH 05/24] ARM/dma-mapping: increase iommu bitmap size to 64KB

Due to the maximum bitmap size limit of 4KB and the restriction
on cross-bitmap allocation requests, a single IOVA allocation cannot
exceed 128MB. This does not meet the requirements of the NPU.Increase
the bitmap size to 64KB will allow a maximum single IOVA allocation
of 2GB to address this issue.

Change-Id: I38cbdef5622e049aa0bc08009707ad60943dfd42
Signed-off-by: Simon Xue <xxm@rock-chips.com>
---
 arch/arm/mm/dma-mapping.c | 12 ++++++++++++
 1 file changed, 12 insertions(+)

diff --git a/arch/arm/mm/dma-mapping.c b/arch/arm/mm/dma-mapping.c
index d7909091cf97..85909bdb3cd1 100644
--- a/arch/arm/mm/dma-mapping.c
+++ b/arch/arm/mm/dma-mapping.c
@@ -1543,6 +1543,11 @@ static const struct dma_map_ops iommu_ops = {
 	.unmap_resource		= arm_iommu_unmap_resource,
 };
 
+#ifdef CONFIG_ARCH_ROCKCHIP
+#define RK_DMA_IOMMU_IOVA_BLOCK_SIZE	SZ_2G
+#define RK_DMA_IOMMU_BITMAP_SIZE	((RK_DMA_IOMMU_IOVA_BLOCK_SIZE >> PAGE_SHIFT) >> 3)
+#endif
+
 /**
  * arm_iommu_create_mapping
  * @bus: pointer to the bus holding the client device (for IOMMU calls)
@@ -1572,10 +1577,17 @@ arm_iommu_create_mapping(struct bus_type *bus, dma_addr_t base, u64 size)
 	if (!bitmap_size)
 		return ERR_PTR(-EINVAL);
 
+#ifdef RK_DMA_IOMMU_BITMAP_SIZE
+	if (bitmap_size > RK_DMA_IOMMU_BITMAP_SIZE) {
+		extensions = bitmap_size / RK_DMA_IOMMU_BITMAP_SIZE;
+		bitmap_size = RK_DMA_IOMMU_BITMAP_SIZE;
+	}
+#else
 	if (bitmap_size > PAGE_SIZE) {
 		extensions = bitmap_size / PAGE_SIZE;
 		bitmap_size = PAGE_SIZE;
 	}
+#endif
 
 	mapping = kzalloc(sizeof(struct dma_iommu_mapping), GFP_KERNEL);
 	if (!mapping)

From 6311b3e72876ca7a9c7730b1defce29550933748 Mon Sep 17 00:00:00 2001
From: Simon Xue <xxm@rock-chips.com>
Date: Wed, 2 Apr 2025 10:13:44 +0800
Subject: [PATCH 06/24] ARM/dma-mapping: treat address 0 of IOVA valid

Because address 0 of IOVA is allowed when iova_alloc,
don't treat 0 as a invalid IOVA address when unmap/sync

Change-Id: I3ddccbc621db423214fc69bb36c9a1b7b9c6e684
Signed-off-by: Simon Xue <xxm@rock-chips.com>
---
 arch/arm/mm/dma-mapping.c | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/arch/arm/mm/dma-mapping.c b/arch/arm/mm/dma-mapping.c
index 85909bdb3cd1..51e1dd360456 100644
--- a/arch/arm/mm/dma-mapping.c
+++ b/arch/arm/mm/dma-mapping.c
@@ -1424,7 +1424,7 @@ static void arm_iommu_unmap_page(struct device *dev, dma_addr_t handle,
 	int offset = handle & ~PAGE_MASK;
 	int len = PAGE_ALIGN(size + offset);
 
-	if (!iova)
+	if (WARN(handle == DMA_MAPPING_ERROR, "invalid iommu iova address.\n"))
 		return;
 
 	if (!dev->dma_coherent && !(attrs & DMA_ATTR_SKIP_CPU_SYNC)) {
@@ -1486,7 +1486,7 @@ static void arm_iommu_unmap_resource(struct device *dev, dma_addr_t dma_handle,
 	unsigned int offset = dma_handle & ~PAGE_MASK;
 	size_t len = PAGE_ALIGN(size + offset);
 
-	if (!iova)
+	if (WARN(dma_handle == DMA_MAPPING_ERROR, "invalid iommu iova address.\n"))
 		return;
 
 	iommu_unmap(mapping->domain, iova, len);
@@ -1501,7 +1501,7 @@ static void arm_iommu_sync_single_for_cpu(struct device *dev,
 	struct page *page;
 	unsigned int offset = handle & ~PAGE_MASK;
 
-	if (dev->dma_coherent || !iova)
+	if (dev->dma_coherent || WARN(handle == DMA_MAPPING_ERROR, "invalid iommu iova address.\n"))
 		return;
 
 	page = phys_to_page(iommu_iova_to_phys(mapping->domain, iova));
@@ -1516,7 +1516,7 @@ static void arm_iommu_sync_single_for_device(struct device *dev,
 	struct page *page;
 	unsigned int offset = handle & ~PAGE_MASK;
 
-	if (dev->dma_coherent || !iova)
+	if (dev->dma_coherent || WARN(handle == DMA_MAPPING_ERROR, "invalid iommu iova address.\n"))
 		return;
 
 	page = phys_to_page(iommu_iova_to_phys(mapping->domain, iova));

From f1f8e516275828ee720312730be7c27991808930 Mon Sep 17 00:00:00 2001
From: Simon Xue <xxm@rock-chips.com>
Date: Wed, 2 Apr 2025 11:49:17 +0800
Subject: [PATCH 07/24] ARM/dma-mapping: fix range overflow

Change the variable type to 'unsigned long long' to represent the full 4GB space

Change-Id: I93f3fddbede0ebcd08dfce9c8103798554875c30
Signed-off-by: Simon Xue <xxm@rock-chips.com>
---
 arch/arm/mm/dma-mapping.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/mm/dma-mapping.c b/arch/arm/mm/dma-mapping.c
index 51e1dd360456..6fe6055e87f0 100644
--- a/arch/arm/mm/dma-mapping.c
+++ b/arch/arm/mm/dma-mapping.c
@@ -821,7 +821,7 @@ static inline void __free_iova(struct dma_iommu_mapping *mapping,
 	unsigned int start, count;
 	size_t mapping_size = mapping->bits << PAGE_SHIFT;
 	unsigned long flags;
-	dma_addr_t bitmap_base;
+	unsigned long long bitmap_base;
 	u32 bitmap_index;
 
 	if (!size)

From 93e830dcccd142e5d78b4cf19b0d2c184537ccbf Mon Sep 17 00:00:00 2001
From: Cai YiWei <cyw@rock-chips.com>
Date: Thu, 3 Apr 2025 11:50:27 +0800
Subject: [PATCH 08/24] media: rockchip: isp: remove clk 600M for isp35

Change-Id: I6a9fa6b1fd61422dbfd998ebbb14bf477e3aa71b
Signed-off-by: Cai YiWei <cyw@rock-chips.com>
---
 drivers/media/platform/rockchip/isp/hw.c | 2 --
 1 file changed, 2 deletions(-)

diff --git a/drivers/media/platform/rockchip/isp/hw.c b/drivers/media/platform/rockchip/isp/hw.c
index c20bd723b10c..a361d5077551 100644
--- a/drivers/media/platform/rockchip/isp/hw.c
+++ b/drivers/media/platform/rockchip/isp/hw.c
@@ -836,8 +836,6 @@ static const struct isp_clk_info rv1126b_isp_clk_rate[] = {
 		.clk_rate = 400,
 	}, {
 		.clk_rate = 500,
-	}, {
-		.clk_rate = 600,
 	}
 };
 

From bfd9dfad2ea6fadfe7758da5abac5d2f293041bd Mon Sep 17 00:00:00 2001
From: Cai YiWei <cyw@rock-chips.com>
Date: Thu, 3 Apr 2025 11:11:21 +0800
Subject: [PATCH 09/24] media: rockchip: isp: fix isp35 lsc and awb error for
 aiisp en

Change-Id: I1bef27b5328684343f898e52f4b65e69118adb16
Signed-off-by: Cai YiWei <cyw@rock-chips.com>
---
 .../platform/rockchip/isp/isp_params_v35.c    | 31 +++++++++++++++++--
 .../media/platform/rockchip/isp/regs_v3x.h    |  2 ++
 2 files changed, 30 insertions(+), 3 deletions(-)

diff --git a/drivers/media/platform/rockchip/isp/isp_params_v35.c b/drivers/media/platform/rockchip/isp/isp_params_v35.c
index 7cb381ded56c..d442c9932bb6 100644
--- a/drivers/media/platform/rockchip/isp/isp_params_v35.c
+++ b/drivers/media/platform/rockchip/isp/isp_params_v35.c
@@ -535,7 +535,7 @@ isp_lsc_config(struct rkisp_isp_params_vdev *params_vdev,
 	}
 
 	ctrl = isp3_param_read(params_vdev, ISP3X_LSC_CTRL, id);
-	ctrl &= ISP35_MODULE_EN;
+	ctrl &= (ISP35_MODULE_EN | ISP3X_LSC_PRE_RD_ST_MODE);
 	ctrl |= !!arg->sector_16x16 << 2;
 	isp3_param_write(params_vdev, ctrl, ISP3X_LSC_CTRL, id);
 
@@ -547,15 +547,38 @@ isp_lsc_config(struct rkisp_isp_params_vdev *params_vdev,
 static void
 isp_lsc_enable(struct rkisp_isp_params_vdev *params_vdev, bool en, u32 id)
 {
+	struct rkisp_device *dev = params_vdev->dev;
 	u32 val = isp3_param_read(params_vdev, ISP3X_LSC_CTRL, id);
+	u32 path_sel;
 
 	if (en == !!(val & ISP35_MODULE_EN))
 		return;
 
-	if (en)
+	if (en) {
 		val |= ISP35_MODULE_EN;
-	else
+		if (dev->is_aiisp_en && !dev->is_aiisp_sync) {
+			val &= ~ISP3X_LSC_PRE_RD_ST_MODE;
+
+			path_sel = isp3_param_read_cache(params_vdev, ISP3X_VI_ISP_PATH, id);
+			/* drcLSC default frame end read table */
+			path_sel |= ISP3X_LSC_CFG_SEL(3);
+			isp3_param_write(params_vdev, path_sel, ISP3X_VI_ISP_PATH, id);
+			isp3_param_write(params_vdev, val, ISP3X_LSC_CTRL, id);
+			/* awbLSC default frame end read table */
+			path_sel &= ~ISP3X_LSC_CFG_SEL(3);
+			path_sel |= ISP3X_LSC_CFG_SEL(2);
+			isp3_param_write(params_vdev, path_sel, ISP3X_VI_ISP_PATH, id);
+			isp3_param_write(params_vdev, val, ISP3X_LSC_CTRL, id);
+			/* mainLSC default frame start read table and change to frame end */
+			path_sel &= ~ISP3X_LSC_CFG_SEL(3);
+			path_sel |= ISP3X_LSC_CFG_SEL(1);
+			isp3_param_write(params_vdev, path_sel, ISP3X_VI_ISP_PATH, id);
+
+			val |= ISP3X_LSC_PRE_RD_ST_MODE;
+		}
+	} else {
 		val &= ~(ISP35_MODULE_EN | ISP35_SELF_FORCE_UPD);
+	}
 	isp3_param_write(params_vdev, val, ISP3X_LSC_CTRL, id);
 }
 
@@ -1267,6 +1290,8 @@ isp_rawawb_config(struct rkisp_isp_params_vdev *params_vdev,
 		!!arg->blk_measure_xytype << 2 |
 		!!arg->blk_measure_mode << 1 |
 		!!arg->blk_measure_enable;
+	if (dev->is_aiisp_en)
+		value |= ISP35_RAWAWB_BNR_BE_SEL;
 	isp3_param_write(params_vdev, value, ISP3X_RAWAWB_BLK_CTRL, id);
 
 	h_offs = arg->h_offs & ~0x1;
diff --git a/drivers/media/platform/rockchip/isp/regs_v3x.h b/drivers/media/platform/rockchip/isp/regs_v3x.h
index 55a47652e7dc..2dc7f2694a86 100644
--- a/drivers/media/platform/rockchip/isp/regs_v3x.h
+++ b/drivers/media/platform/rockchip/isp/regs_v3x.h
@@ -3358,6 +3358,8 @@
 #define ISP32_RAWAWB_2DDR_PATH_DS	BIT(27)
 #define ISP32_RAWAWB_2DDR_PATH_ERR	BIT(29)
 
+#define ISP35_RAWAWB_BNR_BE_SEL		BIT(10)
+
 #define ISP33_RAWAWB_WRAM_CLR		BIT(31)
 
 /* AIAWB */

From d87bfc4a090c9a0e314e7c86806fe47a5751158f Mon Sep 17 00:00:00 2001
From: Finley Xiao <finley.xiao@rock-chips.com>
Date: Wed, 2 Apr 2025 09:51:38 +0800
Subject: [PATCH 10/24] thermal: rockchip: Use software ctrl mode for rv1126b

This make the phy enter continuous sampling mode, and get temperature faster.

Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Change-Id: I8c367e3677815f7c32ab705b32e95f1675798045
---
 drivers/thermal/rockchip_thermal.c | 7 ++++---
 1 file changed, 4 insertions(+), 3 deletions(-)

diff --git a/drivers/thermal/rockchip_thermal.c b/drivers/thermal/rockchip_thermal.c
index 3fcfed197e70..77fc7c58e413 100644
--- a/drivers/thermal/rockchip_thermal.c
+++ b/drivers/thermal/rockchip_thermal.c
@@ -347,8 +347,8 @@ struct rockchip_thermal_data {
 #define RV1126B_TARGET_WIDTH			24000
 #define RV1126B_DEF_BIAS			32
 #define RV1126B_BIAS_MASK			(0x7f << 16)
-#define RV1126B_HW_CTRL				BIT(15)
-#define RV1126B_HW_CTRL_MASK			(BIT(15) << 16)
+#define RV1126B_SW_CTRL				0x8028
+#define RV1126B_SW_CTRL_MASK			(0x8078 << 16)
 
 #define GRF_SARADC_TESTBIT_ON			(0x10001 << 2)
 #define GRF_TSADC_TESTBIT_H_ON			(0x10001 << 2)
@@ -1705,7 +1705,8 @@ static void rv1126b_tsadc_phy_init(struct device *dev, struct regmap *grf,
 		     phy_cfg->bias | RV1126B_BIAS_MASK);
 	regmap_write(grf, RV1126B_GRF_TSADC_CON6,
 		     RV1126B_CH_EN | RV1126B_CH_EN_MASK);
-	regmap_write(grf, RV1126B_GRF_TSADC_CON0, RV1126B_HW_CTRL_MASK);
+	regmap_write(grf, RV1126B_GRF_TSADC_CON0,
+		     RV1126B_SW_CTRL | RV1126B_SW_CTRL_MASK);
 	regmap_write(grf, RV1126B_GRF_TSADC_CON1,
 		     RV1126B_UNLOCK_VALUE | RV1126B_UNLOCK_VALUE_MASK);
 	regmap_write(grf, RV1126B_GRF_TSADC_CON1,

From 79b29646f6801f03e9f67c759013583ae34a2edd Mon Sep 17 00:00:00 2001
From: Jason Zhu <jason.zhu@rock-chips.com>
Date: Wed, 2 Apr 2025 15:43:50 +0800
Subject: [PATCH 11/24] ASoC: rockchip: pdm_v2: calculate the data shift if not
 set by dts on rv1126b

Change-Id: I0ae2d47d3f1091fd1673508ccc36a8e0daebb9a2
Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
---
 sound/soc/rockchip/rockchip_pdm_v2.c | 15 +++++++++++++--
 1 file changed, 13 insertions(+), 2 deletions(-)

diff --git a/sound/soc/rockchip/rockchip_pdm_v2.c b/sound/soc/rockchip/rockchip_pdm_v2.c
index e3e9f7a46dc0..9282f39c1101 100644
--- a/sound/soc/rockchip/rockchip_pdm_v2.c
+++ b/sound/soc/rockchip/rockchip_pdm_v2.c
@@ -136,7 +136,7 @@ static void rockchip_pdm_v2_rxctrl(struct rk_pdm_v2_dev *pdm, int on)
 static int rockchip_pdm_v2_set_samplerate(struct rk_pdm_v2_dev *pdm, unsigned int samplerate)
 {
 	unsigned int upsamplerate, mclk, ratio, scale = 0;
-	int index, ret = 0;
+	int i, index, ret = 0;
 
 	index = get_pdm_v2_clkref(pdm, samplerate);
 	if (index < 0)
@@ -152,6 +152,17 @@ static int rockchip_pdm_v2_set_samplerate(struct rk_pdm_v2_dev *pdm, unsigned in
 	if (ret)
 		return ret;
 
+	if (pdm->version == RV1126B_PDM) {
+		/* calculate the data shift if not set by dts.
+		 * Set default phase offset of 180 degrees.
+		 */
+		mclk = clk_get_rate(pdm->clk);
+		if (pdm->data_shift[0] == 0) {
+			for (i = 0; i < PDM_V2_CHANNEL_MAX; i++)
+				pdm->data_shift[i] = (mclk / upsamplerate / 2) + 1;
+		}
+	}
+
 	ratio = upsamplerate / samplerate / 2;
 	switch (ratio) {
 	case 8:
@@ -241,6 +252,7 @@ static int rockchip_pdm_v2_hw_params(struct snd_pcm_substream *substream,
 				   PDM_V2_FILT1_HPF_V2_FREQ_60);
 	}
 
+	rockchip_pdm_v2_set_samplerate(pdm, params_rate(params));
 	if (pdm->version == RV1126B_PDM) {
 		/* PDM data shift */
 		n = params_channels(params);
@@ -266,7 +278,6 @@ static int rockchip_pdm_v2_hw_params(struct snd_pcm_substream *substream,
 		}
 	}
 
-	rockchip_pdm_v2_set_samplerate(pdm, params_rate(params));
 	val = 0;
 	switch (params_format(params)) {
 	case SNDRV_PCM_FORMAT_S16_LE:

From 6c11010df037bb9ed50279dea161b2f9a969bb22 Mon Sep 17 00:00:00 2001
From: Hu Kejun <william.hu@rock-chips.com>
Date: Wed, 2 Apr 2025 18:56:46 +0800
Subject: [PATCH 12/24] media: rockchip: aiisp: remove some spinlock

Signed-off-by: Hu Kejun <william.hu@rock-chips.com>
Change-Id: Ie73d3ea85a4fb851e2b5cb71d31a33a70c9ad300
---
 drivers/media/platform/rockchip/aiisp/aiisp.c | 11 ++++++++++-
 drivers/media/platform/rockchip/aiisp/hw.c    |  3 ---
 2 files changed, 10 insertions(+), 4 deletions(-)

diff --git a/drivers/media/platform/rockchip/aiisp/aiisp.c b/drivers/media/platform/rockchip/aiisp/aiisp.c
index 7c84934ec6e5..5869ffa96192 100644
--- a/drivers/media/platform/rockchip/aiisp/aiisp.c
+++ b/drivers/media/platform/rockchip/aiisp/aiisp.c
@@ -1112,7 +1112,7 @@ static int rkaiisp_update_buf(struct rkaiisp_device *aidev)
 	struct rkaiisp_hw_dev *hw_dev = aidev->hw_dev;
 	struct rkisp_aiisp_st idxbuf = {0};
 	unsigned long flags = 0;
-	int ret = -1;
+	int ret = 0;
 
 	spin_lock_irqsave(&hw_dev->hw_lock, flags);
 	if (!kfifo_is_empty(fifo))
@@ -1497,6 +1497,9 @@ static void rkaiisp_vb2_buf_queue(struct vb2_buffer *vb)
 	spin_lock_irqsave(&aidev->config_lock, flags);
 	list_add_tail(&buf->queue, &aidev->params);
 	spin_unlock_irqrestore(&aidev->config_lock, flags);
+
+	v4l2_dbg(1, rkaiisp_debug, &aidev->v4l2_dev,
+		"queue param buffer\n");
 }
 
 static void rkaiisp_vb2_stop_streaming(struct vb2_queue *vq)
@@ -1544,6 +1547,9 @@ static void rkaiisp_vb2_stop_streaming(struct vb2_queue *vq)
 
 	pm_runtime_put_sync(aidev->dev);
 	atomic_dec(&hw_dev->refcnt);
+
+	v4l2_dbg(1, rkaiisp_debug, &aidev->v4l2_dev,
+		"stop streaming %d, hwstate %d\n", aidev->streamon, aidev->hwstate);
 }
 
 static int
@@ -1561,6 +1567,9 @@ rkaiisp_vb2_start_streaming(struct vb2_queue *queue, unsigned int count)
 	pm_runtime_get_sync(aidev->dev);
 	atomic_inc(&hw_dev->refcnt);
 
+	v4l2_dbg(1, rkaiisp_debug, &aidev->v4l2_dev,
+		"start streaming %d\n", aidev->streamon);
+
 	return 0;
 }
 
diff --git a/drivers/media/platform/rockchip/aiisp/hw.c b/drivers/media/platform/rockchip/aiisp/hw.c
index f355506880b7..7c99a62f9d5b 100644
--- a/drivers/media/platform/rockchip/aiisp/hw.c
+++ b/drivers/media/platform/rockchip/aiisp/hw.c
@@ -68,10 +68,8 @@ static irqreturn_t hw_irq_hdl(int irq, void *ctx)
 					id = i;
 				}
 			}
-			spin_unlock(&hw_dev->hw_lock);
 
 			if (max > 0) {
-				spin_lock(&hw_dev->hw_lock);
 				hw_dev->is_idle = false;
 				hw_dev->cur_dev_id = id;
 				aidev = hw_dev->aidev[hw_dev->cur_dev_id];
@@ -81,7 +79,6 @@ static irqreturn_t hw_irq_hdl(int irq, void *ctx)
 					hw_dev->cur_dev_id, max);
 				rkaiisp_trigger(aidev);
 			} else {
-				spin_lock(&hw_dev->hw_lock);
 				hw_dev->is_idle = true;
 				spin_unlock(&hw_dev->hw_lock);
 			}

From 1b6dac90dbb1eecf11c81e5f614df3af0b52a3b7 Mon Sep 17 00:00:00 2001
From: Elaine Zhang <zhangqing@rock-chips.com>
Date: Wed, 26 Mar 2025 15:18:53 +0800
Subject: [PATCH 13/24] rtc: rockchip: remove rtc test for rv1126b

Change-Id: Ib969607e92b0d19a630faf33772aa19ad3954c2c
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
---
 drivers/rtc/rtc-rockchip.c | 87 --------------------------------------
 1 file changed, 87 deletions(-)

diff --git a/drivers/rtc/rtc-rockchip.c b/drivers/rtc/rtc-rockchip.c
index 5fb2a1ac070f..d26a07f5a904 100644
--- a/drivers/rtc/rtc-rockchip.c
+++ b/drivers/rtc/rtc-rockchip.c
@@ -710,92 +710,6 @@ static int rv1106_rtc_test_start(struct regmap *regmap)
 	return ret;
 }
 
-static int rv1126b_rtc_test_start(struct regmap *regmap)
-{
-	u64 camp, tcamp;
-	u32 count[4], counts, ref;
-	int ret, done = 0, trim_dir, c_hour, c_day, c_mon;
-
-	ret = rockchip_rtc_write(regmap, RV1126B_RTC_TEST_LEN,
-				 CLK32K_TEST_LEN);
-	if (ret) {
-		pr_err("%s:Failed to update RTC CLK32K TEST LEN: %d\n",
-		       __func__, ret);
-		return ret;
-	}
-
-	ret = rockchip_rtc_update_bits(regmap, RV1126B_RTC_TEST_ST,
-				       RV1126B_CLK32K_TEST_START,
-				       RV1126B_CLK32K_TEST_START);
-	if (ret) {
-		pr_err("%s:Failed to update RTC CLK32K TEST STATUS : %d\n",
-		       __func__, ret);
-		return ret;
-	}
-
-	ret = regmap_read_poll_timeout(regmap, RV1126B_RTC_TEST_ST, done,
-				       (done & RV1126B_CLK32K_TEST_DONE), 20000, RTC_TIMEOUT);
-	if (ret)
-		pr_err("%s:timeout waiting for RTC TEST STATUS : %d\n", __func__, ret);
-
-	ret = regmap_bulk_read(regmap,
-			       RV1126B_RTC_CNT_0,
-			       count, 4);
-	if (ret) {
-		pr_err("Failed to read RTC count REG: %d\n", ret);
-		return ret;
-	}
-
-	counts = count[0] | (count[1] << 8) |
-		 (count[2] << 16) | (count[3] << 24);
-	ref = CLK32K_TEST_REF_CLK * (CLK32K_TEST_LEN + 1);
-
-	if (counts > ref) {
-		trim_dir = 0;
-		camp = (60ULL / (CLK32K_TEST_LEN + 1)) * (32768 * (counts - ref));
-		do_div(camp, (CLK32K_TEST_REF_CLK / 1000));
-	} else {
-		trim_dir = CLK32K_COMP_DIR_ADD;
-		camp = (60ULL / (CLK32K_TEST_LEN + 1)) * (32768 * (counts - ref));
-		do_div(camp, (CLK32K_TEST_REF_CLK / 1000));
-	}
-	tcamp = camp;
-	do_div(tcamp, 1000);
-	c_hour = tcamp & 0xff;
-	c_day = (tcamp & 0x7f00) >> 8;
-	if (c_hour > 1)
-		rockchip_rtc_write(regmap, RTC_COMP_H, bin2bcd(c_hour));
-	else
-		rockchip_rtc_write(regmap, RTC_COMP_H, CLK32K_NO_COMP);
-	if (c_day > 1)
-		rockchip_rtc_write(regmap, RTC_COMP_D, bin2bcd(c_day) | trim_dir);
-	else
-		rockchip_rtc_write(regmap, RTC_COMP_D, CLK32K_NO_COMP | trim_dir);
-
-	c_mon = do_div(camp, 1000);
-	if (c_mon > 0xff)
-		c_mon = 0xff;
-	if (c_mon > 1)
-		rockchip_rtc_write(regmap, RTC_COMP_M, bin2bcd(c_mon));
-	else
-		rockchip_rtc_write(regmap, RTC_COMP_M, CLK32K_NO_COMP);
-
-	ret = regmap_read(regmap, RTC_CTRL, &done);
-	if (ret) {
-		pr_err("Failed to read RTC_CTRL: %d\n", ret);
-		return ret;
-	}
-
-	ret = rockchip_rtc_update_bits(regmap, RTC_CTRL,
-				       CLK32K_COMP_EN | RV1126B_COMP_MODE,
-				       CLK32K_COMP_EN | RV1126B_COMP_MODE);
-	if (ret) {
-		pr_err("%s:Failed to update RTC CTRL : %d\n", __func__, ret);
-		return ret;
-	}
-	return ret;
-}
-
 /*
  * Due to the analog generator 32k clock affected by
  * temperature, voltage, clock precision need test
@@ -925,7 +839,6 @@ static const struct rockchip_rtc_chip rv1103b_rtc_data = {
 static const struct rockchip_rtc_chip rv1126b_rtc_data = {
 	.initialize = rv1103b_rtc_init,
 	.clamp_en = rv1126b_rtc_clamp,
-	.test_start = rv1126b_rtc_test_start,
 };
 
 static const struct of_device_id rockchip_rtc_of_match[] = {

From c9fb69bc87da0a8bc7a255dcf02194f2e083c434 Mon Sep 17 00:00:00 2001
From: Elaine Zhang <zhangqing@rock-chips.com>
Date: Wed, 26 Mar 2025 15:22:59 +0800
Subject: [PATCH 14/24] arm64: dts: rockchip: rv1126b: fix rtc clock

Change-Id: I3dfe6c6b97be2fffcfcaa1fef3c705dbbf38190b
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
---
 arch/arm64/boot/dts/rockchip/rv1126b.dtsi | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm64/boot/dts/rockchip/rv1126b.dtsi b/arch/arm64/boot/dts/rockchip/rv1126b.dtsi
index 72a4a1c395a4..61406e48f85b 100644
--- a/arch/arm64/boot/dts/rockchip/rv1126b.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rv1126b.dtsi
@@ -2382,9 +2382,9 @@
 		reg = <0x21280000 0x1000>;
 		rockchip,grf = <&grf>;
 		interrupts = <GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>;
-		clocks = <&cru PCLK_RTC_ROOT>;
+		clocks = <&cru PCLK_RTC_TEST>;
 		clock-names = "pclk_phy";
-		assigned-clocks = <&cru PCLK_RTC_ROOT>;
+		assigned-clocks = <&cru PCLK_RTC_TEST>;
 		assigned-clock-rates = <50000000>;
 		status = "disabled";
 	};

From 8617d03e81d61b8b9815c30c6e60697a52d2ed24 Mon Sep 17 00:00:00 2001
From: Chaoyi Chen <chaoyi.chen@rock-chips.com>
Date: Tue, 1 Apr 2025 11:42:53 +0800
Subject: [PATCH 15/24] drm/rockchip: vop: Fix wrong RV1126B_CLK_CNT offset

According to TRM, RV1126B_CLK_CNT should be 0x44.

Fixes: 8f17704e58db ("drm/rockchip: vop: Add dclk rate count for RV1126B")
Change-Id: Ic6f57e85ce6adfef1adae005f69069cb61cf99d4
Signed-off-by: Chaoyi Chen <chaoyi.chen@rock-chips.com>
---
 drivers/gpu/drm/rockchip/rockchip_vop_reg.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/rockchip/rockchip_vop_reg.h b/drivers/gpu/drm/rockchip/rockchip_vop_reg.h
index d175c742c613..fa58867b243e 100644
--- a/drivers/gpu/drm/rockchip/rockchip_vop_reg.h
+++ b/drivers/gpu/drm/rockchip/rockchip_vop_reg.h
@@ -1040,7 +1040,7 @@
 #define RV1126_GRF_IOFUNC_CON3			0x1026c
 
 #define RV1126B_DSP_CTRL1                       0x0024
-#define RV1126B_CLK_CNT				0x0040
+#define RV1126B_CLK_CNT				0x0044
 #define RV1126B_GRF_VOP_LCDC_CON		0x30b9c
 #define RV1126B_WB_CTRL				0x0280
 #define RV1126B_WB_XSCAL_FACTOR			0x0284

From e5db0686ad7f85bdb202f8acf6a953bbb7c3832b Mon Sep 17 00:00:00 2001
From: Shengfei Xu <xsf@rock-chips.com>
Date: Fri, 28 Mar 2025 14:46:21 +0800
Subject: [PATCH 16/24] power: supply: rk817_battery: Refactor code and update
 state-of-charge algorithm
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

This algorithm dynamically estimates a battery's total dischargeable
capacity by correlating real-time internal resistance (measured at
cutoff voltage) with instantaneous current under varying operational
conditions. To account for temperature-dependent resistance
characteristics, the method implements a worst-caseselection protocol:
comparing the measured internal resistance against the
room-temperaturereference value (25°C cutoff threshold) and adopting
the higher resistance value for capacity computation.

Change-Id: I6c00091a76753c707ca8d0043791173db56d5a41
Signed-off-by: Shengfei Xu <xsf@rock-chips.com>
---
 drivers/power/supply/rk817_battery.c | 1367 +++++++++-----------------
 1 file changed, 438 insertions(+), 929 deletions(-)

diff --git a/drivers/power/supply/rk817_battery.c b/drivers/power/supply/rk817_battery.c
index dc5a25440ca3..f62f1aae4ba8 100644
--- a/drivers/power/supply/rk817_battery.c
+++ b/drivers/power/supply/rk817_battery.c
@@ -1,18 +1,9 @@
+// SPDX-License-Identifier: GPL-2.0+
 /*
  * rk817 battery  driver
  *
  * Copyright (C) 2018 Rockchip Electronics Co., Ltd.
  *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
  */
 
 #define pr_fmt(fmt) "rk817-bat: " fmt
@@ -52,61 +43,35 @@ module_param_named(dbg_level, dbg_enable, int, 0644);
 
 #define BAT_INFO(fmt, args...) pr_info(fmt, ##args)
 
-#define DRIVER_VERSION	"1.00"
+#define DRIVER_VERSION	"1.10"
 #define SFT_SET_KB	1
 
 #define DIV(x)	((x) ? (x) : 1)
 #define ENABLE	0x01
 #define DISABLE	0x00
 #define MAX_INTERPOLATE		1000
-#define MAX_PERCENTAGE		100
+/* Maximum Resolution Precision of Percentage: 0.001% */
+#define MAX_PERCENTAGE		(100 * 1000)
 #define MAX_INT			0x7FFF
-
-/* RK818_GGCON */
 #define OCV_SAMP_MIN_MSK	0x0c
 #define OCV_SAMP_8MIN		(0x00 << 2)
-
-#define ADC_CAL_8MIN		0x00
-#define RELAX_VOL12_UPD_MSK	(RELAX_VOL1_UPD | RELAX_VOL2_UPD)
 #define MINUTE(x)	\
 	((x) * 60)
 
 #define ADC_TO_CURRENT(adc_value, samp_res)	\
-	(adc_value * 172 / 1000 / samp_res)
+	(adc_value * 1720 / 1000 / samp_res)
 #define CURRENT_TO_ADC(current, samp_res)	\
-	(current * 1000 * samp_res / 172)
+	(current * 1000 * samp_res / 1720)
 
 #define ADC_TO_CAPACITY(adc_value, samp_res)	\
-	(adc_value / 1000 * 172 / 3600 / samp_res)
+	(adc_value / 1000 * 1720 / 3600 / samp_res)
 #define CAPACITY_TO_ADC(capacity, samp_res)	\
-	(capacity * samp_res * 3600 / 172 * 1000)
+	(capacity * samp_res * 3600 / 1720 * 1000)
 
 #define ADC_TO_CAPACITY_UAH(adc_value, samp_res)	\
-	(adc_value / 3600 * 172 / samp_res)
+	(adc_value / 3600 * 1720 / samp_res)
 #define ADC_TO_CAPACITY_MAH(adc_value, samp_res)	\
-	(adc_value / 1000 * 172 / 3600 / samp_res)
-
-/* THREAML_REG */
-#define TEMP_85C		(0x00 << 2)
-#define TEMP_95C		(0x01 << 2)
-#define TEMP_105C		(0x02 << 2)
-#define TEMP_115C		(0x03 << 2)
-
-#define ZERO_LOAD_LVL1			1400
-#define ZERO_LOAD_LVL2			600
-
-/* zero algorithm */
-#define PWROFF_THRESD			3400
-#define MIN_ZERO_DSOC_ACCURACY		10	/*0.01%*/
-#define MIN_ZERO_OVERCNT		100
-#define MIN_ACCURACY			1
-#define DEF_PWRPATH_RES			50
-#define WAIT_DSOC_DROP_SEC		15
-#define WAIT_SHTD_DROP_SEC		30
-#define MIN_ZERO_GAP_XSOC1		10
-#define MIN_ZERO_GAP_XSOC2		5
-#define MIN_ZERO_GAP_XSOC3		3
-#define MIN_ZERO_GAP_CALIB		5
+	(adc_value / 1000 * 1720 / 3600 / samp_res)
 
 #define ADC_CALIB_THRESHOLD		4
 #define ADC_CALIB_LMT_MIN		3
@@ -131,12 +96,6 @@ module_param_named(dbg_level, dbg_enable, int, 0644);
 #define DEFAULT_ZERO_RESERVE_DSOC	10
 #define DEFAULT_SAMPLE_RES		20
 
-/* sample resistor and division */
-#define SAMPLE_RES_10MR			10
-#define SAMPLE_RES_20MR			20
-#define SAMPLE_RES_DIV1			1
-#define SAMPLE_RES_DIV2			2
-
 /* sleep */
 #define SLP_CURR_MAX			40
 #define SLP_CURR_MIN			6
@@ -148,7 +107,7 @@ module_param_named(dbg_level, dbg_enable, int, 0644);
 #define REBOOT_PERIOD_SEC		180
 #define REBOOT_MAX_CNT			80
 
-#define TIMER_MS_COUNTS		1000
+#define TIMER_MS_COUNTS			1000
 /* fcc */
 #define MIN_FCC				500
 #define CAP_INVALID			0x80
@@ -164,13 +123,10 @@ module_param_named(dbg_level, dbg_enable, int, 0644);
 #define FINISH_CHRG_CUR1		1000
 #define FINISH_CHRG_CUR2		1500
 #define FINISH_MAX_SOC_DELAY		20
-#define TERM_CHRG_DSOC			88
-#define TERM_CHRG_CURR			600
-#define TERM_CHRG_K			650
-#define SIMULATE_CHRG_INTV		8
-#define SIMULATE_CHRG_CURR		400
-#define SIMULATE_CHRG_K			1500
-#define FULL_CHRG_K			400
+/* Discharge Current Threshold */
+#define FINISH_CURR_THRESD		(-30)
+/* OCV Table Percentage Accuracy: 5.000% */
+#define OCV_TABLE_STEP			5000
 
 enum work_mode {
 	MODE_ZERO = 0,
@@ -259,7 +215,7 @@ enum rk817_battery_fields {
 	NEW_FCC_REG2, NEW_FCC_REG1, NEW_FCC_REG0,
 	RESET_MODE,
 	FG_INIT, HALT_CNT_REG, CALC_REST_REGL, CALC_REST_REGH,
-	VOL_ADC_B3,  VOL_ADC_B2, VOL_ADC_B1, VOL_ADC_B0,
+	VOL_ADC_B3, VOL_ADC_B2, VOL_ADC_B1, VOL_ADC_B0,
 	VOL_ADC_K3, VOL_ADC_K2, VOL_ADC_K1, VOL_ADC_K0,
 	BAT_EXS, CHG_STS, BAT_OVP_STS, CHRG_IN_CLAMP,
 	CHIP_NAME_H, CHIP_NAME_L,
@@ -436,27 +392,10 @@ static const struct reg_field rk817_battery_reg_fields[] = {
 
 struct battery_platform_data {
 	u32 *ocv_table;
-	u32 *zero_table;
-
-	u32 table_t[4][21];
-	int temp_t[4];
-	u32 temp_t_num;
-
-	u32 *ntc_table;
 	u32 ocv_size;
-	u32 ntc_size;
-	int ntc_degree_from;
-	u32 ntc_factor;
-	u32 max_input_current;
-	u32 max_chrg_current;
-	u32 max_chrg_voltage;
-	u32 lp_input_current;
-	u32 lp_soc_min;
-	u32 lp_soc_max;
+
 	u32 pwroff_vol;
 	u32 monitor_sec;
-	u32 zero_algorithm_vol;
-	u32 zero_reserve_dsoc;
 	u32 bat_res;
 	u32 design_capacity;
 	u32 design_qmax;
@@ -464,58 +403,38 @@ struct battery_platform_data {
 	u32 sleep_exit_current;
 	u32 sleep_filter_current;
 
-	u32 power_dc2otg;
 	u32 max_soc_offset;
 	u32 bat_mode;
-	u32 fb_temp;
-	u32 energy_mode;
-	u32 cccv_hour;
-	u32 dc_det_adc;
-	int dc_det_pin;
-	u8  dc_det_level;
 	u32 sample_res;
 	u32 bat_res_up;
 	u32 bat_res_down;
 	u32 design_max_voltage;
-	bool extcon;
-	u32 low_pwr_sleep;
+	int fake_full_soc;
+	int charge_stay_awake;
 };
 
 struct rk817_battery_device {
 	struct platform_device		*pdev;
-	struct device				*dev;
-	struct i2c_client			*client;
+	struct device			*dev;
+	struct i2c_client		*client;
 	struct rk808			*rk817;
-	struct power_supply			*bat;
+	struct power_supply		*bat;
 	struct power_supply		*chg_psy;
-	struct power_supply		*usb_psy;
-	struct power_supply		*ac_psy;
-	struct regmap			*regmap;
 	struct regmap_field		*rmap_fields[F_MAX_FIELDS];
 	struct battery_platform_data	*pdata;
 	struct workqueue_struct		*bat_monitor_wq;
 	struct delayed_work		bat_delay_work;
 	struct delayed_work		calib_delay_work;
-	struct work_struct		resume_work;
-	struct wake_lock		wake_lock;
 	struct timer_list		caltimer;
 
-	int				res_div;
+	int				sample_res;
 	int				bat_res;
 	bool				is_first_power_on;
 	int				chrg_status;
-	int				res_fac;
-	int				over_20mR;
 	bool				is_initialized;
-	bool				bat_first_power_on;
-	u8				ac_in;
-	u8				usb_in;
-	u8				otg_in;
-	u8				dc_in;
-	u8				prop_status;
-	int				cvtlmt_irq;
 	int				current_avg;
 	int				current_relax;
+	int				current_sleep;
 	int				voltage_usb;
 	int				voltage_sys;
 	int				voltage_avg;
@@ -527,12 +446,12 @@ struct rk817_battery_device {
 	int				design_cap;
 	int				nac;
 	int				fcc;
-	int				lock_fcc;
 	int				qmax;
 	int				dsoc;
 	int				rsoc;
-	int				poffset;
+	int				delta_rsoc;
 	int				fake_offline;
+	int				fake_full_soc;
 	int				age_ocv_soc;
 	bool				age_allow_update;
 	int				age_level;
@@ -540,57 +459,25 @@ struct rk817_battery_device {
 	int				pwron_voltage;
 	int				age_voltage;
 	int				age_adjust_cap;
+	int				expected_voltage;
 	unsigned long			age_keep_sec;
-	int				zero_timeout_cnt;
-	int				zero_remain_cap;
-	int				zero_dsoc;
-	int				zero_linek;
-	u64				zero_drop_sec;
-	u64				shtd_drop_sec;
-
 	int				powerpatch_res;
-	int				zero_voltage_avg;
-	int				zero_current_avg;
-	int				zero_vsys;
-	int				zero_dead_voltage;
-	int				zero_dead_soc;
-	int				zero_dead_cap;
-	int				zero_batvol_to_ocv;
-	int				zero_batocv_to_soc;
-	int				zero_batocv_to_cap;
-	int				zero_xsoc;
 	unsigned long			finish_base;
 	time64_t			rtc_base;
 	int				sm_remain_cap;
+	int				delta_cap_remainder;
 	int				sm_linek;
-	int				sm_chrg_dsoc;
-	int				sm_dischrg_dsoc;
 	int				smooth_soc;
-	int				algo_rest_val;
-	int				algo_rest_mode;
-	int				sleep_sum_cap;
-	int				sleep_remain_cap;
 	unsigned long			sleep_dischrg_sec;
 	unsigned long			sleep_sum_sec;
 	bool				sleep_chrg_online;
 	u8				sleep_chrg_status;
-	bool				adc_allow_update;
-	int                             fb_blank;
 	bool				s2r; /*suspend to resume*/
 	u32				work_mode;
+	bool				active_awake;
 	int				temperature;
-	int				chrg_cur_lp_input;
-	int				chrg_vol_sel;
-	int				chrg_cur_input;
-	int				chrg_cur_sel;
 	u32				monitor_ms;
 	u32				pwroff_min;
-	u32				adc_calib_cnt;
-	unsigned long			chrg_finish_base;
-	unsigned long			boot_base;
-	unsigned long			flat_match_sec;
-	unsigned long			plug_in_base;
-	unsigned long			plug_out_base;
 	u8				halt_cnt;
 	bool				is_halt;
 	bool				is_max_soc_offset;
@@ -598,37 +485,27 @@ struct rk817_battery_device {
 	bool				is_ocv_calib;
 	bool				is_first_on;
 	bool				is_force_calib;
-	int				last_dsoc;
-	u8				cvtlmt_int_event;
-	u8				slp_dcdc_en_reg;
 	int				ocv_pre_dsoc;
 	int				ocv_new_dsoc;
-	int				max_pre_dsoc;
-	int				max_new_dsoc;
+
 	int				force_pre_dsoc;
 	int				force_new_dsoc;
 
-	int				dbg_cap_low0;
+	int				dbg_dcount[10];
+	int				dbg_rcount[10];
 	int				dbg_pwr_dsoc;
 	int				dbg_pwr_rsoc;
 	int				dbg_pwr_vol;
-	int				dbg_chrg_min[10];
 	int				dbg_meet_soc;
 	int				dbg_calc_dsoc;
 	int				dbg_calc_rsoc;
 	int				is_charging;
-	unsigned long			charge_count;
 	u8				plugin_trigger;
 	u8				plugout_trigger;
-	int				plugin_irq;
-	int				plugout_irq;
 	int				chip_id;
 	int				is_register_chg_psy;
-	bool				change; /* Battery status change, report information */
 };
 
-static void rk817_bat_resume_work(struct work_struct *work);
-
 static u64 get_boot_sec(void)
 {
 	struct timespec64 ts;
@@ -765,7 +642,7 @@ static void rk817_bat_current_calibration(struct rk817_battery_device *battery)
 
 	rk817_bat_set_coffset(battery, cal_offset);
 	DBG("Caloffset: 0x%x\n", rk817_bat_get_coffset(battery));
-
+	DBG("pwron_cur: 0x%x\n", pwron_value);
 }
 
 static int rk817_bat_get_vaclib0(struct rk817_battery_device *battery)
@@ -867,12 +744,10 @@ static void rk817_bat_set_relax_sample(struct rk817_battery_device *battery)
 	int enter_thres, filter_thres;
 	struct battery_platform_data *pdata = battery->pdata;
 
-	filter_thres = pdata->sleep_filter_current * 1000 / 1506;
-
 	enter_thres = CURRENT_TO_ADC(pdata->sleep_enter_current,
-				     battery->res_div);
+				     battery->sample_res);
 	filter_thres = CURRENT_TO_ADC(pdata->sleep_filter_current,
-				      battery->res_div);
+				      battery->sample_res);
 
 	/* set relax enter and exit threshold */
 	buf = (enter_thres >> 8) & 0xff;
@@ -952,11 +827,6 @@ static int rk817_bat_get_pwron_voltage(struct rk817_battery_device *battery)
 static int rk817_bat_get_battery_voltage(struct rk817_battery_device *battery)
 {
 	int vol, val = 0, vol_temp;
-	int vcalib0, vcalib1;
-
-	vcalib0 = rk817_bat_get_vaclib0(battery);
-	vcalib1 =  rk817_bat_get_vaclib1(battery);
-
 
 	val = rk817_bat_field_read(battery, BAT_VOL_H) << 8;
 	val |= rk817_bat_field_read(battery, BAT_VOL_L) << 0;
@@ -1020,7 +890,7 @@ static int rk817_bat_get_avg_current(struct rk817_battery_device *battery)
 	if (val & 0x8000)
 		val -= 0x10000;
 
-	cur = ADC_TO_CURRENT(val, battery->res_div);
+	cur = ADC_TO_CURRENT(val, battery->sample_res);
 
 	return cur;
 }
@@ -1035,7 +905,7 @@ static int rk817_bat_get_relax_cur1(struct rk817_battery_device *battery)
 	if (val & 0x8000)
 		val -= 0x10000;
 
-	cur = ADC_TO_CURRENT(val, battery->res_div);
+	cur = ADC_TO_CURRENT(val, battery->sample_res);
 
 	return cur;
 }
@@ -1044,13 +914,13 @@ static int rk817_bat_get_relax_cur2(struct rk817_battery_device *battery)
 {
 	int cur, val = 0;
 
-	val |= rk817_bat_field_read(battery, RELAX_CUR2_H) << 8;
 	val = rk817_bat_field_read(battery, RELAX_CUR2_L);
+	val |= rk817_bat_field_read(battery, RELAX_CUR2_H) << 8;
 
 	if (val & 0x8000)
 		val -= 0x10000;
 
-	cur = ADC_TO_CURRENT(val, battery->res_div);
+	cur = ADC_TO_CURRENT(val, battery->sample_res);
 
 	return cur;
 }
@@ -1078,7 +948,7 @@ static int rk817_bat_get_ocv_current(struct rk817_battery_device *battery)
 	if (val & 0x8000)
 		val -= 0x10000;
 
-	cur = ADC_TO_CURRENT(val, battery->res_div);
+	cur = ADC_TO_CURRENT(val, battery->sample_res);
 
 	return cur;
 }
@@ -1093,7 +963,7 @@ static int rk817_bat_get_ocv_current0(struct rk817_battery_device *battery)
 	if (val & 0x8000)
 		val -= 0x10000;
 
-	cur = ADC_TO_CURRENT(val, battery->res_div);
+	cur = ADC_TO_CURRENT(val, battery->sample_res);
 
 	return cur;
 }
@@ -1107,7 +977,7 @@ static int rk817_bat_get_pwron_current(struct rk817_battery_device *battery)
 
 	if (val & 0x8000)
 		val -= 0x10000;
-	cur = ADC_TO_CURRENT(val, battery->res_div);
+	cur = ADC_TO_CURRENT(val, battery->sample_res);
 
 	return cur;
 }
@@ -1127,10 +997,9 @@ static u32 rk817_bat_get_capacity_uah(struct rk817_battery_device *battery)
 		val |= rk817_bat_field_read(battery, Q_PRESS_L1) << 8;
 		val |= rk817_bat_field_read(battery, Q_PRESS_L0) << 0;
 
-		capacity = ADC_TO_CAPACITY_UAH(val, battery->res_div);
+		capacity = ADC_TO_CAPACITY_UAH(val, battery->sample_res);
 	}
 
-	DBG("xxxxxxxxxxxxx capacity = %d\n", capacity);
 	return  capacity;
 }
 
@@ -1144,14 +1013,14 @@ static u32 rk817_bat_get_capacity_mah(struct rk817_battery_device *battery)
 		val |= rk817_bat_field_read(battery, Q_PRESS_L1) << 8;
 		val |= rk817_bat_field_read(battery, Q_PRESS_L0) << 0;
 
-		capacity = ADC_TO_CAPACITY(val, battery->res_div);
+		capacity = ADC_TO_CAPACITY(val, battery->sample_res);
 	}
 	DBG("Q_PRESS_H3 = 0x%x\n", rk817_bat_field_read(battery, Q_PRESS_H3));
 	DBG("Q_PRESS_H2 = 0x%x\n", rk817_bat_field_read(battery, Q_PRESS_H2));
 	DBG("Q_PRESS_H1 = 0x%x\n", rk817_bat_field_read(battery, Q_PRESS_L1));
 	DBG("Q_PRESS_H0 = 0x%x\n", rk817_bat_field_read(battery, Q_PRESS_L0));
 
-	DBG("xxxxxxxxxxxxx capacity = %d\n", capacity);
+	DBG("capacity = %d\n", capacity);
 	return  capacity;
 }
 
@@ -1168,9 +1037,10 @@ static void rk817_bat_init_coulomb_cap(struct rk817_battery_device *battery,
 {
 	u8 buf;
 	u32 cap;
+	int val;
 
 	fuel_gauge_q_init_info(battery);
-	cap = CAPACITY_TO_ADC(capacity, battery->res_div);
+	cap = CAPACITY_TO_ADC(capacity, battery->sample_res);
 	DBG("new cap: 0x%x\n", cap);
 	buf = (cap >> 24) & 0xff;
 	rk817_bat_field_write(battery, Q_INIT_H3, buf);
@@ -1179,10 +1049,16 @@ static void rk817_bat_init_coulomb_cap(struct rk817_battery_device *battery,
 	buf = (cap >> 8) & 0xff;
 	rk817_bat_field_write(battery, Q_INIT_L1, buf);
 	buf = (cap >> 0) & 0xff;
-	rk817_bat_field_write(battery, Q_INIT_L0, buf);
+
+	val = rk817_bat_field_read(battery, Q_INIT_L0);
+	if (val == buf)
+		rk817_bat_field_write(battery, Q_INIT_L0, buf + 1);
+	else
+		rk817_bat_field_write(battery, Q_INIT_L0, buf);
 
 	battery->rsoc = capacity * 1000 * 100 / DIV(battery->fcc);
 	battery->remain_cap = capacity * 1000;
+	battery->sm_remain_cap = battery->remain_cap;
 	DBG("new remaincap: %d\n", battery->remain_cap);
 	fuel_gauge_q_init_info(battery);
 }
@@ -1215,7 +1091,7 @@ static void rk817_bat_update_qmax(struct rk817_battery_device *battery,
 	u8 buf;
 	u32 cap_adc;
 
-	cap_adc = CAPACITY_TO_ADC(capacity, battery->res_div);
+	cap_adc = CAPACITY_TO_ADC(capacity, battery->sample_res);
 	buf = (cap_adc >> 24) & 0xff;
 	rk817_bat_field_write(battery, Q_MAX_H3, buf);
 	buf = (cap_adc >> 16) & 0xff;
@@ -1236,7 +1112,7 @@ static int rk817_bat_get_qmax(struct rk817_battery_device *battery)
 	val |= rk817_bat_field_read(battery, Q_MAX_H2) << 16;
 	val |= rk817_bat_field_read(battery, Q_MAX_L1) << 8;
 	val |= rk817_bat_field_read(battery, Q_MAX_L0) << 0;
-	capacity = ADC_TO_CAPACITY(val, battery->res_div);
+	capacity = ADC_TO_CAPACITY(val, battery->sample_res);
 	battery->qmax = capacity;
 	return capacity;
 }
@@ -1293,8 +1169,8 @@ static int rk817_bat_get_ocv_count(struct rk817_battery_device *battery)
 	return rk817_bat_field_read(battery, OCV_CNT);
 }
 
-static int rk817_bat_vol_to_soc(struct rk817_battery_device *battery,
-				int voltage)
+static int rk817_bat_vol2soc(struct rk817_battery_device *battery,
+			     int voltage)
 {
 	u32 *ocv_table, temp;
 	int ocv_size, ocv_soc;
@@ -1307,8 +1183,22 @@ static int rk817_bat_vol_to_soc(struct rk817_battery_device *battery,
 	return ocv_soc;
 }
 
-static int rk817_bat_vol_to_cap(struct rk817_battery_device *battery,
-				int voltage)
+static int rk817_bat_soc2vol(struct rk817_battery_device *battery, int rsoc)
+{
+	int ocv_soc;
+	u32 *ocv_table;
+
+	ocv_table = battery->pdata->ocv_table;
+
+	ocv_soc = ocv_table[rsoc / OCV_TABLE_STEP];
+	ocv_soc += (((ocv_table[rsoc / OCV_TABLE_STEP + 1] - ocv_table[rsoc / OCV_TABLE_STEP]) *
+		(rsoc % OCV_TABLE_STEP)) + OCV_TABLE_STEP / 2) / OCV_TABLE_STEP;
+
+	return ocv_soc;
+}
+
+static int rk817_bat_vol2cap(struct rk817_battery_device *battery,
+			     int voltage)
 {
 	u32 *ocv_table, temp;
 	int ocv_size, capacity;
@@ -1366,8 +1256,7 @@ static int rk817_bat_get_charge_status(struct rk817_battery_device *battery)
 	if (battery->chip_id == RK809_ID) {
 		if ((battery->voltage_avg > battery->pdata->design_max_voltage) &&
 		    (battery->current_avg > 0) &&
-		    ((battery->current_avg < 500) ||
-		     (battery->rsoc / 1000 == 100)))
+		    ((battery->current_avg < 500) || (battery->rsoc / 1000 == 100)))
 			return CHARGE_FINISH;
 
 		if (battery->plugin_trigger)
@@ -1378,7 +1267,7 @@ static int rk817_bat_get_charge_status(struct rk817_battery_device *battery)
 	status = rk817_bat_field_read(battery, CHG_STS);
 
 	if (status == CC_OR_CV_CHRG) {
-		if (battery->rsoc == 100 * 1000) {
+		if (battery->rsoc == MAX_PERCENTAGE) {
 			DBG("charge to finish\n");
 			status = CHARGE_FINISH;
 		}
@@ -1422,17 +1311,18 @@ static int rk817_bat_get_charge_status(struct rk817_battery_device *battery)
  */
 static bool rk817_bat_fake_finish_mode(struct rk817_battery_device *battery)
 {
-	if ((battery->rsoc == 100) &&
-	    (rk817_bat_get_charge_status(battery) == CC_OR_CV_CHRG) &&
+	int status;
+
+	status = rk817_bat_get_charge_status(battery);
+	if ((battery->rsoc / 1000 == 100) &&
+	    (status == CC_OR_CV_CHRG) &&
 	    (abs(battery->current_avg) <= 100))
 		return true;
-	else
-		return false;
-}
+	if ((status == CC_OR_CV_CHRG) &&
+	    (battery->rsoc > battery->fake_full_soc) && (battery->current_avg > 0))
+		return true;
 
-static int get_charge_status(struct rk817_battery_device *battery)
-{
-	return rk817_bat_get_charge_status(battery);
+	return false;
 }
 
 static bool is_rk817_bat_ocv_valid(struct rk817_battery_device *battery)
@@ -1442,7 +1332,7 @@ static bool is_rk817_bat_ocv_valid(struct rk817_battery_device *battery)
 
 static void rk817_bat_gas_gaugle_enable(struct rk817_battery_device *battery)
 {
-		rk817_bat_field_write(battery, GG_EN, ENABLE);
+	rk817_bat_field_write(battery, GG_EN, ENABLE);
 }
 
 static void rk817_bat_gg_con_init(struct rk817_battery_device *battery)
@@ -1453,7 +1343,7 @@ static void rk817_bat_gg_con_init(struct rk817_battery_device *battery)
 	rk817_bat_field_write(battery, CUR_OUT_MOD, AVERAGE_MODE);
 }
 
-static void  rk817_bat_adc_init(struct rk817_battery_device *battery)
+static void rk817_bat_adc_init(struct rk817_battery_device *battery)
 {
 	rk817_bat_field_write(battery, SYS_VOL_ADC_EN, ENABLE);
 	rk817_bat_field_write(battery, TS_ADC_EN, ENABLE);
@@ -1468,8 +1358,8 @@ static void rk817_bat_init_info(struct rk817_battery_device *battery)
 	battery->qmax = battery->pdata->design_qmax;
 	battery->bat_res = battery->pdata->bat_res;
 	battery->monitor_ms = battery->pdata->monitor_sec * TIMER_MS_COUNTS;
-	battery->res_div = (battery->pdata->sample_res == SAMPLE_RES_20MR) ?
-		       SAMPLE_RES_DIV2 : SAMPLE_RES_DIV1;
+	battery->sample_res = battery->pdata->sample_res;
+	battery->fake_full_soc = battery->pdata->fake_full_soc * 1000;
 	DBG("battery->qmax :%d\n", battery->qmax);
 }
 
@@ -1525,34 +1415,51 @@ static u8 is_rk817_bat_initialized(struct rk817_battery_device *battery)
 
 static void rk817_bat_calc_sm_linek(struct rk817_battery_device *battery)
 {
+	long expected_voltage, expected_res2voltage;
+	int expected_rsoc;
+	int current_avg;
+	int soc2vol;
+	int status;
 	int linek;
-	int diff, delta;
-	int current_avg = rk817_bat_get_avg_current(battery);
 
-	delta = abs(battery->dsoc - battery->rsoc);
-	diff = delta * 3;/* speed:3/4 */
+	current_avg = rk817_bat_get_avg_current(battery);
+	soc2vol = rk817_bat_soc2vol(battery, battery->rsoc);
+	expected_voltage = battery->pdata->pwroff_vol +
+		soc2vol * (soc2vol - battery->voltage_avg) / battery->pdata->pwroff_vol;
 
-	if (current_avg > 0) {
-		if (battery->dsoc < battery->rsoc)
-			linek = 1000 * (delta + diff) / DIV(diff);
-		else if (battery->dsoc > battery->rsoc)
-			linek = 1000 * diff / DIV(delta + diff);
-		else
-			linek = 1000;
+	expected_res2voltage = battery->pdata->pwroff_vol +
+		(soc2vol * abs(current_avg) * battery->bat_res) / battery->pdata->pwroff_vol / 1000;
+
+	DBG("expected_voltage: %ld, expected_res2voltage: %ld\n",
+	    expected_voltage, expected_res2voltage);
+
+	expected_voltage =
+		(expected_voltage > expected_res2voltage) ? expected_voltage : expected_res2voltage;
+	DBG("expected_voltage: %ld\n", expected_voltage);
+
+	expected_rsoc = rk817_bat_vol2soc(battery, expected_voltage);
+	battery->delta_rsoc = expected_rsoc;
+
+	DBG("expected_voltage: %ld, RSOC: %d expected_rsoc: %d delta_rsoc: %d\n",
+	    expected_voltage, battery->rsoc, expected_rsoc, battery->delta_rsoc);
+
+	status = rk817_bat_get_charge_status(battery);
+	if ((status == CHRG_OFF) || ((status == CC_OR_CV_CHRG) && (current_avg < 0)) ||
+	    ((status == CHARGE_FINISH) && (current_avg < FINISH_CURR_THRESD))) {
+		/* When the discharge current is less than 30A and the charging IC reports a
+		 * full charge status, the system will determine that the current operation is
+		 *in discharge mode.
+		 */
+		linek = -(MAX_PERCENTAGE - battery->rsoc + battery->dsoc) * 1000;
+		linek /= (MAX_PERCENTAGE - battery->delta_rsoc);
 	} else {
-		if (battery->dsoc < battery->rsoc)
-			linek = -1000 * diff / DIV(delta + diff);
-		else if (battery->dsoc > battery->rsoc)
-			linek = -1000 * (delta + diff) / DIV(diff);
-		else
-			linek = -1000;
+		linek = MAX_PERCENTAGE * 1000 / (MAX_PERCENTAGE - battery->rsoc + battery->dsoc);
 	}
+	DBG("expected_voltage %ld expected_rsoc: %d\n", expected_voltage, expected_rsoc);
+	DBG("ocv_voltage %d sd_ocv_voltage: %ld, linek: %d\n", soc2vol, expected_voltage, linek);
 
-	battery->dbg_meet_soc = (battery->dsoc >= battery->rsoc) ?
-		(battery->dsoc - diff) : (battery->rsoc - diff);
-
+	battery->expected_voltage = expected_voltage;
 	battery->sm_linek = linek;
-	battery->sm_remain_cap = battery->remain_cap;
 	battery->dbg_calc_dsoc = battery->dsoc;
 	battery->dbg_calc_rsoc = battery->rsoc;
 }
@@ -1560,7 +1467,7 @@ static void rk817_bat_calc_sm_linek(struct rk817_battery_device *battery)
 static void rk817_bat_smooth_algo_prepare(struct rk817_battery_device *battery)
 {
 	battery->smooth_soc = battery->dsoc;
-
+	battery->sm_remain_cap = battery->remain_cap;
 	DBG("<%s>. dsoc=%d, dsoc:smooth_soc=%d\n",
 	    __func__, battery->dsoc, battery->smooth_soc);
 	rk817_bat_calc_sm_linek(battery);
@@ -1576,15 +1483,15 @@ static void rk817_bat_finish_algo_prepare(struct rk817_battery_device *battery)
 
 static void rk817_bat_init_dsoc_algorithm(struct rk817_battery_device *battery)
 {
-	if (battery->dsoc >= 100 * 1000)
-		battery->dsoc = 100 * 1000;
+	if (battery->dsoc >= MAX_PERCENTAGE)
+		battery->dsoc = MAX_PERCENTAGE;
 	else if (battery->dsoc <= 0)
 		battery->dsoc = 0;
 	/* init current mode */
 	battery->voltage_avg = rk817_bat_get_battery_voltage(battery);
 	battery->current_avg = rk817_bat_get_avg_current(battery);
 
-	if (get_charge_status(battery) == CHARGE_FINISH) {
+	if (rk817_bat_get_charge_status(battery) == CHARGE_FINISH) {
 		rk817_bat_finish_algo_prepare(battery);
 		battery->work_mode = MODE_FINISH;
 	} else {
@@ -1598,14 +1505,15 @@ static void rk817_bat_init_dsoc_algorithm(struct rk817_battery_device *battery)
 static void rk817_bat_first_pwron(struct rk817_battery_device *battery)
 {
 	battery->rsoc =
-		rk817_bat_vol_to_soc(battery,
-				     battery->pwron_voltage) * 1000;/* uAH */
+		rk817_bat_vol2soc(battery,
+				  battery->pwron_voltage);/* uAH */
 	battery->dsoc = battery->rsoc;
-	battery->fcc	= battery->pdata->design_capacity;
+	battery->fcc = battery->pdata->design_capacity;
 	if (battery->fcc < MIN_FCC)
 		battery->fcc = MIN_FCC;
 
-	battery->nac = rk817_bat_vol_to_cap(battery, battery->pwron_voltage);
+	battery->nac = rk817_bat_vol2cap(battery, battery->pwron_voltage);
+	battery->fcc = battery->pdata->design_capacity;
 
 	rk817_bat_update_qmax(battery, battery->qmax);
 	rk817_bat_save_fcc(battery, battery->fcc);
@@ -1643,8 +1551,8 @@ static void rk817_bat_not_first_pwron(struct rk817_battery_device *battery)
 	} else if (battery->is_ocv_calib) {
 		/* not initialized and poweroff_cnt above 30 min */
 		ocv_vol = rk817_bat_get_ocv_voltage(battery);
-		ocv_soc = rk817_bat_vol_to_soc(battery, ocv_vol);
-		ocv_cap = rk817_bat_vol_to_cap(battery, ocv_vol);
+		ocv_soc = rk817_bat_vol2soc(battery, ocv_vol);
+		ocv_cap = rk817_bat_vol2cap(battery, ocv_vol);
 		pre_cap = ocv_cap;
 		battery->ocv_pre_dsoc = pre_soc;
 		battery->ocv_new_dsoc = ocv_soc;
@@ -1659,8 +1567,8 @@ static void rk817_bat_not_first_pwron(struct rk817_battery_device *battery)
 		BAT_INFO("OCV calib: cap=%d, rsoc=%d\n", ocv_cap, ocv_soc);
 	} else if (battery->pwroff_min > 0) {
 		ocv_vol = rk817_bat_get_ocv_voltage(battery);
-		ocv_soc = rk817_bat_vol_to_soc(battery, ocv_vol);
-		ocv_cap = rk817_bat_vol_to_cap(battery, ocv_vol);
+		ocv_soc = rk817_bat_vol2soc(battery, ocv_vol);
+		ocv_cap = rk817_bat_vol2cap(battery, ocv_vol);
 		battery->force_pre_dsoc = pre_soc;
 		battery->force_new_dsoc = ocv_soc;
 		if (abs(ocv_soc - pre_soc) >= 80) {
@@ -1763,8 +1671,7 @@ static void rk817_bat_init_fg(struct rk817_battery_device *battery)
 	battery->dbg_pwr_vol = battery->voltage_avg;
 	battery->temperature = VIRTUAL_TEMPERATURE;
 
-	DBG("probe init: battery->dsoc = %d, rsoc = %d\n"
-	    "remain_cap = %d\n, battery_vol = %d\n, system_vol = %d, qmax = %d\n",
+	DBG("probe init: battery->dsoc = %d, rsoc = %d, remain_cap = %d\n, bat_vol = %d\n, sys_vol = %d, qmax = %d\n",
 	    battery->dsoc, battery->rsoc, battery->remain_cap,
 	    battery->voltage_avg, battery->voltage_sys, battery->qmax);
 	DBG("OCV_THRE_VOL: 0x%x", rk817_bat_field_read(battery, OCV_THRE_VOL));
@@ -1794,11 +1701,9 @@ static int rk817_bat_parse_dt(struct rk817_battery_device *battery)
 	pdata->sleep_filter_current = DEFAULT_SLP_FILTER_CUR;
 	pdata->bat_mode = MODE_BATTARY;
 	pdata->max_soc_offset = DEFAULT_MAX_SOC_OFFSET;
-	pdata->fb_temp = DEFAULT_FB_TEMP;
-	pdata->energy_mode = DEFAULT_ENERGY_MODE;
-	pdata->zero_reserve_dsoc = DEFAULT_ZERO_RESERVE_DSOC * 1000;
-
+	pdata->fake_full_soc = 100;
 	pdata->sample_res = DEFAULT_SAMPLE_RES;
+	pdata->charge_stay_awake = 0;
 
 	/* parse necessary param */
 	if (!of_find_property(np, "ocv_table", &length)) {
@@ -1841,14 +1746,6 @@ static int rk817_bat_parse_dt(struct rk817_battery_device *battery)
 	if (ret < 0)
 		dev_err(dev, "sample_res missing!\n");
 
-	ret = of_property_read_u32(np, "fb_temperature", &pdata->fb_temp);
-	if (ret < 0)
-		dev_err(dev, "fb_temperature missing!\n");
-
-	ret = of_property_read_u32(np, "energy_mode", &pdata->energy_mode);
-	if (ret < 0)
-		dev_err(dev, "energy_mode missing!\n");
-
 	ret = of_property_read_u32(np, "max_soc_offset",
 				   &pdata->max_soc_offset);
 	if (ret < 0)
@@ -1858,17 +1755,6 @@ static int rk817_bat_parse_dt(struct rk817_battery_device *battery)
 	if (ret < 0)
 		dev_err(dev, "monitor_sec missing!\n");
 
-	ret = of_property_read_u32(np, "zero_algorithm_vol",
-				   &pdata->zero_algorithm_vol);
-	if (ret < 0)
-		dev_err(dev, "zero_algorithm_vol missing!\n");
-
-	ret = of_property_read_u32(np, "zero_reserve_dsoc",
-				   &pdata->zero_reserve_dsoc);
-	if (ret < 0)
-		dev_err(dev, "zero_reserve_dsoc missing!\n");
-	pdata->zero_reserve_dsoc *= 1000;
-
 	ret = of_property_read_u32(np, "virtual_power", &pdata->bat_mode);
 	if (ret < 0)
 		dev_err(dev, "virtual_power missing!\n");
@@ -1896,9 +1782,17 @@ static int rk817_bat_parse_dt(struct rk817_battery_device *battery)
 	if (ret < 0)
 		dev_err(dev, "power_off_thresd missing!\n");
 
-	ret = of_property_read_u32(np, "low_power_sleep", &pdata->low_pwr_sleep);
+	ret = of_property_read_u32(np, "charge_stay_awake", &pdata->charge_stay_awake);
 	if (ret < 0)
-		dev_info(dev, "low_power_sleep missing!\n");
+		dev_info(dev, "charge_stay_awake missing!\n");
+
+	ret = of_property_read_u32(np, "fake_full_soc", &pdata->fake_full_soc);
+	if (ret < 0)
+		dev_info(dev, "fake_full_soc missing!\n");
+	else {
+		if ((pdata->fake_full_soc > 100) || (pdata->fake_full_soc < 0))
+			pdata->fake_full_soc = 100;
+	}
 
 	if (battery->chip_id == RK809_ID) {
 		ret = of_property_read_u32(np, "bat_res_up",
@@ -1930,8 +1824,6 @@ static int rk817_bat_parse_dt(struct rk817_battery_device *battery)
 	    "sleep_enter_current:%d\n"
 	    "sleep_exit_current:%d\n"
 	    "sleep_filter_current:%d\n"
-	    "zero_algorithm_vol:%d\n"
-	    "zero_reserve_dsoc:%d\n"
 	    "monitor_sec:%d\n"
 	    "max_soc_offset:%d\n"
 	    "virtual_power:%d\n"
@@ -1943,8 +1835,6 @@ static int rk817_bat_parse_dt(struct rk817_battery_device *battery)
 	    pdata->sleep_enter_current,
 	    pdata->sleep_exit_current,
 	    pdata->sleep_filter_current,
-	    pdata->zero_algorithm_vol,
-	    pdata->zero_reserve_dsoc,
 	    pdata->monitor_sec,
 	    pdata->max_soc_offset,
 	    pdata->bat_mode,
@@ -1961,79 +1851,11 @@ static enum power_supply_property rk817_bat_props[] = {
 	POWER_SUPPLY_PROP_CAPACITY,
 	POWER_SUPPLY_PROP_CAPACITY_LEVEL,
 	POWER_SUPPLY_PROP_TEMP,
-	POWER_SUPPLY_PROP_CHARGE_COUNTER,
 	POWER_SUPPLY_PROP_CHARGE_FULL,
 	POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN,
 	POWER_SUPPLY_PROP_TIME_TO_FULL_NOW,
 };
 
-static int rk817_bat_get_usb_psy(struct device *dev, void *data)
-{
-	struct rk817_battery_device *battery = data;
-	struct power_supply *psy = dev_get_drvdata(dev);
-
-	if (psy->desc->type == POWER_SUPPLY_TYPE_USB) {
-		battery->usb_psy = psy;
-		return 1;
-	}
-
-	return 0;
-}
-
-static int rk817_bat_get_ac_psy(struct device *dev, void *data)
-{
-	struct rk817_battery_device *battery = data;
-	struct power_supply *psy = dev_get_drvdata(dev);
-
-	if (psy->desc->type == POWER_SUPPLY_TYPE_MAINS) {
-		battery->ac_psy = psy;
-		return 1;
-	}
-
-	return 0;
-}
-
-static void rk817_bat_get_chrg_psy(struct rk817_battery_device *battery)
-{
-	if (!battery->usb_psy)
-		class_for_each_device(power_supply_class, NULL, (void *)battery,
-				      rk817_bat_get_usb_psy);
-	if (!battery->ac_psy)
-		class_for_each_device(power_supply_class, NULL, (void *)battery,
-				      rk817_bat_get_ac_psy);
-}
-
-static int rk817_bat_get_charge_state(struct rk817_battery_device *battery)
-{
-	union power_supply_propval val;
-	int ret;
-	struct power_supply *psy;
-
-	if (!battery->usb_psy || !battery->ac_psy)
-		rk817_bat_get_chrg_psy(battery);
-
-	psy = battery->usb_psy;
-	if (psy) {
-		ret = psy->desc->get_property(psy, POWER_SUPPLY_PROP_ONLINE,
-					      &val);
-		if (!ret)
-			battery->usb_in = val.intval;
-	}
-
-	psy = battery->ac_psy;
-	if (psy) {
-		ret = psy->desc->get_property(psy, POWER_SUPPLY_PROP_ONLINE,
-					      &val);
-		if (!ret)
-			battery->ac_in = val.intval;
-	}
-
-	DBG("%s: ac_online=%d, usb_online=%d\n",
-	    __func__, battery->ac_in, battery->usb_in);
-
-	return (battery->usb_in || battery->ac_in);
-}
-
 static int rk817_get_capacity_leve(struct rk817_battery_device *battery)
 {
 	int dsoc;
@@ -2091,7 +1913,7 @@ static int rk817_battery_get_property(struct power_supply *psy,
 			val->intval = VIRTUAL_VOLTAGE * 1000;
 		break;
 	case POWER_SUPPLY_PROP_CAPACITY:
-		val->intval = (battery->dsoc  + 500) / 1000;
+		val->intval = (battery->dsoc + 400) / 1000;
 		if (battery->pdata->bat_mode == MODE_VIRTUAL)
 			val->intval = VIRTUAL_SOC;
 		break;
@@ -2109,11 +1931,11 @@ static int rk817_battery_get_property(struct power_supply *psy,
 	case POWER_SUPPLY_PROP_STATUS:
 		if (battery->pdata->bat_mode == MODE_VIRTUAL)
 			val->intval = VIRTUAL_STATUS;
-		else if (battery->dsoc == 100 * 1000)
+		else if (battery->dsoc == MAX_PERCENTAGE)
 			val->intval = POWER_SUPPLY_STATUS_FULL;
 		else {
 			if ((battery->chip_id != RK809_ID) &&
-			    rk817_bat_get_charge_state(battery))
+			    power_supply_is_system_supplied())
 				val->intval = POWER_SUPPLY_STATUS_CHARGING;
 			else if (battery->chip_id == RK809_ID &&
 				 battery->plugin_trigger)
@@ -2122,9 +1944,6 @@ static int rk817_battery_get_property(struct power_supply *psy,
 				val->intval = POWER_SUPPLY_STATUS_DISCHARGING;
 		}
 		break;
-	case POWER_SUPPLY_PROP_CHARGE_COUNTER:
-		val->intval = battery->charge_count;
-		break;
 	case POWER_SUPPLY_PROP_CHARGE_FULL:
 	case POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN:
 		val->intval = battery->pdata->design_capacity * 1000;/* uAh */
@@ -2229,33 +2048,24 @@ static int rk809_chg_init_power_supply(struct rk817_battery_device *battery)
 static void rk817_bat_power_supply_changed(struct rk817_battery_device *battery)
 {
 	static int old_soc = -1;
+	static int status = CHRG_OFF;
 
-	if (battery->dsoc > 100 * 1000)
-		battery->dsoc = 100 * 1000;
+	if (battery->dsoc > MAX_PERCENTAGE)
+		battery->dsoc = MAX_PERCENTAGE;
 	else if (battery->dsoc < 0)
 		battery->dsoc = 0;
 
-	if (battery->dsoc == old_soc && !battery->change)
+	if ((battery->dsoc == old_soc) && (battery->chrg_status == status))
 		return;
 
-	battery->change = false;
+	/* Battery status change, report information */
+	status = battery->chrg_status;
 	old_soc = battery->dsoc;
-	battery->last_dsoc = battery->dsoc;
 	power_supply_changed(battery->bat);
 	DBG("changed: dsoc=%d, rsoc=%d, v=%d, ov=%d c=%d, cap=%d, f=%d\n",
 	    battery->dsoc, battery->rsoc, battery->voltage_avg,
 	    battery->voltage_ocv, battery->current_avg,
 	    battery->remain_cap, battery->fcc);
-
-	DBG("dl=%d, rl=%d, v=%d, halt=%d, halt_n=%d, max=%d\n"
-	    "init=%d, sw=%d, calib=%d, below0=%d, force=%d\n",
-	    battery->dbg_pwr_dsoc, battery->dbg_pwr_rsoc,
-	    battery->dbg_pwr_vol,
-	    battery->is_halt, battery->halt_cnt,
-	    battery->is_max_soc_offset,
-	    battery->is_initialized, battery->is_sw_reset,
-	    battery->is_ocv_calib,
-	    battery->dbg_cap_low0, battery->is_force_calib);
 }
 
 static void rk817_battery_debug_info(struct rk817_battery_device *battery)
@@ -2280,22 +2090,7 @@ static void rk817_battery_debug_info(struct rk817_battery_device *battery)
 	DBG("capactiy = %d\n", rk817_bat_get_capacity_mah(battery));
 }
 
-static void
-rk817_bat_update_charging_status(struct rk817_battery_device *battery)
-{
-	int is_charging;
-
-	is_charging = rk817_bat_get_charge_state(battery);
-	if (is_charging == battery->is_charging)
-		return;
-
-	battery->change = true;
-	battery->is_charging = is_charging;
-	if (is_charging)
-		battery->charge_count++;
-}
-
-static void rk817_bat_update_info(struct rk817_battery_device *battery)
+static void rk817_bat_update_fg_info(struct rk817_battery_device *battery)
 {
 	battery->voltage_avg = rk817_bat_get_battery_voltage(battery);
 	battery->voltage_sys = rk817_bat_get_sys_voltage(battery);
@@ -2304,8 +2099,7 @@ static void rk817_bat_update_info(struct rk817_battery_device *battery)
 	battery->rsoc = rk817_bat_get_rsoc(battery);
 	battery->remain_cap = rk817_bat_get_capacity_uah(battery);
 	battery->voltage_usb = rk817_bat_get_USB_voltage(battery);
-	battery->chrg_status = get_charge_status(battery);
-	rk817_bat_update_charging_status(battery);
+	battery->chrg_status = rk817_bat_get_charge_status(battery);
 	DBG("valtage usb: %d\n", battery->voltage_usb);
 	DBG("UPDATE: voltage_avg = %d\n"
 	    "voltage_sys = %d\n"
@@ -2324,18 +2118,16 @@ static void rk817_bat_update_info(struct rk817_battery_device *battery)
 
 	/* smooth charge */
 	if (battery->remain_cap / 1000 > battery->fcc) {
-		/*battery->sm_remain_cap -=*/
-		/*(battery->remain_cap - battery->fcc * 1000);*/
 		battery->sm_remain_cap = battery->fcc * 1000;
 		DBG("<%s>. cap: remain=%d, sm_remain=%d\n",
 		    __func__, battery->remain_cap, battery->sm_remain_cap);
 		DBG("fcc: %d\n", battery->fcc);
-		rk817_bat_init_coulomb_cap(battery, battery->fcc + 100);
 		rk817_bat_init_coulomb_cap(battery, battery->fcc);
 		rk817_bat_get_capacity_mah(battery);
 	}
 
-	if (battery->chrg_status != CHARGE_FINISH)
+	/* (battery->chrg_status != CHARGE_FINISH) */
+	if (battery->chrg_status == CC_OR_CV_CHRG)
 		battery->finish_base = get_boot_sec();
 }
 
@@ -2376,39 +2168,52 @@ static void rk817_bat_lowpwr_check(struct rk817_battery_device *battery)
 	    battery->current_avg, battery->fake_offline);
 }
 
-static void rk817_bat_calc_smooth_dischrg(struct rk817_battery_device *battery)
+static void rk817_bat_update_soc(struct rk817_battery_device *battery, int delta_soc)
 {
 	int tmp_soc = 0;
 
+	battery->smooth_soc += delta_soc;
+
 	/* check new dsoc */
 	if (battery->smooth_soc < 0)
 		battery->smooth_soc = 0;
 
 	tmp_soc = battery->smooth_soc / 1000;
 
+	/* Mitigate step transitions in displayed SOC (State of Charge) during charging */
 	if (tmp_soc != battery->dsoc / 1000) {
-		if (battery->smooth_soc > battery->dsoc)
-			return;
-
-		if (battery->smooth_soc + 1000 > battery->dsoc)
-			battery->dsoc = battery->smooth_soc;
-		else
-			battery->dsoc -= 1000;
-
-		if (battery->dsoc <= 0)
-			battery->dsoc = 0;
+		/* During charging, the battery state of charge (SOC) will decrease if the
+		 * charger's input power is lower than the system power consumption
+		 */
+		if (delta_soc < 0) {
+			if (battery->smooth_soc > battery->dsoc)
+				return;
+			if (battery->smooth_soc + 1000 > battery->dsoc)
+				battery->dsoc = battery->smooth_soc;
+			else
+				battery->dsoc -= 1000;
+		} else {
+			if (battery->smooth_soc < battery->dsoc)
+				return;
+			if (battery->smooth_soc < battery->dsoc + 1000)
+				battery->dsoc = battery->smooth_soc;
+			else
+				battery->dsoc += 1000;
+		}
+	} else {
+		/* Control of SOC fluctuation magnitude during normal operation */
+		battery->dsoc = battery->smooth_soc;
 	}
+
+	if (battery->dsoc <= 0)
+		battery->dsoc = 0;
 }
 
 static void rk817_bat_smooth_algorithm(struct rk817_battery_device *battery)
 {
-	int ydsoc = 0, delta_cap = 0, old_cap = 0, tmp_soc;
-	/*int linek;*/
-	int diff, delta;
-	/*int current_avg = rk817_bat_get_avg_current(battery);*/
-
-	delta = abs(battery->dsoc - battery->rsoc);
-	diff = delta * 3;/* speed:3/4 */
+	int delta_cap = 0, old_cap = 0;
+	long cap_change;
+	long ydsoc = 0;
 
 	/* charge and discharge switch */
 	if ((battery->sm_linek * battery->current_avg <= 0)) {
@@ -2416,70 +2221,54 @@ static void rk817_bat_smooth_algorithm(struct rk817_battery_device *battery)
 		rk817_bat_calc_sm_linek(battery);
 	}
 
-	/*battery->sm_linek = linek;*/
-
 	battery->remain_cap = rk817_bat_get_capacity_uah(battery);
-
 	old_cap = battery->sm_remain_cap;
+
 	DBG("smooth: smooth_soc = %d, dsoc = %d, battery->sm_linek = %d\n",
 	    battery->smooth_soc, battery->dsoc, battery->sm_linek);
 
-	/* discharge status: sm_remain_cap > remain_cap, delta_cap > 0 */
-	/* from charge to discharge:
+	/* discharge status: sm_remain_cap > remain_cap, delta_cap > 0
+	 * from charge to discharge:
 	 * remain_cap may be above sm_remain_cap, delta_cap <= 0
 	 */
 	delta_cap = battery->remain_cap - battery->sm_remain_cap;
-	DBG("smooth: sm_remain_cap = %d, remain_cap = %d\n",
-	    battery->sm_remain_cap, battery->remain_cap);
-	DBG("smooth: delta_cap = %d, dsoc = %d\n",
-	    delta_cap, battery->dsoc);
 
+	DBG("smooth: sm_remain_cap: %d, remain_cap: %d, delta_cap: %d\n",
+	    battery->sm_remain_cap, battery->remain_cap, delta_cap);
 	if (delta_cap == 0) {
 		DBG("<%s>. delta_cap = 0\n", __func__);
 		return;
 	}
 
-	/* discharge: sm_linek < 0, if delate_cap <0, ydsoc > 0 */
-	ydsoc = battery->sm_linek * abs(delta_cap / 10) / DIV(battery->fcc);
+	/* discharge: sm_linek < 0, if delate_cap <0, ydsoc > 0
+	 * captosoc: delta_cap * MAX_PERCENTAGE / (DIV(battery->fcc) * 1000)
+	 * delta_cap * 100 / DIV(battery->fcc)
+	 * captosoc Remainder: delta_cap * MAX_PERCENTAGE % (DIV(battery->fcc) * 1000)
+	 * delta_cap * 100 % DIV(battery->fcc)
+	 * delta_cap += battery->delta_cap_remainder;
+	 * ydsoc = battery->sm_linek * abs(delta_cap) / (10 * DIV(battery->fcc));
+	 */
+	cap_change = battery->sm_linek * abs(delta_cap) + battery->delta_cap_remainder;
+	ydsoc = cap_change / (10 * DIV(battery->fcc));
 
-	DBG("smooth: ydsoc = %d, fcc = %d\n", ydsoc, battery->fcc);
+	DBG("smooth: ydsoc = %ld, delta_cap_remainder: %d fcc = %d\n",
+		ydsoc, battery->delta_cap_remainder, battery->fcc);
 	if (ydsoc == 0) {
 		DBG("<%s>. ydsoc = 0\n", __func__);
 		return;
 	}
-	battery->sm_remain_cap = battery->remain_cap;
 
-	DBG("<%s>. k=%d, ydsoc=%d; cap:old=%d, new:%d; delta_cap=%d\n",
+	battery->delta_cap_remainder = cap_change % (10 * DIV(battery->fcc));
+
+	DBG("<%s>. k=%d, ydsoc=%ld; cap:old=%d, new:%d; delta_cap=%d\n",
 	    __func__, battery->sm_linek, ydsoc, old_cap,
 	    battery->sm_remain_cap, delta_cap);
 
-	/* discharge mode */
-	/* discharge mode, but ydsoc > 0,
-	 * from charge status to dischrage
-	 */
-	battery->smooth_soc += ydsoc;
-	if (ydsoc < 0) {
-		rk817_bat_calc_smooth_dischrg(battery);
-	} else {
-		if (battery->smooth_soc < 0)
-			battery->smooth_soc = 0;
+	rk817_bat_update_soc(battery, ydsoc);
 
-		tmp_soc = battery->smooth_soc / 1000;
+	battery->sm_remain_cap = battery->remain_cap;
 
-		if (tmp_soc != battery->dsoc / 1000) {
-			if (battery->smooth_soc < battery->dsoc)
-				return;
-
-			battery->dsoc = battery->smooth_soc;
-			if (battery->dsoc <= 0)
-				battery->dsoc = 0;
-		}
-	}
-
-	if (battery->s2r) {
-		battery->s2r = false;
-		rk817_bat_calc_sm_linek(battery);
-	}
+	rk817_bat_calc_sm_linek(battery);
 
 	DBG("smooth: smooth_soc = %d, dsoc = %d\n",
 	    battery->smooth_soc, battery->dsoc);
@@ -2487,274 +2276,6 @@ static void rk817_bat_smooth_algorithm(struct rk817_battery_device *battery)
 	    delta_cap, battery->dsoc);
 }
 
-static void rk817_bat_calc_zero_linek(struct rk817_battery_device *battery)
-{
-	int dead_voltage, ocv_voltage;
-	int voltage_avg, current_avg, vsys;
-	int ocv_cap, dead_cap, xsoc;
-	int ocv_soc, dead_soc;
-	int pwroff_vol;
-	int min_gap_xsoc;
-	int powerpatch_res;
-
-	if ((abs(battery->current_avg) < 400) && (battery->dsoc / 1000 > 5))
-		pwroff_vol = battery->pdata->pwroff_vol + 50;
-	else
-		pwroff_vol = battery->pdata->pwroff_vol;
-
-	/* calc estimate ocv voltage */
-	voltage_avg = rk817_bat_get_battery_voltage(battery);
-	current_avg = rk817_bat_get_avg_current(battery);
-	vsys = voltage_avg + (current_avg * DEF_PWRPATH_RES) / 1000;
-
-	powerpatch_res = (voltage_avg - vsys) * 1000 / current_avg;
-
-	battery->zero_voltage_avg = voltage_avg;
-	battery->zero_current_avg = current_avg;
-	battery->zero_vsys = vsys;
-
-	DBG("Zero: voltage_avg = %d, Vsys = %d\n", voltage_avg, vsys);
-	DBG("Zero: powerpatch_res = %d\n", powerpatch_res);
-	DBG("ZERO0: shtd_vol: poweroff_vol(usr) = %d\n"
-	    "pwroff_vol = %d\n"
-	    "zero_reserve_dsoc = %d\n",
-	    battery->pdata->pwroff_vol,
-	    pwroff_vol,
-	    battery->pdata->zero_reserve_dsoc);
-
-	/* get the dead ocv voltage, pwroff_vol is vsys */
-	dead_voltage = pwroff_vol - current_avg *
-				(battery->bat_res + DEF_PWRPATH_RES) / 1000;
-
-	ocv_voltage = voltage_avg - (current_avg * battery->bat_res) / 1000;
-	DBG("ZERO0: dead_voltage(shtd) = %d, ocv_voltage(now) = %d\n",
-	    dead_voltage, ocv_voltage);
-
-	/* calc estimate soc and cap */
-	dead_soc = rk817_bat_vol_to_soc(battery, dead_voltage);
-	dead_cap = rk817_bat_vol_to_cap(battery, dead_voltage);
-	DBG("ZERO0: dead_soc = %d, dead_cap = %d\n",
-	    dead_soc, dead_cap);
-
-	ocv_soc = rk817_bat_vol_to_soc(battery, ocv_voltage);
-	ocv_cap = rk817_bat_vol_to_cap(battery, ocv_voltage);
-	DBG("ZERO0: ocv_soc = %d, ocv_cap = %d\n",
-	    ocv_soc, ocv_cap);
-
-	/* xsoc: available rsoc */
-	xsoc = ocv_soc - dead_soc;
-
-	battery->zero_dead_voltage = dead_voltage;
-	battery->zero_dead_soc = dead_soc;
-	battery->zero_dead_cap = dead_cap;
-
-	battery->zero_batvol_to_ocv = ocv_voltage;
-	battery->zero_batocv_to_soc = ocv_soc;
-	battery->zero_batocv_to_cap = ocv_cap;
-
-	battery->zero_xsoc = xsoc;
-
-	DBG("Zero: xsoc = %d\n", xsoc);
-	/* min_gap_xsoc: reserve xsoc */
-	if (abs(current_avg) > ZERO_LOAD_LVL1)
-		min_gap_xsoc = MIN_ZERO_GAP_XSOC3;
-	else if (abs(current_avg) > ZERO_LOAD_LVL2)
-		min_gap_xsoc = MIN_ZERO_GAP_XSOC2;
-	else
-		min_gap_xsoc = MIN_ZERO_GAP_XSOC1;
-
-	if ((xsoc <= 30) &&
-	    (battery->dsoc >= battery->pdata->zero_reserve_dsoc))
-		min_gap_xsoc = min_gap_xsoc + MIN_ZERO_GAP_CALIB;
-
-	battery->zero_remain_cap = battery->remain_cap;
-	battery->zero_timeout_cnt = 0;
-	if ((battery->dsoc / 1000 <= 1) && (xsoc > 0)) {
-		battery->zero_linek = 400;
-		battery->zero_drop_sec = 0;
-	} else if (xsoc >= 0) {
-		battery->zero_drop_sec = 0;
-		battery->zero_linek =
-			(battery->zero_dsoc + xsoc / 2) / DIV(xsoc);
-		/* battery energy mode to use up voltage */
-		if ((battery->pdata->energy_mode) &&
-		    (xsoc - battery->dsoc / 1000 >= MIN_ZERO_GAP_XSOC3) &&
-		    (battery->dsoc  / 1000 <= 10) && (battery->zero_linek < 300)) {
-			battery->zero_linek = 300;
-			DBG("ZERO-new: zero_linek adjust step0...\n");
-		/* reserve enough power yet, slow down any way */
-		} else if ((xsoc - battery->dsoc / 1000 >= min_gap_xsoc) ||
-			   ((xsoc - battery->dsoc / 1000 >= MIN_ZERO_GAP_XSOC2) &&
-			    (battery->dsoc / 1000 <= 10) && (xsoc > 15))) {
-			if (xsoc <= 20 &&
-			    battery->dsoc / 1000 >= battery->pdata->zero_reserve_dsoc)
-				battery->zero_linek = 1200;
-			else if (xsoc - battery->dsoc / 1000 >= 2 * min_gap_xsoc)
-				battery->zero_linek = 400;
-			else if (xsoc - battery->dsoc / 1000 >= 3 + min_gap_xsoc)
-				battery->zero_linek = 600;
-			else
-				battery->zero_linek = 800;
-			DBG("ZERO-new: zero_linek adjust step1...\n");
-		/* control zero mode beginning enter */
-		} else if ((battery->zero_linek > 1800) &&
-			   (battery->dsoc / 1000 > 70)) {
-			battery->zero_linek = 1800;
-			DBG("ZERO-new: zero_linek adjust step2...\n");
-		/* dsoc close to xsoc: it must reserve power */
-		} else if ((battery->zero_linek > 1000) &&
-			   (battery->zero_linek < 1200)) {
-			battery->zero_linek = 1200;
-			DBG("ZERO-new: zero_linek adjust step3...\n");
-		/* dsoc[5~15], dsoc < xsoc */
-		} else if ((battery->dsoc / 1000 <= 15 && battery->dsoc > 5) &&
-			   (battery->zero_linek <= 1200)) {
-			/* slow down */
-			if ((xsoc - battery->dsoc / 1000) >= min_gap_xsoc)
-				battery->zero_linek = 800;
-			/* reserve power */
-			else
-				battery->zero_linek = 1200;
-			DBG("ZERO-new: zero_linek adjust step4...\n");
-		/* dsoc[5, 100], dsoc < xsoc */
-		} else if ((battery->zero_linek < 1000) &&
-			   (battery->dsoc / 1000 >= 5)) {
-			if ((xsoc - battery->dsoc / 1000) < min_gap_xsoc) {
-				/* reserve power */
-				battery->zero_linek = 1200;
-			} else {
-				if (abs(battery->current_avg) > 500)/* heavy */
-					battery->zero_linek = 900;
-				else
-					battery->zero_linek = 1000;
-			}
-			DBG("ZERO-new: zero_linek adjust step5...\n");
-		/* dsoc[0~5], dsoc < xsoc */
-		} else if ((battery->zero_linek < 1000) &&
-			   (battery->dsoc  / 1000 <= 5)) {
-			if ((xsoc - battery->dsoc / 1000) <= 3)
-				battery->zero_linek = 1200;
-			else
-				battery->zero_linek = 800;
-			DBG("ZERO-new: zero_linek adjust step6...\n");
-		}
-	} else {
-		/* xsoc < 0 */
-		battery->zero_linek = 1000;
-		if (!battery->zero_drop_sec)
-			battery->zero_drop_sec = get_boot_sec();
-		if (base2sec(battery->zero_drop_sec) >= WAIT_DSOC_DROP_SEC) {
-			DBG("ZERO0: t=%lu\n", base2sec(battery->zero_drop_sec));
-			battery->zero_drop_sec = 0;
-			battery->dsoc -= 1000;
-			if (battery->dsoc < 0)
-				battery->dsoc = 0;
-			battery->zero_dsoc = battery->dsoc;
-		}
-	}
-
-	if (voltage_avg < pwroff_vol - 70) {
-		if (!battery->shtd_drop_sec)
-			battery->shtd_drop_sec = get_boot_sec();
-		if (base2sec(battery->shtd_drop_sec) > WAIT_SHTD_DROP_SEC) {
-			DBG("voltage extreme low...soc:%d->0\n", battery->dsoc);
-			battery->shtd_drop_sec = 0;
-			battery->dsoc = 0;
-		}
-	} else {
-		battery->shtd_drop_sec = 0;
-	}
-
-	DBG("Zero: zero_linek = %d\n", battery->zero_linek);
-}
-
-static void rk817_bat_zero_algo_prepare(struct rk817_battery_device *battery)
-{
-	int tmp_dsoc;
-
-	tmp_dsoc = battery->zero_dsoc / 1000;
-
-	if (tmp_dsoc != battery->smooth_soc / 1000)
-		battery->zero_dsoc = battery->smooth_soc;
-
-	DBG("zero_smooth: zero_dsoc = %d\n", battery->zero_dsoc);
-
-	rk817_bat_calc_zero_linek(battery);
-}
-
-static void rk817_bat_calc_zero_algorithm(struct rk817_battery_device *battery)
-{
-	int tmp_soc;
-
-	tmp_soc = battery->zero_dsoc / 1000;
-
-	if (tmp_soc == battery->dsoc / 1000)
-		return;
-
-	if (battery->zero_dsoc > battery->dsoc)
-		return;
-
-	if (battery->zero_dsoc < battery->dsoc - 1000)
-		battery->dsoc -= 1000;
-	else
-		battery->dsoc = battery->zero_dsoc;
-}
-
-static void rk817_bat_zero_algorithm(struct rk817_battery_device *battery)
-{
-	int delta_cap = 0, delta_soc = 0;
-
-	battery->zero_timeout_cnt++;
-	delta_cap = battery->zero_remain_cap - battery->remain_cap;
-	delta_soc = battery->zero_linek * delta_cap / DIV(battery->fcc) / 10;
-
-	DBG("zero algorithm start\n");
-	DBG("DEAD: dead_voltage: %d\n"
-	    "dead_soc: %d\n"
-	    "dead_cap: %d\n"
-	    "powoff_vol: %d\n",
-	    battery->zero_dead_voltage,
-	    battery->zero_dead_soc,
-	    battery->zero_dead_cap,
-	    battery->pdata->pwroff_vol);
-	DBG("DEAD: bat_voltage: %d\n"
-	    "bat_current: %d\n"
-	    "batvol_to_ocv: %d\n"
-	    "batocv_to_soc: %d\n"
-	    "batocv_to_cap: %d\n",
-	    battery->zero_voltage_avg,
-	    battery->zero_current_avg,
-	    battery->zero_batvol_to_ocv,
-	    battery->zero_batocv_to_soc,
-	    battery->zero_batocv_to_cap);
-	DBG("DEAD: Xsoc: %d, zero_reserve_dsoc: %d\n",
-	    battery->zero_xsoc, battery->pdata->zero_reserve_dsoc);
-	DBG("CAP: zero_remain_cap = %d, remain_cap = %d\n",
-	    battery->zero_remain_cap, battery->remain_cap);
-	DBG("Zero: zero_delta_cap = %d, zero_link = %d, delta_soc = %d\n",
-	    delta_cap, battery->zero_linek, delta_soc);
-	DBG("zero algorithm end\n");
-
-	if ((delta_soc >= MIN_ZERO_DSOC_ACCURACY) ||
-	    (battery->zero_timeout_cnt > MIN_ZERO_OVERCNT) ||
-	    (battery->zero_linek == 0)) {
-		DBG("ZERO1:--------- enter calc -----------\n");
-		battery->zero_timeout_cnt = 0;
-		battery->zero_dsoc -= delta_soc;
-		rk817_bat_calc_zero_algorithm(battery);
-		DBG("Zero: dsoc: %d\n", battery->dsoc);
-		rk817_bat_calc_zero_linek(battery);
-	}
-
-	if ((battery->rsoc / 1000 < 1) &&
-	    (battery->zero_batocv_to_cap > battery->fcc / 100)) {
-		DBG("ZERO2:---------check step1 -----------\n");
-		rk817_bat_init_coulomb_cap(battery,
-					   battery->zero_batocv_to_cap);
-		rk817_bat_calc_zero_linek(battery);
-	}
-}
-
 static void rk817_bat_finish_algorithm(struct rk817_battery_device *battery)
 {
 	unsigned long finish_sec, soc_sec;
@@ -2762,7 +2283,7 @@ static void rk817_bat_finish_algorithm(struct rk817_battery_device *battery)
 
 	/* rsoc */
 	if ((battery->remain_cap != battery->fcc) &&
-	    (get_charge_status(battery) == CHARGE_FINISH)) {
+	    (rk817_bat_get_charge_status(battery) == CHARGE_FINISH)) {
 		battery->age_adjust_cap +=
 			(battery->fcc * 1000 - battery->remain_cap);
 		rk817_bat_init_coulomb_cap(battery, battery->fcc);
@@ -2770,11 +2291,11 @@ static void rk817_bat_finish_algorithm(struct rk817_battery_device *battery)
 	}
 
 	/* dsoc */
-	if (battery->dsoc < 100 * 1000) {
+	if (battery->dsoc < MAX_PERCENTAGE) {
 		if (!battery->finish_base)
 			battery->finish_base = get_boot_sec();
 
-		finish_current = (battery->rsoc - battery->dsoc) > FINISH_MAX_SOC_DELAY ?
+		finish_current = (battery->rsoc - battery->dsoc) / 1000 > FINISH_MAX_SOC_DELAY ?
 					FINISH_CHRG_CUR2 : FINISH_CHRG_CUR1;
 		finish_sec = base2sec(battery->finish_base);
 
@@ -2782,6 +2303,7 @@ static void rk817_bat_finish_algorithm(struct rk817_battery_device *battery)
 		if (soc_sec == 0)
 			soc_sec = 1;
 		plus_soc = finish_sec / DIV(soc_sec);
+
 		if (finish_sec > soc_sec) {
 			rest = finish_sec % soc_sec;
 			battery->dsoc += plus_soc * 1000;
@@ -2789,20 +2311,21 @@ static void rk817_bat_finish_algorithm(struct rk817_battery_device *battery)
 			if (battery->finish_base > rest)
 				battery->finish_base = get_boot_sec() - rest;
 		}
-		DBG("CHARGE_FINISH:dsoc<100,dsoc=%d\n"
+
+		DBG("CHARGE_FINISH:dsoc<100,dsoc=%d,\n"
 		    "soc_time=%lu, sec_finish=%lu, plus_soc=%d, rest=%d\n",
 		    battery->dsoc, soc_sec, finish_sec, plus_soc, rest);
 		DBG("battery->age_adjust_cap = %d\n", battery->age_adjust_cap);
 	}
+	if (battery->dsoc > MAX_PERCENTAGE)
+		battery->dsoc = MAX_PERCENTAGE;
 }
 
 static void rk817_bat_display_smooth(struct rk817_battery_device *battery)
 {
-	/* discharge: reinit "zero & smooth" algorithm to avoid handling dsoc */
 	if (battery->s2r && !battery->sleep_chrg_online) {
 		DBG("s2r: discharge, reset algorithm...\n");
 		battery->s2r = false;
-		rk817_bat_zero_algo_prepare(battery);
 		rk817_bat_smooth_algo_prepare(battery);
 		return;
 	}
@@ -2810,46 +2333,17 @@ static void rk817_bat_display_smooth(struct rk817_battery_device *battery)
 	if (battery->work_mode == MODE_FINISH) {
 		DBG("step1: charge finish...\n");
 		rk817_bat_finish_algorithm(battery);
-
-		if ((get_charge_status(battery) != CHARGE_FINISH) &&
+		if ((rk817_bat_get_charge_status(battery) != CHARGE_FINISH) &&
 		    !rk817_bat_fake_finish_mode(battery)) {
-			if ((battery->current_avg < 0) &&
-			    (battery->voltage_avg < battery->pdata->zero_algorithm_vol)) {
-				DBG("step1: change to zero mode...\n");
-				rk817_bat_zero_algo_prepare(battery);
-				battery->work_mode = MODE_ZERO;
-			} else {
-				DBG("step1: change to smooth mode...\n");
-				rk817_bat_smooth_algo_prepare(battery);
-				battery->work_mode = MODE_SMOOTH;
-			}
-		}
-	} else if (battery->work_mode == MODE_ZERO) {
-		DBG("step2: zero algorithm...\n");
-		rk817_bat_zero_algorithm(battery);
-		if ((battery->voltage_avg >=
-		    battery->pdata->zero_algorithm_vol + 50) ||
-		    (battery->current_avg >= 0)) {
-			DBG("step2: change to smooth mode...\n");
+			DBG("step1: change to smooth mode...\n");
 			rk817_bat_smooth_algo_prepare(battery);
 			battery->work_mode = MODE_SMOOTH;
-		} else if ((get_charge_status(battery) == CHARGE_FINISH) ||
-			   rk817_bat_fake_finish_mode(battery)) {
-			DBG("step2: change to finish mode...\n");
-			rk817_bat_finish_algo_prepare(battery);
-			battery->work_mode = MODE_FINISH;
 		}
 	} else {
 		DBG("step3: smooth algorithm...\n");
 		rk817_bat_smooth_algorithm(battery);
-		if ((battery->current_avg < 0) &&
-		    (battery->voltage_avg <
-		     battery->pdata->zero_algorithm_vol)) {
-			DBG("step3: change to zero mode...\n");
-			rk817_bat_zero_algo_prepare(battery);
-			battery->work_mode = MODE_ZERO;
-		} else if ((get_charge_status(battery) == CHARGE_FINISH) ||
-			   rk817_bat_fake_finish_mode(battery)) {
+		if ((rk817_bat_get_charge_status(battery) == CHARGE_FINISH) ||
+		    rk817_bat_fake_finish_mode(battery)) {
 			DBG("step3: change to finish mode...\n");
 			rk817_bat_finish_algo_prepare(battery);
 			battery->work_mode = MODE_FINISH;
@@ -2857,29 +2351,84 @@ static void rk817_bat_display_smooth(struct rk817_battery_device *battery)
 	}
 }
 
+static void rk817_bat_stay_awake(struct rk817_battery_device *battery)
+{
+	bool status = false;
+
+	if (!battery->pdata->charge_stay_awake)
+		return;
+
+	status = (battery->current_avg > 0) ||
+		(battery->sleep_chrg_status == CC_OR_CV_CHRG) ||
+		((battery->sleep_chrg_status == CHARGE_FINISH) &&
+		(battery->dsoc / 1000 < 100));
+
+	if (status && !battery->active_awake) {
+		battery->active_awake = true;
+		pm_stay_awake(battery->dev);
+	} else {
+		if (battery->active_awake && !status) {
+			battery->active_awake = false;
+			pm_relax(battery->dev);
+		}
+	}
+}
+
+static void rk817_bat_print_time(struct rk817_battery_device *battery)
+{
+	int cout_dsoc = battery->dsoc / 1000;
+	int cout_rsoc = battery->rsoc / 1000;
+	int time_avg = 0, time_count = 0;
+	int j;
+
+	if (cout_dsoc >= 0 && cout_dsoc < 100)
+		battery->dbg_dcount[cout_dsoc / 10]++;
+
+	if (cout_rsoc >= 0 && cout_rsoc < 100)
+		battery->dbg_rcount[cout_rsoc / 10]++;
+
+	if ((cout_dsoc < 1) || (cout_dsoc >= 99)) {
+		for (j = 0; j < 10; j++)
+			time_count += battery->dbg_dcount[j];
+		time_avg = time_count / 10;
+
+		for (j = 0; j < 10; j++)
+			DBG("DSOC[%d]: %d(minute) %d(s), %d(s)",
+			    j, battery->dbg_dcount[j] * battery->pdata->monitor_sec / 60,
+			    (battery->dbg_dcount[j] * battery->pdata->monitor_sec) % 60,
+			    (battery->dbg_dcount[j] - time_avg) * battery->pdata->monitor_sec);
+
+		for (j = 0; j < 10; j++)
+			DBG("RSOC[%d]: %d(minute) %d(s)",
+			    j, battery->dbg_rcount[j] * battery->pdata->monitor_sec / 60,
+			    battery->dbg_rcount[j] * battery->pdata->monitor_sec % 60);
+
+		DBG("time:%d(minute): avg: %d(minute), %d(s)",
+		    time_count * battery->pdata->monitor_sec / 60,
+		    time_avg * battery->pdata->monitor_sec / 60,
+		    (time_avg * battery->pdata->monitor_sec) % 60);
+	}
+}
+
 static void rk817_bat_output_info(struct rk817_battery_device *battery)
 {
 	DBG("info start:\n");
-	DBG("info: voltage_k = %d\n", battery->voltage_k);
-	DBG("info: voltage_b = %d\n", battery->voltage_b);
-	DBG("info: voltage = %d\n", battery->voltage_avg);
-	DBG("info: voltage_sys = %d\n", battery->voltage_sys);
-	DBG("info: current = %d\n", battery->current_avg);
+	DBG("info: voltage_k %d\n", battery->voltage_k);
+	DBG("info: voltage_b %d\n", battery->voltage_b);
+	DBG("info: voltage %d\n", battery->voltage_avg);
+	DBG("info: voltage_sys %d\n", battery->voltage_sys);
+	DBG("info: FCC %d\n", battery->fcc);
+	DBG("info: fake_full_soc: %d\n", battery->fake_full_soc);
+	DBG("info: awke: %d, count: %d\n",
+	    battery->pdata->charge_stay_awake,
+	    battery->active_awake);
 
-	DBG("info: FCC = %d\n", battery->fcc);
-	DBG("info: remain_cap = %d\n", battery->remain_cap);
-	DBG("info: sm_remain_cap = %d\n", battery->sm_remain_cap);
-	DBG("info: sm_link = %d\n", battery->sm_linek);
-	DBG("info: smooth_soc = %d\n", battery->smooth_soc);
-
-	DBG("info: zero_remain_cap = %d\n", battery->zero_remain_cap);
-	DBG("info: zero_link = %d\n", battery->zero_linek);
-	DBG("info: zero_dsoc = %d\n", battery->zero_dsoc);
-
-	DBG("info: remain_cap = %d\n", battery->remain_cap);
-	DBG("info: dsoc = %d, dsoc/1000 = %d\n",
-	    battery->dsoc, battery->dsoc / 1000);
-	DBG("info: rsoc = %d\n", battery->rsoc);
+	DBG("DEBUG: dsoc/1000: %d, dsoc: %d, rsoc: %d, sm_soc: %d, delta_rsoc: %d, vol: %d, exp_vol %d, current: %d, sm_link: %d, remain_cap: %d, sm_cap: %d\n",
+	    battery->dsoc / 1000, battery->dsoc, battery->rsoc,
+	    battery->smooth_soc, battery->delta_rsoc,
+	    battery->voltage_avg, battery->expected_voltage, battery->current_avg,
+	    battery->sm_linek, battery->remain_cap, battery->sm_remain_cap);
+	rk817_bat_print_time(battery);
 	DBG("info END.\n");
 }
 
@@ -2890,11 +2439,12 @@ static void rk817_battery_work(struct work_struct *work)
 			     struct rk817_battery_device,
 			     bat_delay_work.work);
 
-	rk817_bat_update_info(battery);
+	rk817_bat_update_fg_info(battery);
 	rk817_bat_lowpwr_check(battery);
 	rk817_bat_display_smooth(battery);
 	rk817_bat_power_supply_changed(battery);
 	rk817_bat_save_data(battery);
+	rk817_bat_stay_awake(battery);
 	rk817_bat_output_info(battery);
 
 	if (rk817_bat_field_read(battery, CUR_CALIB_UPD)) {
@@ -2998,10 +2548,10 @@ static int rk817_battery_probe(struct platform_device *pdev)
 {
 	const struct of_device_id *of_id =
 			of_match_device(rk817_bat_of_match, &pdev->dev);
-	struct rk817_battery_device *battery;
 	struct rk808 *rk817 = dev_get_drvdata(pdev->dev.parent);
 	struct i2c_client *client = rk817->i2c;
-	int i,  ret;
+	struct rk817_battery_device *battery;
+	int i, ret;
 
 	if (!of_id) {
 		dev_err(&pdev->dev, "Failed to find matching dt id\n");
@@ -3018,8 +2568,7 @@ static int rk817_battery_probe(struct platform_device *pdev)
 	platform_set_drvdata(pdev, battery);
 	battery->chip_id = rk817->variant;
 
-	battery->regmap = rk817->regmap;
-	if (IS_ERR(battery->regmap)) {
+	if (IS_ERR(rk817->regmap)) {
 		dev_err(battery->dev, "Failed to initialize regmap\n");
 		return -EINVAL;
 	}
@@ -3029,7 +2578,7 @@ static int rk817_battery_probe(struct platform_device *pdev)
 
 		battery->rmap_fields[i] =
 			devm_regmap_field_alloc(battery->dev,
-						battery->regmap,
+						rk817->regmap,
 						reg_fields[i]);
 		if (IS_ERR(battery->rmap_fields[i])) {
 			dev_err(battery->dev, "cannot allocate regmap field\n");
@@ -3047,7 +2596,7 @@ static int rk817_battery_probe(struct platform_device *pdev)
 	rk817_bat_init_fg(battery);
 
 	rk817_battery_debug_info(battery);
-	rk817_bat_update_info(battery);
+	rk817_bat_update_fg_info(battery);
 
 	rk817_bat_output_info(battery);
 	battery->bat_monitor_wq = alloc_ordered_workqueue("%s",
@@ -3055,7 +2604,6 @@ static int rk817_battery_probe(struct platform_device *pdev)
 	INIT_DELAYED_WORK(&battery->bat_delay_work, rk817_battery_work);
 	queue_delayed_work(battery->bat_monitor_wq, &battery->bat_delay_work,
 			   msecs_to_jiffies(TIMER_MS_COUNTS * 5));
-	INIT_WORK(&battery->resume_work, rk817_bat_resume_work);
 
 	ret = rk817_bat_init_power_supply(battery);
 	if (ret) {
@@ -3073,12 +2621,11 @@ static int rk817_battery_probe(struct platform_device *pdev)
 	if (battery->chip_id == RK809_ID)
 		rk809_charge_init_irqs(battery);
 
-	wake_lock_init(&battery->wake_lock, WAKE_LOCK_SUSPEND,
-		       "rk817_bat_lock");
+	device_init_wakeup(battery->dev, true);
 
 	DBG("name: 0x%x", rk817_bat_field_read(battery, CHIP_NAME_H));
 	DBG("%x\n", rk817_bat_field_read(battery, CHIP_NAME_L));
-	DBG("driver version %s\n", DRIVER_VERSION);
+	BAT_INFO("driver version %s\n", DRIVER_VERSION);
 
 	return 0;
 }
@@ -3114,10 +2661,13 @@ static int rk817_bat_pm_suspend(struct device *dev)
 	struct rk817_battery_device *battery = dev_get_drvdata(&pdev->dev);
 
 	cancel_delayed_work_sync(&battery->bat_delay_work);
+	rk817_bat_update_fg_info(battery);
 
 	battery->s2r = false;
-	battery->sleep_chrg_status = get_charge_status(battery);
-	battery->current_avg = rk817_bat_get_avg_current(battery);
+	battery->sleep_chrg_status = rk817_bat_get_charge_status(battery);
+	/* battery->current_avg = rk817_bat_get_avg_current(battery); */
+	battery->current_sleep = battery->current_avg;
+
 	if (battery->current_avg > 0 ||
 	    (battery->sleep_chrg_status == CC_OR_CV_CHRG) ||
 	    (battery->sleep_chrg_status == CHARGE_FINISH))
@@ -3131,25 +2681,13 @@ static int rk817_bat_pm_suspend(struct device *dev)
 	battery->rtc_base = rk817_get_rtc_sec();
 	rk817_bat_save_data(battery);
 
+	if (is_rk817_bat_relax_mode(battery))
+		rk817_bat_restart_relax(battery);
+
 	if (battery->sleep_chrg_status != CHARGE_FINISH)
 		battery->finish_base = get_boot_sec();
 
-	if ((battery->work_mode == MODE_ZERO) &&
-	    (battery->current_avg >= 0)) {
-		DBG("suspend: MODE_ZERO exit...\n");
-		/* it need't do prepare for mode finish and smooth, it will
-		 * be done in display_smooth
-		 */
-		if (battery->sleep_chrg_status == CHARGE_FINISH) {
-			battery->work_mode = MODE_FINISH;
-			if (!battery->finish_base)
-				battery->finish_base = get_boot_sec();
-		} else {
-			battery->work_mode = MODE_SMOOTH;
-			rk817_bat_smooth_algo_prepare(battery);
-		}
-	}
-
+	rk817_bat_calc_sm_linek(battery);
 	DBG("suspend get_boot_sec: %lld\n", get_boot_sec());
 
 	DBG("suspend: dl=%d rl=%d c=%d v=%d cap=%d at=%ld ch=%d\n",
@@ -3157,6 +2695,7 @@ static int rk817_bat_pm_suspend(struct device *dev)
 	    rk817_bat_get_battery_voltage(battery),
 	    rk817_bat_get_capacity_uah(battery),
 	    battery->sleep_dischrg_sec, battery->sleep_chrg_online);
+
 	DBG("battery->sleep_chrg_status=%d\n", battery->sleep_chrg_status);
 
 	return 0;
@@ -3178,9 +2717,9 @@ static void rk817_bat_relife_age_flag(struct rk817_battery_device *battery)
 	if (battery->voltage_relax <= 0)
 		return;
 
-	ocv_soc = rk817_bat_vol_to_soc(battery, battery->voltage_relax);
-	ocv_cap = rk817_bat_vol_to_cap(battery, battery->voltage_relax);
-	DBG("<%s>. ocv_soc=%d, min=%lu, vol=%d\n", __func__,
+	ocv_soc = rk817_bat_vol2soc(battery, battery->voltage_relax) / 1000;
+	ocv_cap = rk817_bat_vol2cap(battery, battery->voltage_relax) / 1000;
+	DBG("Resume: <%s>. ocv_soc=%d, min=%lu, vol=%d\n", __func__,
 	    ocv_soc, battery->sleep_dischrg_sec / 60, battery->voltage_relax);
 
 	/* sleep enough time and ocv_soc enough low */
@@ -3206,8 +2745,8 @@ static void rk817_bat_relife_age_flag(struct rk817_battery_device *battery)
 			battery->age_keep_sec = get_boot_sec();
 		}
 
-		BAT_INFO("resume: age_vol:%d, age_ocv_cap:%d, age_ocv_soc:%d, "
-			 "soc_level:%d, age_allow_update:%d, "
+		BAT_INFO("resume: age_vol:%d, age_ocv_cap:%d, age_ocv_soc:%d\n"
+			 "soc_level:%d, age_allow_update:%d\n"
 			 "age_level:%d\n",
 			 battery->age_voltage, battery->age_ocv_cap,
 			 ocv_soc, soc_level,
@@ -3227,7 +2766,6 @@ static void rk817_bat_init_capacity(struct rk817_battery_device *battery,
 	battery->age_adjust_cap += delta_cap;
 	rk817_bat_init_coulomb_cap(battery, cap);
 	rk817_bat_smooth_algo_prepare(battery);
-	rk817_bat_zero_algo_prepare(battery);
 }
 
 static void rk817_bat_relax_vol_calib(struct rk817_battery_device *battery)
@@ -3235,163 +2773,134 @@ static void rk817_bat_relax_vol_calib(struct rk817_battery_device *battery)
 	int soc, cap, vol;
 
 	vol = battery->voltage_relax;
-	soc = rk817_bat_vol_to_soc(battery, vol);
-	cap = rk817_bat_vol_to_cap(battery, vol);
+	soc = rk817_bat_vol2soc(battery, vol) / 1000;
+	cap = rk817_bat_vol2cap(battery, vol);
 	rk817_bat_init_capacity(battery, cap);
-	BAT_INFO("sleep ocv calib: rsoc=%d, cap=%d\n", soc, cap);
+	BAT_INFO("sleep relax voltage calib: rsoc=%d, cap=%d\n", soc, cap);
 }
 
-static int rk817_bat_sleep_dischrg(struct rk817_battery_device *battery)
+static void rk817_bat_resume_profile_smoothing(struct rk817_battery_device *battery)
 {
-	bool ocv_soc_updated = false;
-	int tgt_dsoc, gap_soc, sleep_soc = 0;
-	int pwroff_vol = battery->pdata->pwroff_vol;
-	unsigned long sleep_sec = battery->sleep_dischrg_sec;
-	int sleep_cur;
+	int delta_cap = 0, old_cap = 0;
+	unsigned long charge_soc;
+	int interval_sec = 0;
+	long cap_change;
+	long ydsoc = 0;
 
-	DBG("<%s>. enter: dsoc=%d, rsoc=%d, rv=%d, v=%d, sleep_min=%lu\n",
-	    __func__, battery->dsoc, battery->rsoc, battery->voltage_relax,
-	    battery->voltage_avg, sleep_sec / 60);
-
-	if (battery->voltage_relax >= battery->voltage_avg) {
-		rk817_bat_relax_vol_calib(battery);
-		rk817_bat_restart_relax(battery);
-		rk817_bat_relife_age_flag(battery);
-		ocv_soc_updated = true;
-	}
-
-	/* handle dsoc */
-	if (battery->dsoc <= battery->rsoc) {
-		if (battery->pdata->low_pwr_sleep)
-			sleep_cur = LOW_PWR_SLP_CURR_MIN;
-		else
-			sleep_cur = SLP_CURR_MIN;
-		battery->sleep_sum_cap = (sleep_cur * sleep_sec / 3600);
-		sleep_soc = battery->sleep_sum_cap * 100 / DIV(battery->fcc);
-		tgt_dsoc = battery->dsoc - sleep_soc * 1000;
-		if (sleep_soc > 0) {
-			BAT_INFO("calib0: rl=%d, dl=%d, intval=%d\n",
-				 battery->rsoc, battery->dsoc, sleep_soc);
-			if (battery->dsoc / 1000 < 5) {
-				battery->dsoc -= 1000;
-			} else if ((tgt_dsoc / 1000 < 5) &&
-				   (battery->dsoc  / 1000 >= 5)) {
-				if (battery->dsoc / 1000 == 5)
-					battery->dsoc -= 1000;
-				else
-					battery->dsoc = 5 * 1000;
-			} else if (tgt_dsoc / 1000 > 5) {
-				battery->dsoc = tgt_dsoc;
-			}
-		}
-
-		DBG("%s: dsoc<=rsoc, sum_cap=%d==>sleep_soc=%d, tgt_dsoc=%d\n",
-		    __func__, battery->sleep_sum_cap, sleep_soc, tgt_dsoc);
-	} else {
-		/* di->dsoc > di->rsoc */
-		if (battery->pdata->low_pwr_sleep)
-			sleep_cur = LOW_PWR_SLP_CURR_MAX;
-		else
-			sleep_cur = SLP_CURR_MAX;
-		battery->sleep_sum_cap = (sleep_cur * sleep_sec / 3600);
-		sleep_soc = battery->sleep_sum_cap / DIV(battery->fcc / 100);
-		gap_soc = battery->dsoc - battery->rsoc;
-
-		DBG("calib1: rsoc=%d, dsoc=%d, intval=%d\n",
-		    battery->rsoc, battery->dsoc, sleep_soc);
-		if (gap_soc / 1000 > sleep_soc) {
-			if ((gap_soc - 5000) > (sleep_soc * 2 * 1000))
-				battery->dsoc -= (sleep_soc * 2 * 1000);
-			else
-				battery->dsoc -= sleep_soc * 1000;
-		} else {
-			battery->dsoc = battery->rsoc;
-		}
-
-		DBG("%s: dsoc>rsoc, sum_cap=%d=>sleep_soc=%d, gap_soc=%d\n",
-		    __func__, battery->sleep_sum_cap, sleep_soc, gap_soc);
-	}
-
-	if (battery->voltage_avg <= pwroff_vol - 70) {
-		battery->dsoc = 0;
-		DBG("low power sleeping, shutdown... %d\n", battery->dsoc);
-	}
-
-	if (ocv_soc_updated && sleep_soc &&
-	    (battery->rsoc - battery->dsoc) < 5000 &&
-	    battery->dsoc < 40 * 1000) {
-		battery->dsoc -= 1000;
-		DBG("low power sleeping, reserved... %d\n", battery->dsoc);
-	}
-
-	if (battery->dsoc <= 0) {
-		battery->dsoc = 0;
-		DBG("sleep dsoc is %d...\n", battery->dsoc);
-	}
-
-	DBG("<%s>. out: dsoc=%d, rsoc=%d, sum_cap=%d\n",
-	    __func__, battery->dsoc, battery->rsoc, battery->sleep_sum_cap);
-
-	return sleep_soc;
-}
-
-static void rk817_bat_resume_work(struct work_struct *work)
-{
-	struct rk817_battery_device *battery = container_of(work, struct rk817_battery_device, resume_work);
-	int interval_sec = 0, time_step = 0, pwroff_vol;
-
-	battery->s2r = true;
-	battery->current_avg = rk817_bat_get_avg_current(battery);
-	battery->voltage_relax = rk817_bat_get_relax_voltage(battery);
-	battery->voltage_avg = rk817_bat_get_battery_voltage(battery);
 	battery->remain_cap = rk817_bat_get_capacity_uah(battery);
-	battery->rsoc = rk817_bat_get_rsoc(battery);
-	interval_sec = rk817_bat_rtc_sleep_sec(battery);
-	battery->sleep_sum_sec += interval_sec;
-	pwroff_vol = battery->pdata->pwroff_vol;
+	old_cap = battery->sm_remain_cap;
 
-	if (!battery->sleep_chrg_online) {
-		/* only add up discharge sleep seconds */
-		battery->sleep_dischrg_sec += interval_sec;
-		if (battery->voltage_avg <= pwroff_vol + 50)
-			time_step = DISCHRG_TIME_STEP1;
-		else
-			time_step = DISCHRG_TIME_STEP2;
+	DBG("smooth: smooth_soc = %d, dsoc = %d, battery->sm_linek = %d\n",
+	    battery->smooth_soc, battery->dsoc, battery->sm_linek);
+
+	/* discharge status: sm_remain_cap > remain_cap, delta_cap > 0 */
+	/* from charge to discharge:
+	 * remain_cap may be above sm_remain_cap, delta_cap <= 0
+	 */
+	delta_cap = battery->remain_cap - battery->sm_remain_cap;
+
+	DBG("smooth: sm_remain_cap: %d, remain_cap: %d, delta_cap: %d\n",
+	    battery->sm_remain_cap, battery->remain_cap, delta_cap);
+
+	/* discharge: sm_linek < 0, if delate_cap <0, ydsoc > 0 */
+	/* captosoc: delta_cap * MAX_PERCENTAGE / (DIV(battery->fcc) * 1000)
+	 * delta_cap * 100 / DIV(battery->fcc)
+	 *
+	 * captosoc Remainder: delta_cap * MAX_PERCENTAGE % (DIV(battery->fcc) * 1000)
+	 * delta_cap * 100 % DIV(battery->fcc)
+	 */
+	/* delta_cap += battery->delta_cap_remainder;
+	 * ydsoc = battery->sm_linek * abs(delta_cap) / (10 * DIV(battery->fcc));
+	 */
+
+	/* ydsoc = battery->sm_linek * (abs(delta_cap) * 100 + battery->delta_cap_remainder) /
+	 * DIV(battery->fcc) / 1000;
+	 */
+	cap_change = battery->sm_linek * abs(delta_cap) + battery->delta_cap_remainder;
+	ydsoc = cap_change / (10 * DIV(battery->fcc));
+
+	DBG("smooth: ydsoc = %ld, fcc = %d\n", ydsoc, battery->fcc);
+
+	DBG("<%s>. k=%d, ydsoc=%ld; cap:old=%d, new:%d; delta_cap=%d\n",
+	    __func__, battery->sm_linek, ydsoc, old_cap,
+	    battery->sm_remain_cap, delta_cap);
+
+	/* finish:
+	 * 1, suspend online: battery->sleep_chrg_online = 1
+	 */
+	if (battery->sleep_chrg_online && ((battery->rsoc >= battery->fake_full_soc) ||
+	    (rk817_bat_get_charge_status(battery) == CHARGE_FINISH))) {
+		if (battery->current_sleep < FINISH_CHRG_CUR1)
+			battery->current_sleep = FINISH_CHRG_CUR1;
+		interval_sec = rk817_bat_rtc_sleep_sec(battery);
+		charge_soc =
+			interval_sec * battery->current_sleep * MAX_PERCENTAGE / 3600 / DIV(battery->fcc);
+
+		if (ydsoc < charge_soc) {
+			battery->dsoc += charge_soc;
+			battery->smooth_soc = battery->dsoc;
+			battery->delta_cap_remainder = 0;
+			battery->sm_remain_cap = battery->remain_cap;
+		}
+	} else {
+		/* discharge mode, but ydsoc > 0, from charge status to dischrage
+		 */
+		if (ydsoc != 0) {
+			battery->smooth_soc += ydsoc;
+			battery->dsoc += ydsoc;
+			battery->delta_cap_remainder = cap_change % (10 * DIV(battery->fcc));
+			battery->sm_remain_cap = battery->remain_cap;
+		}
 	}
 
-	DBG("resume: dl=%d rl=%d c=%d v=%d rv=%d "
-	    "cap=%d dt=%d at=%ld ch=%d, sec = %d\n",
-	    battery->dsoc, battery->rsoc, battery->current_avg,
-	    battery->voltage_avg, battery->voltage_relax,
-	    rk817_bat_get_capacity_uah(battery), interval_sec,
-	    battery->sleep_dischrg_sec, battery->sleep_chrg_online,
-	    interval_sec);
-
-	/* sleep: enough time and discharge */
-	if ((!battery->sleep_chrg_online) &&
-	    (battery->sleep_dischrg_sec > time_step)) {
-		if (rk817_bat_sleep_dischrg(battery))
-			battery->sleep_dischrg_sec = 0;
+	if (rk817_bat_field_read(battery, CHG_STS) == CHARGE_FINISH) {
+		battery->rsoc = MAX_PERCENTAGE;
+		rk817_bat_init_coulomb_cap(battery, battery->fcc);
 	}
 
-	rk817_bat_save_data(battery);
+	/* check new dsoc */
+	if (battery->smooth_soc < 0)
+		battery->smooth_soc = 0;
+	if (battery->dsoc < 0)
+		battery->dsoc = 0;
+	if (battery->smooth_soc > MAX_PERCENTAGE)
+		battery->smooth_soc = MAX_PERCENTAGE;
+	if (battery->dsoc > MAX_PERCENTAGE)
+		battery->dsoc = MAX_PERCENTAGE;
 
-	/* charge/lowpower lock: for battery work to update dsoc and rsoc */
-	if ((battery->sleep_chrg_online) ||
-	    (!battery->sleep_chrg_online &&
-	    battery->voltage_avg < battery->pdata->pwroff_vol))
-		wake_lock_timeout(&battery->wake_lock, msecs_to_jiffies(2000));
+	rk817_bat_output_info(battery);
 
-	queue_delayed_work(battery->bat_monitor_wq, &battery->bat_delay_work,
-			   msecs_to_jiffies(1000));
+	DBG("Resume: voltage_relax: %d\n", battery->voltage_relax);
+	if (is_rk817_bat_relax_mode(battery)) {
+		if (battery->voltage_relax >= battery->voltage_avg) {
+			rk817_bat_relax_vol_calib(battery);
+			rk817_bat_restart_relax(battery);
+			rk817_bat_relife_age_flag(battery);
+		}
+		DBG("Resume:relax:\n");
+		rk817_bat_output_info(battery);
+	}
+	rk817_bat_calc_sm_linek(battery);
 }
 
 static int rk817_bat_pm_resume(struct device *dev)
 {
 	struct rk817_battery_device *battery = dev_get_drvdata(dev);
+	int interval_sec = 0;
 
-	queue_work(battery->bat_monitor_wq, &battery->resume_work);
+	rk817_bat_update_fg_info(battery);
 
+	battery->s2r = true;
+	interval_sec = rk817_bat_rtc_sleep_sec(battery);
+	battery->sleep_sum_sec += interval_sec;
+
+	rk817_bat_resume_profile_smoothing(battery);
+	rk817_bat_save_data(battery);
+	DBG("RESUME:");
+	rk817_bat_output_info(battery);
+
+	queue_delayed_work(battery->bat_monitor_wq, &battery->bat_delay_work,
+			   msecs_to_jiffies(1000));
 	return 0;
 }
 

From 3d799a32605565b4f19e52ac22d12fea8b417e87 Mon Sep 17 00:00:00 2001
From: Chen Shunqing <csq@rock-chips.com>
Date: Fri, 28 Feb 2025 16:32:13 +0800
Subject: [PATCH 17/24] media: rockchip: hdmirx: fix crash when get fmt

Call trace:
 dump_backtrace+0xf4/0x118
 show_stack+0x18/0x24
 dump_stack_lvl+0x60/0x7c
 dump_stack+0x18/0x38
 __schedule_bug+0x6c/0x8c
 __schedule+0x668/0x9f0
 schedule+0x7c/0xe8
 schedule_hrtimeout_range_clock+0xa4/0x118
 schedule_hrtimeout_range+0x14/0x24
 usleep_range_state+0x60/0x9c
 hdmirx_get_pix_fmt+0xa0/0x210 [rockchip_hdmirx]
 hdmirx_hdmi_irq_handler+0x770/0xb4c [rockchip_hdmirx]
 __handle_irq_event_percpu+0xbc/0x26c
 handle_irq_event+0x48/0xb8
 handle_fasteoi_irq+0x124/0x284
 generic_handle_domain_irq+0x44/0x60
 gic_handle_irq+0x4c/0x114
 call_on_irq_stack+0x3c/0x74
 el1_interrupt+0x74/0xd8
 el1h_64_irq_handler+0x18/0x24
 el1h_64_irq+0x68/0x6c

Signed-off-by: Chen Shunqing <csq@rock-chips.com>
Change-Id: Id789732bd80b57b128002d6c4a0546eab10f747e
---
 drivers/media/platform/rockchip/hdmirx/rk_hdmirx.c | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/drivers/media/platform/rockchip/hdmirx/rk_hdmirx.c b/drivers/media/platform/rockchip/hdmirx/rk_hdmirx.c
index 263b69bc0880..6ad950178e7b 100644
--- a/drivers/media/platform/rockchip/hdmirx/rk_hdmirx.c
+++ b/drivers/media/platform/rockchip/hdmirx/rk_hdmirx.c
@@ -715,10 +715,10 @@ static void hdmirx_get_colordepth(struct rk_hdmirx_dev *hdmirx_dev)
 			__func__, hdmirx_dev->color_depth, color_depth_reg);
 }
 
-static void hdmirx_get_pix_fmt(struct rk_hdmirx_dev *hdmirx_dev)
+static void hdmirx_get_pix_fmt(struct rk_hdmirx_dev *hdmirx_dev, bool retry)
 {
 	u32 val;
-	int timeout = 10;
+	int timeout = retry ? 10 : 0;
 	struct v4l2_device *v4l2_dev = &hdmirx_dev->v4l2_dev;
 
 try_loop:
@@ -1009,7 +1009,7 @@ static int hdmirx_get_detected_timings(struct rk_hdmirx_dev *hdmirx_dev,
 
 	val = hdmirx_readl(hdmirx_dev, DMA_STATUS11);
 	field_type = (val & HDMIRX_TYPE_MASK) >> 7;
-	hdmirx_get_pix_fmt(hdmirx_dev);
+	hdmirx_get_pix_fmt(hdmirx_dev, true);
 	hdmirx_get_color_range(hdmirx_dev);
 	hdmirx_get_color_space(hdmirx_dev);
 	bt->interlaced = field_type & BIT(0) ?
@@ -2830,7 +2830,7 @@ static void pkt_0_int_handler(struct rk_hdmirx_dev *hdmirx_dev,
 	if ((status & PKTDEC_AVIIF_CHG_IRQ)) {
 		hdmirx_get_color_range(hdmirx_dev);
 		hdmirx_get_color_space(hdmirx_dev);
-		hdmirx_get_pix_fmt(hdmirx_dev);
+		hdmirx_get_pix_fmt(hdmirx_dev, false);
 		if (hdmirx_dev->cur_fmt_fourcc != pre_fmt_fourcc ||
 		    hdmirx_dev->cur_color_range != pre_color_range ||
 		    hdmirx_dev->cur_color_space != pre_color_space) {

From bb0188c9c45c7bc2b706ccec109599cbe8909ab5 Mon Sep 17 00:00:00 2001
From: Tom Song <tom.song@rock-chips.com>
Date: Fri, 28 Mar 2025 17:35:06 +0800
Subject: [PATCH 18/24] arm64: dts: rockchip: add rk3576-vehicle-amp

Change-Id: I5230ff09ea46f2775a410c2f3e52767eca97d2a5
Signed-off-by: Tom Song <tom.song@rock-chips.com>
Signed-off-by: Xu Xuehui <xxh@rock-chips.com>
---
 arch/arm64/boot/dts/rockchip/Makefile         |  1 +
 .../boot/dts/rockchip/rk3576-vehicle-amp.dtsi | 78 +++++++++++++++++++
 .../rockchip/rk3576-vehicle-evb-v20-amp.dts   | 12 +++
 3 files changed, 91 insertions(+)
 create mode 100644 arch/arm64/boot/dts/rockchip/rk3576-vehicle-amp.dtsi
 create mode 100644 arch/arm64/boot/dts/rockchip/rk3576-vehicle-evb-v20-amp.dts

diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/rockchip/Makefile
index cf4892da4769..72a348c9b5ca 100644
--- a/arch/arm64/boot/dts/rockchip/Makefile
+++ b/arch/arm64/boot/dts/rockchip/Makefile
@@ -294,6 +294,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3576-test5-v10.dtb
 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3576-vehicle-evb-v10.dtb
 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3576-vehicle-evb-v10-linux.dtb
 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3576-vehicle-evb-v20.dtb
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3576-vehicle-evb-v20-amp.dtb
 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3576-vehicle-evb-v20-linux.dtb
 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3576s-evb1-v10.dtb
 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3576s-evb1-v10-linux.dtb
diff --git a/arch/arm64/boot/dts/rockchip/rk3576-vehicle-amp.dtsi b/arch/arm64/boot/dts/rockchip/rk3576-vehicle-amp.dtsi
new file mode 100644
index 000000000000..b8c2ec459fb2
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/rk3576-vehicle-amp.dtsi
@@ -0,0 +1,78 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2024 Rockchip Electronics Co., Ltd.
+ */
+
+#include <dt-bindings/soc/rockchip-amp.h>
+
+#define CPU_GET_AFFINITY(cpuId, clusterId) (((cpuId) << 0) | ((clusterId) << 8))
+
+/ {
+	rockchip_amp: rockchip-amp {
+		compatible = "rockchip,amp";
+		clocks = <&cru FCLK_BUS_CM0_CORE>, <&cru CLK_BUS_CM0_RTC>,
+			<&cru FCLK_PMU_CM0_CORE>, <&cru CLK_PMU_CM0_RTC>,
+			<&cru PCLK_MAILBOX0>,
+			<&cru SCLK_UART8>, <&cru PCLK_UART8>,
+			<&cru PCLK_BUSTIMER1>, <&cru CLK_TIMER10>, <&cru CLK_TIMER11>;
+
+		pinctrl-names = "default";
+		pinctrl-0 = <&uart8m1_xfer>;
+
+		amp-cpu-aff-maskbits = /bits/ 64 <0x0 0x1 0x1 0x2 0x2 0x4 0x3 0x8 0x100 0x10
+						 0x101 0x20 0x102 0x40 0x103 0x80>;
+		amp-irqs = /bits/ 64 <GIC_AMP_IRQ_CFG_ROUTE(113, 0xd0, CPU_GET_AFFINITY(3, 0))
+				      GIC_AMP_IRQ_CFG_ROUTE(174, 0xd0, CPU_GET_AFFINITY(3, 0))>;
+		status = "okay";
+	};
+
+	reserved-memory {
+		#address-cells = <2>;
+		#size-cells = <2>;
+		ranges;
+
+		mcu_reserved: mcu@47800000 {
+			reg = <0x0 0x47800000 0x0 0x100000>;
+			no-map;
+		};
+
+		amp_shmem_reserved: amp-shmem@47900000 {
+			reg = <0x0 0x47900000 0x0 0x400000>;
+			no-map;
+		};
+
+		rpmsg_reserved: rpmsg@47d00000 {
+			reg = <0x0 0x47d00000 0x0 0x200000>;
+			no-map;
+		};
+
+		rpmsg_dma_reserved: rpmsg-dma@47f00000 {
+			compatible = "shared-dma-pool";
+			reg = <0x0 0x47f00000 0x0 0x200000>;
+			no-map;
+		};
+	};
+
+	rpmsg: rpmsg@47d00000 {
+		compatible = "rockchip,rpmsg";
+		mbox-names = "rpmsg-rx", "rpmsg-tx";
+		mboxes = <&mailbox0 0 &mailbox3 0>;
+		rockchip,vdev-nums = <1>;
+		/* CPU3: link-id 0x03; MCU: link-id 0x04; */
+		rockchip,link-id = <0x03>;
+		reg = <0x0 0x47d00000 0x0 0x20000>;
+		memory-region = <&rpmsg_dma_reserved>;
+
+		status = "okay";
+	};
+};
+
+&mailbox0 {
+	rockchip,txpoll-period-ms = <1>;
+	status = "okay";
+};
+
+&mailbox3 {
+	rockchip,txpoll-period-ms = <1>;
+	status = "okay";
+};
diff --git a/arch/arm64/boot/dts/rockchip/rk3576-vehicle-evb-v20-amp.dts b/arch/arm64/boot/dts/rockchip/rk3576-vehicle-evb-v20-amp.dts
new file mode 100644
index 000000000000..92605f93cd72
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/rk3576-vehicle-evb-v20-amp.dts
@@ -0,0 +1,12 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2024 Rockchip Electronics Co., Ltd.
+ *
+ */
+#include "rk3576-vehicle-evb-v20.dts"
+#include "rk3576-vehicle-amp.dtsi"
+
+&uart8 {
+	status = "disabled";
+};
+

From 23eebc5a3d8c96a5383e16a0dff5a7d6beb28441 Mon Sep 17 00:00:00 2001
From: Tom Song <tom.song@rock-chips.com>
Date: Thu, 27 Mar 2025 09:15:52 +0800
Subject: [PATCH 19/24] arm64: configs: add rk3576_vehicle_amp.config

Change-Id: I9bac381c1aa728c8ce22a1370445b55bbe99d1d8
Signed-off-by: Tom Song <tom.song@rock-chips.com>
---
 arch/arm64/configs/rk3576_vehicle_amp.config | 160 +++++++++++++++++++
 1 file changed, 160 insertions(+)
 create mode 100644 arch/arm64/configs/rk3576_vehicle_amp.config

diff --git a/arch/arm64/configs/rk3576_vehicle_amp.config b/arch/arm64/configs/rk3576_vehicle_amp.config
new file mode 100644
index 000000000000..81c1f6f0ce8e
--- /dev/null
+++ b/arch/arm64/configs/rk3576_vehicle_amp.config
@@ -0,0 +1,160 @@
+CONFIG_AHCI_DWC=m
+# CONFIG_BATTERY_CW2015 is not set
+# CONFIG_BATTERY_CW2017 is not set
+# CONFIG_BATTERY_CW221X is not set
+# CONFIG_BATTERY_RK817 is not set
+# CONFIG_BATTERY_RK818 is not set
+# CONFIG_CHARGER_BQ25700 is not set
+# CONFIG_CHARGER_BQ25890 is not set
+# CONFIG_CHARGER_RK817 is not set
+# CONFIG_CHARGER_RK818 is not set
+# CONFIG_CHARGER_SC8551 is not set
+# CONFIG_CHARGER_SC89890 is not set
+# CONFIG_CHARGER_SGM41542 is not set
+# CONFIG_COMMON_CLK_PWM is not set
+# CONFIG_COMPASS_DEVICE is not set
+# CONFIG_CPU_IDLE_GOV_MENU is not set
+CONFIG_CPU_IDLE_GOV_TEO=y
+# CONFIG_CPU_PX30 is not set
+# CONFIG_CPU_RK3328 is not set
+# CONFIG_CPU_RK3368 is not set
+# CONFIG_CPU_RK3399 is not set
+# CONFIG_CPU_RK3528 is not set
+# CONFIG_CPU_RK3562 is not set
+# CONFIG_CPU_RK3568 is not set
+# CONFIG_CRYPTO_DEV_ROCKCHIP_V1 is not set
+# CONFIG_CRYPTO_DEV_ROCKCHIP_V3 is not set
+# CONFIG_DRM_MAXIM_MAX96745 is not set
+# CONFIG_DRM_MAXIM_MAX96755F is not set
+# CONFIG_DRM_RK1000_TVE is not set
+# CONFIG_DRM_RK630_TVE is not set
+# CONFIG_DRM_ROHM_BU18XL82 is not set
+# CONFIG_DRM_SII902X is not set
+CONFIG_GPIO_NCA9539=y
+# CONFIG_HALL_DEVICE is not set
+CONFIG_HZ=1000
+CONFIG_HZ_1000=y
+# CONFIG_HZ_300 is not set
+# CONFIG_IIO_ST_LSM6DSR is not set
+# CONFIG_INPUT_TABLET is not set
+# CONFIG_LIGHT_DEVICE is not set
+CONFIG_LOG_BUF_SHIFT=20
+# CONFIG_MALI400 is not set
+# CONFIG_MALI_MIDGARD is not set
+# CONFIG_MFD_RK618 is not set
+# CONFIG_MFD_RK630_I2C is not set
+# CONFIG_MFD_RKX110_X120 is not set
+CONFIG_MFD_SERDES_DISPLAY=y
+# CONFIG_PROXIMITY_DEVICE is not set
+# CONFIG_R8168 is not set
+CONFIG_REALTEK_PHY=y
+# CONFIG_REGULATOR_ACT8865 is not set
+# CONFIG_REGULATOR_FAN53555 is not set
+# CONFIG_REGULATOR_LP8752 is not set
+# CONFIG_REGULATOR_MP8865 is not set
+# CONFIG_REGULATOR_TPS65132 is not set
+# CONFIG_REGULATOR_WL2868C is not set
+# CONFIG_REGULATOR_XZ3216 is not set
+# CONFIG_ROCKCHIP_CHARGER_MANAGER is not set
+# CONFIG_ROCKCHIP_CLK_BOOST is not set
+# CONFIG_ROCKCHIP_CLK_INV is not set
+# CONFIG_ROCKCHIP_CLK_PVTM is not set
+# CONFIG_ROCKCHIP_DDRCLK_SIP is not set
+# CONFIG_ROCKCHIP_DDRCLK_SIP_V2 is not set
+CONFIG_ROCKCHIP_DRM_DIRECT_SHOW=y
+# CONFIG_ROCKCHIP_PLL_RK3066 is not set
+# CONFIG_ROCKCHIP_PLL_RK3399 is not set
+# CONFIG_ROCKCHIP_SERDES_DRM_PANEL is not set
+CONFIG_RTC_DRV_S35390A=y
+# CONFIG_SLUB_SYSFS is not set
+# CONFIG_SND_SOC_AW883XX is not set
+# CONFIG_SND_SOC_CX2072X is not set
+# CONFIG_SND_SOC_ES8311 is not set
+# CONFIG_SND_SOC_ES8316 is not set
+# CONFIG_SND_SOC_ES8326 is not set
+# CONFIG_SND_SOC_ES8396 is not set
+# CONFIG_SND_SOC_RK3328 is not set
+# CONFIG_SND_SOC_RK3528 is not set
+# CONFIG_SND_SOC_RK817 is not set
+# CONFIG_SND_SOC_RK_CODEC_DIGITAL is not set
+# CONFIG_SND_SOC_RT5640 is not set
+# CONFIG_TOUCHSCREEN_ELAN5515 is not set
+# CONFIG_TOUCHSCREEN_GSL3673 is not set
+# CONFIG_TOUCHSCREEN_GSLX680_PAD is not set
+CONFIG_TOUCHSCREEN_GT1X=m
+CONFIG_TOUCHSCREEN_ILI210X=m
+# CONFIG_UCS12CM0 is not set
+# CONFIG_USB_ALI_M5632 is not set
+# CONFIG_USB_AN2720 is not set
+# CONFIG_USB_EPSON2888 is not set
+# CONFIG_USB_HIDDEV is not set
+# CONFIG_USB_KC2190 is not set
+# CONFIG_USB_NET_CX82310_ETH is not set
+# CONFIG_USB_NET_DM9601 is not set
+# CONFIG_USB_NET_GL620A is not set
+# CONFIG_USB_NET_INT51X1 is not set
+# CONFIG_USB_NET_MCS7830 is not set
+# CONFIG_USB_NET_SMSC75XX is not set
+# CONFIG_USB_NET_SMSC95XX is not set
+CONFIG_USB_OHCI_HCD=m
+CONFIG_USB_OHCI_HCD_PLATFORM=m
+# CONFIG_VIDEO_AW36518 is not set
+# CONFIG_VIDEO_AW8601 is not set
+# CONFIG_VIDEO_CN3927V is not set
+# CONFIG_VIDEO_DW9714 is not set
+# CONFIG_VIDEO_FP5510 is not set
+# CONFIG_VIDEO_GC2145 is not set
+# CONFIG_VIDEO_GC2385 is not set
+# CONFIG_VIDEO_GC4C33 is not set
+# CONFIG_VIDEO_GC8034 is not set
+# CONFIG_VIDEO_IMX415 is not set
+CONFIG_VIDEO_MAXIM_SERDES=y
+# CONFIG_VIDEO_OV02B10 is not set
+# CONFIG_VIDEO_OV13850 is not set
+# CONFIG_VIDEO_OV13855 is not set
+# CONFIG_VIDEO_OV50C40 is not set
+# CONFIG_VIDEO_OV5695 is not set
+# CONFIG_VIDEO_OV8858 is not set
+# CONFIG_VIDEO_RK628_BT1120 is not set
+# CONFIG_VIDEO_RK628_CSI is not set
+# CONFIG_VIDEO_RK_IRCUT is not set
+# CONFIG_VIDEO_ROCKCHIP_ISP_VERSION_V1X is not set
+# CONFIG_VIDEO_ROCKCHIP_ISP_VERSION_V21 is not set
+# CONFIG_VIDEO_ROCKCHIP_ISP_VERSION_V32 is not set
+# CONFIG_VIDEO_S5K3L6XX is not set
+# CONFIG_VIDEO_S5KJN1 is not set
+# CONFIG_VIDEO_SGM3784 is not set
+# CONFIG_VL6180 is not set
+# CONFIG_ROCKCHIP_DRM_SELF_TEST is not set
+CONFIG_SERDES_DISPLAY_CHIP_MAXIM=y
+CONFIG_SERDES_DISPLAY_CHIP_MAXIM_MAX96745=y
+CONFIG_SERDES_DISPLAY_CHIP_MAXIM_MAX96752=y
+CONFIG_SERDES_DISPLAY_CHIP_MAXIM_MAX96755=y
+CONFIG_SERDES_DISPLAY_CHIP_MAXIM_MAX96772=y
+CONFIG_SERDES_DISPLAY_CHIP_MAXIM_MAX96789=y
+CONFIG_SERDES_DISPLAY_CHIP_NOVO=y
+CONFIG_SERDES_DISPLAY_CHIP_NOVO_NCA9539=y
+CONFIG_SERDES_DISPLAY_CHIP_ROCKCHIP=y
+CONFIG_SERDES_DISPLAY_CHIP_ROCKCHIP_RKX111=y
+CONFIG_SERDES_DISPLAY_CHIP_ROCKCHIP_RKX121=y
+CONFIG_SERDES_DISPLAY_CHIP_ROHM=y
+CONFIG_SERDES_DISPLAY_CHIP_ROHM_BU18RL82=y
+CONFIG_SERDES_DISPLAY_CHIP_ROHM_BU18TL82=y
+CONFIG_VIDEO_MAXIM_CAM_DUMMY=y
+CONFIG_VIDEO_MAXIM_CAM_OV231X=y
+CONFIG_VIDEO_MAXIM_CAM_OX01F10=y
+CONFIG_VIDEO_MAXIM_CAM_OX03J10=y
+CONFIG_VIDEO_MAXIM_CAM_SC320AT=y
+# CONFIG_VIDEO_MAXIM_DES_MAXIM2C is not set
+CONFIG_VIDEO_MAXIM_DES_MAXIM4C=y
+CONFIG_VIDEO_MAXIM_SER_MAX9295=y
+CONFIG_VIDEO_MAXIM_SER_MAX96715=y
+CONFIG_VIDEO_MAXIM_SER_MAX96717=y
+# CONFIG_VIDEO_REVERSE_IMAGE is not set
+CONFIG_ROCKCHIP_AMP=y
+CONFIG_MAILBOX=y
+CONFIG_ROCKCHIP_MBOX=y
+CONFIG_RPMSG_ROCKCHIP_MBOX=y
+CONFIG_RPMSG_VIRTIO=y
+CONFIG_RPMSG_CHAR=y
+CONFIG_RPMSG_CTRL=y
\ No newline at end of file

From 667f793992c1788493bc7b3e97aa643f5fd8676b Mon Sep 17 00:00:00 2001
From: Su Yuefu <yuefu.su@rock-chips.com>
Date: Thu, 3 Apr 2025 16:58:21 +0800
Subject: [PATCH 20/24] media: i2c: sc450ai: add 2lane/4lane hdr config

Signed-off-by: Su Yuefu <yuefu.su@rock-chips.com>
Change-Id: I88228ca481f263e22682beff48bb419847dbc918
---
 drivers/media/i2c/sc450ai.c | 945 +++++++++++++++++++++++++++++++++---
 1 file changed, 891 insertions(+), 54 deletions(-)

diff --git a/drivers/media/i2c/sc450ai.c b/drivers/media/i2c/sc450ai.c
index e5dd37112c5b..b55baa096692 100644
--- a/drivers/media/i2c/sc450ai.c
+++ b/drivers/media/i2c/sc450ai.c
@@ -6,6 +6,7 @@
  *
  * V0.0X01.0X01 first version
  * V0.0X01.0X02 Increase vblank in 2688x1520@30fps linear 4lane configuration
+ * V0.0X01.0X03 Add sc450ai 2lane hdr/linear configuration and 4 lane linear configuration
  */
 
 //#define DEBUG
@@ -26,23 +27,29 @@
 #include <media/v4l2-async.h>
 #include <media/v4l2-ctrls.h>
 #include <media/v4l2-subdev.h>
+#include <media/v4l2-fwnode.h>
+#include <linux/of_graph.h>
 #include <linux/pinctrl/consumer.h>
 #include "../platform/rockchip/isp/rkisp_tb_helper.h"
 #include "cam-tb-setup.h"
 #include "cam-sleep-wakeup.h"
 
-#define DRIVER_VERSION			KERNEL_VERSION(0, 0x01, 0x02)
+#define DRIVER_VERSION			KERNEL_VERSION(0, 0x01, 0x03)
 
 #ifndef V4L2_CID_DIGITAL_GAIN
 #define V4L2_CID_DIGITAL_GAIN		V4L2_CID_GAIN
 #endif
 
-#define SC450AI_LANES			4
+#define SC450AI_LANES_2LANE		2
+#define SC450AI_LANES_4LANE		4
 #define SC450AI_BITS_PER_SAMPLE		10
+#define SC450AI_LINK_FREQ_180		180000000
 #define SC450AI_LINK_FREQ_360		360000000
+#define SC450AI_LINK_FREQ_540		540000000
+#define SC450AI_MAX_LINK_FREQ		SC450AI_LINK_FREQ_540
 
 #define PIXEL_RATE_WITH_360M_10BIT	(SC450AI_LINK_FREQ_360 / SC450AI_BITS_PER_SAMPLE * 2 * \
-					SC450AI_LANES)
+					SC450AI_LANES_2LANE)
 
 #define SC450AI_XVCLK_FREQ		27000000
 
@@ -56,6 +63,9 @@
 #define SC450AI_REG_EXPOSURE_H		0x3e00
 #define SC450AI_REG_EXPOSURE_M		0x3e01
 #define SC450AI_REG_EXPOSURE_L		0x3e02
+#define SC450AI_REG_EXPOSURE_SHORT_H	0x3e22
+#define SC450AI_REG_EXPOSURE_SHORT_M	0x3e04
+#define SC450AI_REG_EXPOSURE_SHORT_L	0x3e05
 #define	SC450AI_EXPOSURE_MIN		1
 #define	SC450AI_EXPOSURE_STEP		1
 #define SC450AI_VTS_MAX			0x7fff
@@ -64,6 +74,10 @@
 #define SC450AI_REG_DIG_FINE_GAIN	0x3e07
 #define SC450AI_REG_ANA_GAIN		0x3e08
 #define SC450AI_REG_ANA_FINE_GAIN	0x3e09
+#define SC450AI_REG_DIG_GAIN_SHORT	0x3e10
+#define SC450AI_REG_DIG_FINE_GAIN_SHORT	0x3e11
+#define SC450AI_REG_ANA_GAIN_SHORT	0x3e12
+#define SC450AI_REG_ANA_FINE_GAIN_SHORT	0x3e13
 #define SC450AI_GAIN_MIN		0x40	//0x0080
 #define SC450AI_GAIN_MAX		61975 //60.523*16*64	(99614)	//48.64*16*128
 #define SC450AI_GAIN_STEP		1
@@ -85,9 +99,6 @@
 #define SC450AI_FETCH_EXP_M(VAL)		(((VAL) >> 4) & 0xFF)
 #define SC450AI_FETCH_EXP_L(VAL)		(((VAL) & 0xF) << 4)
 
-//#define SC450AI_FETCH_AGAIN_H(VAL)	(((VAL) >> 8) & 0x7f)//(((VAL) >> 8) & 0x03)
-//#define SC450AI_FETCH_AGAIN_L(VAL)	((VAL) & 0xFF)
-
 #define SC450AI_FETCH_MIRROR(VAL, ENABLE)	(ENABLE ? VAL | 0x06 : VAL & 0xf9)
 #define SC450AI_FETCH_FLIP(VAL, ENABLE)		(ENABLE ? VAL | 0x60 : VAL & 0x9f)
 
@@ -100,6 +111,7 @@
 
 #define OF_CAMERA_PINCTRL_STATE_DEFAULT	"rockchip,camera_default"
 #define OF_CAMERA_PINCTRL_STATE_SLEEP	"rockchip,camera_sleep"
+#define OF_CAMERA_HDR_MODE		"rockchip,camera-hdr-mode"
 #define SC450AI_NAME			"sc450ai"
 
 static const char * const sc450ai_supply_names[] = {
@@ -128,6 +140,7 @@ struct sc450ai_mode {
 	u32 xvclk_freq;
 	u32 link_freq_idx;
 	u32 vc[PAD_MAX];
+	u32 lanes;
 };
 
 struct sc450ai {
@@ -167,6 +180,9 @@ struct sc450ai {
 	bool			is_first_streamoff;
 	struct preisp_hdrae_exp_s init_hdrae_exp;
 	struct cam_sw_info *cam_sw_inf;
+	struct v4l2_fwnode_endpoint bus_cfg;
+	const struct sc450ai_mode *supported_modes;
+	u32			cfg_num;
 };
 
 #define to_sc450ai(sd) container_of(sd, struct sc450ai, subdev)
@@ -184,7 +200,7 @@ static const struct regval sc450ai_global_regs[] = {
  * mipi_datarate per lane 720Mbps, 2lane
  * binning to 1344x760
  */
-static const struct regval sc450ai_linear_10_1344x760_120fps_regs[] = {
+static const struct regval sc450ai_linear_10_1344x760_120fps_2lane_regs[] = {
 	{0x0103, 0x01},
 	{0x0100, 0x00},
 	{0x36e9, 0x80},
@@ -371,12 +387,414 @@ static const struct regval sc450ai_linear_10_1344x760_120fps_regs[] = {
 	{REG_NULL, 0x00},
 };
 
+
+/*
+ * Xclk 27Mhz
+ * max_framerate 60fps
+ * mipi_datarate per lane 720Mbps, 2lane
+ */
+static const struct regval sc450ai_linear_10_2688x1520_30fps_2lane_regs[] = {
+	{0x0103, 0x01},
+	{0x0100, 0x00},
+	{0x36e9, 0x80},
+	{0x36f9, 0x80},
+	{0x3018, 0x3a},
+	{0x3019, 0x0c},
+	{0x301c, 0x78},
+	{0x301f, 0x3c},
+	{0x302d, 0xa0},
+	{0x302e, 0x00},
+	{0x3208, 0x0a},
+	{0x3209, 0x80},
+	{0x320a, 0x05},
+	{0x320b, 0xf0},
+	{0x320c, 0x02},
+	{0x320d, 0xee},
+	{0x320e, 0x06},
+	{0x320f, 0x18},
+	{0x3214, 0x11},
+	{0x3215, 0x11},
+	{0x3220, 0x00},
+	{0x3223, 0xc0},
+	{0x3253, 0x10},
+	{0x325f, 0x44},
+	{0x3274, 0x09},
+	{0x3280, 0x01},
+	{0x3301, 0x07},
+	{0x3306, 0x20},
+	{0x3308, 0x08},
+	{0x330b, 0x58},
+	{0x330e, 0x18},
+	{0x3315, 0x00},
+	{0x335d, 0x60},
+	{0x3364, 0x56},
+	{0x338f, 0x80},
+	{0x3390, 0x08},
+	{0x3391, 0x18},
+	{0x3392, 0x38},
+	{0x3393, 0x07},
+	{0x3394, 0x10},
+	{0x3395, 0x18},
+	{0x3396, 0x08},
+	{0x3397, 0x18},
+	{0x3398, 0x38},
+	{0x3399, 0x10},
+	{0x339a, 0x13},
+	{0x339b, 0x15},
+	{0x339c, 0x18},
+	{0x33af, 0x18},
+	{0x3400, 0x16},
+	{0x360f, 0x13},
+	{0x3621, 0xec},
+	{0x3622, 0x00},
+	{0x3625, 0x0b},
+	{0x3627, 0x20},
+	{0x3630, 0x90},
+	{0x3633, 0x56},
+	{0x3637, 0x1d},
+	{0x3638, 0x12},
+	{0x363c, 0x0f},
+	{0x363d, 0x0f},
+	{0x363e, 0x08},
+	{0x3670, 0x4a},
+	{0x3671, 0xe0},
+	{0x3672, 0xe0},
+	{0x3673, 0xe0},
+	{0x3674, 0xc0},
+	{0x3675, 0x87},
+	{0x3676, 0x8c},
+	{0x367a, 0x48},
+	{0x367b, 0x58},
+	{0x367c, 0x48},
+	{0x367d, 0x58},
+	{0x3690, 0x22},
+	{0x3691, 0x33},
+	{0x3692, 0x44},
+	{0x3699, 0x03},
+	{0x369a, 0x0f},
+	{0x369b, 0x1f},
+	{0x369c, 0x40},
+	{0x369d, 0x78},
+	{0x36a2, 0x48},
+	{0x36a3, 0x78},
+	{0x36b0, 0x53},
+	{0x36b1, 0x74},
+	{0x36b2, 0x34},
+	{0x36b3, 0x40},
+	{0x36b4, 0x78},
+	{0x36b7, 0xa0},
+	{0x36b8, 0xa0},
+	{0x36b9, 0x20},
+	{0x36bd, 0x40},
+	{0x36be, 0x48},
+	{0x36d0, 0x20},
+	{0x36e0, 0x08},
+	{0x36e1, 0x08},
+	{0x36e2, 0x12},
+	{0x36e3, 0x48},
+	{0x36e4, 0x78},
+	{0x36ec, 0x43},
+	{0x36fc, 0x00},
+	{0x3907, 0x00},
+	{0x3908, 0x41},
+	{0x391e, 0xf1},
+	{0x391f, 0x11},
+	{0x3921, 0x10},
+	{0x3933, 0x82},
+	{0x3934, 0x30},
+	{0x3935, 0x02},
+	{0x3936, 0xc7},
+	{0x3937, 0x76},
+	{0x3938, 0x76},
+	{0x3939, 0x00},
+	{0x393a, 0x28},
+	{0x393b, 0x00},
+	{0x393c, 0x23},
+	{0x3e01, 0xc2},
+	{0x3e02, 0x60},
+	{0x3e03, 0x0b},
+	{0x3e08, 0x03},
+	{0x3e1b, 0x2a},
+	{0x440e, 0x02},
+	{0x4509, 0x20},
+	{0x4837, 0x16},
+	{0x5000, 0x0e},
+	{0x5001, 0x44},
+	{0x5780, 0x76},
+	{0x5784, 0x08},
+	{0x5785, 0x04},
+	{0x5787, 0x0a},
+	{0x5788, 0x0a},
+	{0x5789, 0x0a},
+	{0x578a, 0x0a},
+	{0x578b, 0x0a},
+	{0x578c, 0x0a},
+	{0x578d, 0x40},
+	{0x5790, 0x08},
+	{0x5791, 0x04},
+	{0x5792, 0x04},
+	{0x5793, 0x08},
+	{0x5794, 0x04},
+	{0x5795, 0x04},
+	{0x5799, 0x46},
+	{0x579a, 0x77},
+	{0x57a1, 0x04},
+	{0x57a8, 0xd0},
+	{0x57aa, 0x28},
+	{0x57ab, 0x00},
+	{0x57ac, 0x00},
+	{0x57ad, 0x00},
+	{0x59e0, 0xfe},
+	{0x59e1, 0x40},
+	{0x59e2, 0x3f},
+	{0x59e3, 0x38},
+	{0x59e4, 0x30},
+	{0x59e5, 0x3f},
+	{0x59e6, 0x38},
+	{0x59e7, 0x30},
+	{0x59e8, 0x3f},
+	{0x59e9, 0x3c},
+	{0x59ea, 0x38},
+	{0x59eb, 0x3f},
+	{0x59ec, 0x3c},
+	{0x59ed, 0x38},
+	{0x59ee, 0xfe},
+	{0x59ef, 0x40},
+	{0x59f4, 0x3f},
+	{0x59f5, 0x38},
+	{0x59f6, 0x30},
+	{0x59f7, 0x3f},
+	{0x59f8, 0x38},
+	{0x59f9, 0x30},
+	{0x59fa, 0x3f},
+	{0x59fb, 0x3c},
+	{0x59fc, 0x38},
+	{0x59fd, 0x3f},
+	{0x59fe, 0x3c},
+	{0x59ff, 0x38},
+	{0x36e9, 0x44},
+	{0x36f9, 0x20},
+	{REG_NULL, 0x00},
+};
+
+static const struct regval sc450ai_hdr2_10_2688x1520_25fps_2lane_regs[] = {
+	{0x0103, 0x01},
+	{0x0100, 0x00},
+	{0x36e9, 0x80},
+	{0x36f9, 0x80},
+	{0x3018, 0x3a},
+	{0x3019, 0x0c},
+	{0x301c, 0x78},
+	{0x301f, 0x3d},
+	{0x302d, 0xa0},
+	{0x302e, 0x00},
+	{0x3208, 0x0a},
+	{0x3209, 0x80},
+	{0x320a, 0x05},
+	{0x320b, 0xf0},
+	{0x320c, 0x03},
+	{0x320d, 0x9e},
+	{0x320e, 0x0c},
+	{0x320f, 0x26},
+	{0x3213, 0x14},
+	{0x3214, 0x11},
+	{0x3215, 0x11},
+	{0x3220, 0x00},
+	{0x3223, 0xc0},
+	{0x3250, 0xff},
+	{0x3253, 0x10},
+	{0x325f, 0x44},
+	{0x3274, 0x09},
+	{0x3280, 0x01},
+	{0x3281, 0x01},
+	{0x3301, 0x08},
+	{0x3306, 0x24},
+	{0x3309, 0x60},
+	{0x330b, 0x64},
+	{0x330d, 0x30},
+	{0x3314, 0x94},
+	{0x3315, 0x00},
+	{0x331f, 0x59},
+	{0x335d, 0x60},
+	{0x3364, 0x56},
+	{0x338f, 0x80},
+	{0x3390, 0x08},
+	{0x3391, 0x18},
+	{0x3392, 0x38},
+	{0x3393, 0x0a},
+	{0x3394, 0x10},
+	{0x3395, 0x18},
+	{0x3396, 0x08},
+	{0x3397, 0x18},
+	{0x3398, 0x38},
+	{0x3399, 0x0f},
+	{0x339a, 0x12},
+	{0x339b, 0x14},
+	{0x339c, 0x18},
+	{0x33af, 0x18},
+	{0x3400, 0x16},
+	{0x3410, 0x04},
+	{0x360f, 0x13},
+	{0x3621, 0xec},
+	{0x3627, 0xa0},
+	{0x3630, 0x90},
+	{0x3633, 0x56},
+	{0x3637, 0x1d},
+	{0x3638, 0x0a},
+	{0x363c, 0x0f},
+	{0x363d, 0x0f},
+	{0x363e, 0x08},
+	{0x3670, 0x4a},
+	{0x3671, 0xe0},
+	{0x3672, 0xe0},
+	{0x3673, 0xe0},
+	{0x3674, 0xb0},
+	{0x3675, 0x88},
+	{0x3676, 0x8c},
+	{0x367a, 0x48},
+	{0x367b, 0x58},
+	{0x367c, 0x48},
+	{0x367d, 0x58},
+	{0x3690, 0x34},
+	{0x3691, 0x43},
+	{0x3692, 0x44},
+	{0x3699, 0x03},
+	{0x369a, 0x0f},
+	{0x369b, 0x1f},
+	{0x369c, 0x40},
+	{0x369d, 0x48},
+	{0x36a2, 0x48},
+	{0x36a3, 0x78},
+	{0x36b0, 0x54},
+	{0x36b1, 0x55},
+	{0x36b2, 0x55},
+	{0x36b3, 0x48},
+	{0x36b4, 0x78},
+	{0x36b7, 0xa0},
+	{0x36b8, 0xa0},
+	{0x36b9, 0x20},
+	{0x36bd, 0x40},
+	{0x36be, 0x48},
+	{0x36d0, 0x20},
+	{0x36e0, 0x08},
+	{0x36e1, 0x08},
+	{0x36e2, 0x12},
+	{0x36e3, 0x48},
+	{0x36e4, 0x78},
+	{0x36ea, 0x0c},
+	{0x36eb, 0x05},
+	{0x36ec, 0x43},
+	{0x36ed, 0x24},
+	{0x36fa, 0x0a},
+	{0x36fb, 0xa4},
+	{0x36fc, 0x00},
+	{0x36fd, 0x14},
+	{0x3900, 0x07},
+	{0x3902, 0xf0},
+	{0x3907, 0x00},
+	{0x3908, 0x41},
+	{0x391e, 0x01},
+	{0x391f, 0x11},
+	{0x3921, 0x10},
+	{0x3933, 0x82},
+	{0x3934, 0x0b},
+	{0x3935, 0x02},
+	{0x3936, 0x5e},
+	{0x3937, 0x76},
+	{0x3938, 0x78},
+	{0x3939, 0x00},
+	{0x393a, 0x28},
+	{0x393b, 0x00},
+	{0x393c, 0x1d},
+	{0x3e00, 0x01},
+	{0x3e01, 0x67},
+	{0x3e02, 0x00},
+	{0x3e03, 0x0b},
+	{0x3e04, 0x16},
+	{0x3e05, 0x70},
+	{0x3e06, 0x00},
+	{0x3e07, 0x80},
+	{0x3e08, 0x03},
+	{0x3e09, 0x40},
+	{0x3e10, 0x00},
+	{0x3e11, 0x80},
+	{0x3e12, 0x03},
+	{0x3e13, 0x40},
+	{0x3e1b, 0x2a},
+	{0x3e22, 0x00},
+	{0x3e23, 0x00},
+	{0x3e24, 0xba},
+	{0x440e, 0x02},
+	{0x4503, 0x60},
+	{0x4509, 0x20},
+	{0x4837, 0x16},
+	{0x4853, 0xf8},
+	{0x5000, 0x0e},
+	{0x5001, 0x44},
+	{0x5011, 0x80},
+	{0x5780, 0x76},
+	{0x5784, 0x08},
+	{0x5785, 0x04},
+	{0x5787, 0x0a},
+	{0x5788, 0x0a},
+	{0x5789, 0x0a},
+	{0x578a, 0x0a},
+	{0x578b, 0x0a},
+	{0x578c, 0x0a},
+	{0x578d, 0x40},
+	{0x5790, 0x08},
+	{0x5791, 0x04},
+	{0x5792, 0x04},
+	{0x5793, 0x08},
+	{0x5794, 0x04},
+	{0x5795, 0x04},
+	{0x5799, 0x46},
+	{0x579a, 0x77},
+	{0x57a1, 0x04},
+	{0x57a8, 0xd0},
+	{0x57aa, 0x2a},
+	{0x57ab, 0x7f},
+	{0x57ac, 0x00},
+	{0x57ad, 0x00},
+	{0x59e0, 0xfe},
+	{0x59e1, 0x40},
+	{0x59e2, 0x3f},
+	{0x59e3, 0x38},
+	{0x59e4, 0x30},
+	{0x59e5, 0x3f},
+	{0x59e6, 0x38},
+	{0x59e7, 0x30},
+	{0x59e8, 0x3f},
+	{0x59e9, 0x3c},
+	{0x59ea, 0x38},
+	{0x59eb, 0x3f},
+	{0x59ec, 0x3c},
+	{0x59ed, 0x38},
+	{0x59ee, 0xfe},
+	{0x59ef, 0x40},
+	{0x59f4, 0x3f},
+	{0x59f5, 0x38},
+	{0x59f6, 0x30},
+	{0x59f7, 0x3f},
+	{0x59f8, 0x38},
+	{0x59f9, 0x30},
+	{0x59fa, 0x3f},
+	{0x59fb, 0x3c},
+	{0x59fc, 0x38},
+	{0x59fd, 0x3f},
+	{0x59fe, 0x3c},
+	{0x59ff, 0x38},
+	{0x36e9, 0x44},
+	{0x36f9, 0x44},
+	{REG_NULL, 0x00},
+};
+
 /*
  * Xclk 27Mhz
  * max_framerate 30fps
  * mipi_datarate per lane 720Mbps, 4lane
  */
-static const struct regval sc450ai_linear_10_2688x1520_30fps_regs[] = {
+static const struct regval sc450ai_linear_10_2688x1520_30fps_4lane_regs[] = {
 	{0x0103, 0x01},
 	{0x0100, 0x00},
 	{0x36e9, 0x80},
@@ -389,8 +807,10 @@ static const struct regval sc450ai_linear_10_2688x1520_30fps_regs[] = {
 	{0x3209, 0x80},
 	{0x320a, 0x05},
 	{0x320b, 0xf0},
-	{0x320c, 0x03},
-	{0x320d, 0xa8},
+	{0x320c, 0x04},
+	{0x320d, 0x60},
+	//{0x320c, 0x07},
+	//{0x320d, 0x50},
 	{0x320e, 0x0c},
 	{0x320f, 0x30},
 	{0x3214, 0x11},
@@ -559,7 +979,215 @@ static const struct regval sc450ai_linear_10_2688x1520_30fps_regs[] = {
 	{REG_NULL, 0x00},
 };
 
-static const struct sc450ai_mode supported_modes[] = {
+static const struct regval sc450ai_hdr2_10_2688x1520_30fps_4lane_regs[] = {
+	{0x0103, 0x01},
+	{0x0100, 0x00},
+	{0x36e9, 0x80},
+	{0x36f9, 0x80},
+	{0x301c, 0x78},
+	{0x301f, 0x03},
+	{0x302d, 0xa0},
+	{0x302e, 0x00},
+	{0x3208, 0x0a},
+	{0x3209, 0x80},
+	{0x320a, 0x05},
+	{0x320b, 0xf0},
+	{0x320c, 0x03},
+	{0x320d, 0xa8},
+	//{0x320c, 0x07},
+	//{0x320d, 0x50},
+	{0x320e, 0x0c},
+	{0x320f, 0x30},
+	{0x3213, 0x14},
+	{0x3214, 0x11},
+	{0x3215, 0x11},
+	{0x3220, 0x00},
+	{0x3223, 0xc0},
+	{0x3250, 0xff},
+	{0x3253, 0x10},
+	{0x325f, 0x44},
+	{0x3274, 0x09},
+	{0x3280, 0x01},
+	{0x3281, 0x01},
+	{0x3301, 0x08},
+	{0x3306, 0x24},
+	{0x3309, 0x60},
+	{0x330b, 0x64},
+	{0x330d, 0x30},
+	{0x3314, 0x94},
+	{0x3315, 0x00},
+	{0x331f, 0x59},
+	{0x335d, 0x60},
+	{0x3364, 0x56},
+	{0x338f, 0x80},
+	{0x3390, 0x08},
+	{0x3391, 0x18},
+	{0x3392, 0x38},
+	{0x3393, 0x0a},
+	{0x3394, 0x10},
+	{0x3395, 0x18},
+	{0x3396, 0x08},
+	{0x3397, 0x18},
+	{0x3398, 0x38},
+	{0x3399, 0x0f},
+	{0x339a, 0x12},
+	{0x339b, 0x14},
+	{0x339c, 0x18},
+	{0x33af, 0x18},
+	{0x3400, 0x16},
+	{0x3410, 0x04},
+	{0x360f, 0x13},
+	{0x3621, 0xec},
+	{0x3627, 0xa0},
+	{0x3630, 0x90},
+	{0x3633, 0x56},
+	{0x3637, 0x1d},
+	{0x3638, 0x0a},
+	{0x363c, 0x0f},
+	{0x363d, 0x0f},
+	{0x363e, 0x08},
+	{0x3670, 0x4a},
+	{0x3671, 0xe0},
+	{0x3672, 0xe0},
+	{0x3673, 0xe0},
+	{0x3674, 0xb0},
+	{0x3675, 0x88},
+	{0x3676, 0x8c},
+	{0x367a, 0x48},
+	{0x367b, 0x58},
+	{0x367c, 0x48},
+	{0x367d, 0x58},
+	{0x3690, 0x34},
+	{0x3691, 0x43},
+	{0x3692, 0x44},
+	{0x3699, 0x03},
+	{0x369a, 0x0f},
+	{0x369b, 0x1f},
+	{0x369c, 0x40},
+	{0x369d, 0x48},
+	{0x36a2, 0x48},
+	{0x36a3, 0x78},
+	{0x36b0, 0x54},
+	{0x36b1, 0x55},
+	{0x36b2, 0x55},
+	{0x36b3, 0x48},
+	{0x36b4, 0x78},
+	{0x36b7, 0xa0},
+	{0x36b8, 0xa0},
+	{0x36b9, 0x20},
+	{0x36bd, 0x40},
+	{0x36be, 0x48},
+	{0x36d0, 0x20},
+	{0x36e0, 0x08},
+	{0x36e1, 0x08},
+	{0x36e2, 0x12},
+	{0x36e3, 0x48},
+	{0x36e4, 0x78},
+	{0x36fa, 0x0d},
+	{0x36fb, 0xa4},
+	{0x36fc, 0x00},
+	{0x36fd, 0x24},
+	{0x3900, 0x07},
+	{0x3902, 0xf0},
+	{0x3907, 0x00},
+	{0x3908, 0x41},
+	{0x391e, 0x01},
+	{0x391f, 0x11},
+	{0x3921, 0x10},
+	{0x3933, 0x82},
+	{0x3934, 0x0b},
+	{0x3935, 0x02},
+	{0x3936, 0x5e},
+	{0x3937, 0x76},
+	{0x3938, 0x78},
+	{0x3939, 0x00},
+	{0x393a, 0x28},
+	{0x393b, 0x00},
+	{0x393c, 0x1d},
+	{0x3e00, 0x01},
+	{0x3e01, 0x6b},
+	{0x3e02, 0x00},
+	{0x3e03, 0x0b},
+	{0x3e04, 0x16},
+	{0x3e05, 0xb0},
+	{0x3e06, 0x00},
+	{0x3e07, 0x80},
+	{0x3e08, 0x03},
+	{0x3e09, 0x40},
+	{0x3e10, 0x00},
+	{0x3e11, 0x80},
+	{0x3e12, 0x03},
+	{0x3e13, 0x40},
+	{0x3e1b, 0x2a},
+	{0x3e22, 0x00},
+	{0x3e23, 0x00},
+	{0x3e24, 0xba},
+	{0x440e, 0x02},
+	{0x4503, 0x60},
+	{0x4509, 0x20},
+	{0x4837, 0x16},
+	{0x4853, 0xf8},
+	{0x5000, 0x0e},
+	{0x5001, 0x44},
+	{0x5011, 0x80},
+	{0x5780, 0x76},
+	{0x5784, 0x08},
+	{0x5785, 0x04},
+	{0x5787, 0x0a},
+	{0x5788, 0x0a},
+	{0x5789, 0x0a},
+	{0x578a, 0x0a},
+	{0x578b, 0x0a},
+	{0x578c, 0x0a},
+	{0x578d, 0x40},
+	{0x5790, 0x08},
+	{0x5791, 0x04},
+	{0x5792, 0x04},
+	{0x5793, 0x08},
+	{0x5794, 0x04},
+	{0x5795, 0x04},
+	{0x5799, 0x46},
+	{0x579a, 0x77},
+	{0x57a1, 0x04},
+	{0x57a8, 0xd0},
+	{0x57aa, 0x2a},
+	{0x57ab, 0x7f},
+	{0x57ac, 0x00},
+	{0x57ad, 0x00},
+	{0x59e0, 0xfe},
+	{0x59e1, 0x40},
+	{0x59e2, 0x3f},
+	{0x59e3, 0x38},
+	{0x59e4, 0x30},
+	{0x59e5, 0x3f},
+	{0x59e6, 0x38},
+	{0x59e7, 0x30},
+	{0x59e8, 0x3f},
+	{0x59e9, 0x3c},
+	{0x59ea, 0x38},
+	{0x59eb, 0x3f},
+	{0x59ec, 0x3c},
+	{0x59ed, 0x38},
+	{0x59ee, 0xfe},
+	{0x59ef, 0x40},
+	{0x59f4, 0x3f},
+	{0x59f5, 0x38},
+	{0x59f6, 0x30},
+	{0x59f7, 0x3f},
+	{0x59f8, 0x38},
+	{0x59f9, 0x30},
+	{0x59fa, 0x3f},
+	{0x59fb, 0x3c},
+	{0x59fc, 0x38},
+	{0x59fd, 0x3f},
+	{0x59fe, 0x3c},
+	{0x59ff, 0x38},
+	{0x36e9, 0x44},
+	{0x36f9, 0x20},
+	{REG_NULL, 0x00},
+};
+
+static const struct sc450ai_mode supported_modes_2lane[] = {
 	{
 		.width = 2688,
 		.height = 1520,
@@ -569,13 +1197,35 @@ static const struct sc450ai_mode supported_modes[] = {
 		},
 		.exp_def = 0x0080,//mark
 		.hts_def = 0x2ee * 4,
-		.vts_def = 0x0c30,
+		.vts_def = 0x0618,
 		.bus_fmt = MEDIA_BUS_FMT_SBGGR10_1X10,
-		.reg_list = sc450ai_linear_10_2688x1520_30fps_regs,
+		.reg_list = sc450ai_linear_10_2688x1520_30fps_2lane_regs,
 		.hdr_mode = NO_HDR,
 		.xvclk_freq = 27000000,
-		.link_freq_idx = 0,
+		.link_freq_idx = 1,
 		.vc[PAD0] = 0,
+		.lanes = 2,
+	},
+	{
+		.width = 2688,
+		.height = 1520,
+		.max_fps = {
+			.numerator = 10000,
+			.denominator = 250000,
+		},
+		.exp_def = 0x0080,//mark
+		.hts_def = 0x39e * 4,
+		.vts_def = 0x0c26,
+		.bus_fmt = MEDIA_BUS_FMT_SBGGR10_1X10,
+		.reg_list = sc450ai_hdr2_10_2688x1520_25fps_2lane_regs,
+		.hdr_mode = HDR_X2,
+		.xvclk_freq = 27000000,
+		.link_freq_idx = 2,
+		.vc[PAD0] = 1,
+		.vc[PAD1] = 0,//L->CSI_WR0
+		.vc[PAD2] = 1,
+		.vc[PAD3] = 1,//M->CSI_WR2
+		.lanes = 2,
 	},
 	{
 		.width = 1344,
@@ -588,16 +1238,61 @@ static const struct sc450ai_mode supported_modes[] = {
 		.hts_def = 0x03a8,
 		.vts_def = 0x030c,
 		.bus_fmt = MEDIA_BUS_FMT_SBGGR10_1X10,
-		.reg_list = sc450ai_linear_10_1344x760_120fps_regs,
+		.reg_list = sc450ai_linear_10_1344x760_120fps_2lane_regs,
+		.hdr_mode = NO_HDR,
+		.xvclk_freq = 27000000,
+		.link_freq_idx = 1,
+		.vc[PAD0] = 0,
+		.lanes = 2,
+	},
+};
+
+static const struct sc450ai_mode supported_modes_4lane[] = {
+	{
+		.width = 2688,
+		.height = 1520,
+		.max_fps = {
+			.numerator = 10000,
+			.denominator = 300000,
+		},
+		.exp_def = 0x0080,//mark
+		.hts_def = 0x2ee * 4,
+		.vts_def = 0x0c30,
+		.bus_fmt = MEDIA_BUS_FMT_SBGGR10_1X10,
+		.reg_list = sc450ai_linear_10_2688x1520_30fps_4lane_regs,
 		.hdr_mode = NO_HDR,
 		.xvclk_freq = 27000000,
 		.link_freq_idx = 0,
 		.vc[PAD0] = 0,
+		.lanes = 4,
+	},
+	{
+		.width = 2688,
+		.height = 1520,
+		.max_fps = {
+			.numerator = 10000,
+			.denominator = 300000,
+		},
+		.exp_def = 0x0080,//mark
+		.hts_def = 0x3a8 * 4,
+		.vts_def = 0x0c30,
+		.bus_fmt = MEDIA_BUS_FMT_SBGGR10_1X10,
+		.reg_list = sc450ai_hdr2_10_2688x1520_30fps_4lane_regs,
+		.hdr_mode = HDR_X2,
+		.xvclk_freq = 27000000,
+		.link_freq_idx = 1,
+		.vc[PAD0] = 1,
+		.vc[PAD1] = 0,//L->CSI_WR0
+		.vc[PAD2] = 1,
+		.vc[PAD3] = 1,//M->CSI_WR2
+		.lanes = 4,
 	},
 };
 
 static const s64 link_freq_menu_items[] = {
+	SC450AI_LINK_FREQ_180,
 	SC450AI_LINK_FREQ_360,
+	SC450AI_LINK_FREQ_540,
 };
 
 static const char * const sc450ai_test_pattern_menu[] = {
@@ -767,6 +1462,26 @@ static int sc450ai_set_gain_reg(struct sc450ai *sc450ai, u32 gain)
 				 SC450AI_REG_ANA_FINE_GAIN,
 				 SC450AI_REG_VALUE_08BIT,
 				 fine_again);
+
+	if (sc450ai->cur_mode->hdr_mode == HDR_X2) {
+		ret |= sc450ai_write_reg(sc450ai->client,
+					SC450AI_REG_DIG_GAIN_SHORT,
+					SC450AI_REG_VALUE_08BIT,
+					coarse_dgain);
+		ret |= sc450ai_write_reg(sc450ai->client,
+					 SC450AI_REG_DIG_FINE_GAIN_SHORT,
+					 SC450AI_REG_VALUE_08BIT,
+					 fine_dgain);
+		ret |= sc450ai_write_reg(sc450ai->client,
+					 SC450AI_REG_ANA_GAIN_SHORT,
+					 SC450AI_REG_VALUE_08BIT,
+					 coarse_again);
+		ret |= sc450ai_write_reg(sc450ai->client,
+					 SC450AI_REG_ANA_FINE_GAIN_SHORT,
+					 SC450AI_REG_VALUE_08BIT,
+					 fine_again);
+	}
+
 	return ret;
 }
 
@@ -778,7 +1493,7 @@ static int sc450ai_get_reso_dist(const struct sc450ai_mode *mode,
 }
 
 static const struct sc450ai_mode *
-sc450ai_find_best_fit(struct v4l2_subdev_format *fmt)
+sc450ai_find_best_fit(struct sc450ai *sc450ai, struct v4l2_subdev_format *fmt)
 {
 	struct v4l2_mbus_framefmt *framefmt = &fmt->format;
 	int dist;
@@ -786,15 +1501,15 @@ sc450ai_find_best_fit(struct v4l2_subdev_format *fmt)
 	int cur_best_fit_dist = -1;
 	unsigned int i;
 
-	for (i = 0; i < ARRAY_SIZE(supported_modes); i++) {
-		dist = sc450ai_get_reso_dist(&supported_modes[i], framefmt);
+	for (i = 0; i < sc450ai->cfg_num; i++) {
+		dist = sc450ai_get_reso_dist(&sc450ai->supported_modes[i], framefmt);
 		if (cur_best_fit_dist == -1 || dist < cur_best_fit_dist) {
 			cur_best_fit_dist = dist;
 			cur_best_fit = i;
 		}
 	}
 
-	return &supported_modes[cur_best_fit];
+	return &sc450ai->supported_modes[cur_best_fit];
 }
 
 static int sc450ai_set_fmt(struct v4l2_subdev *sd,
@@ -809,7 +1524,7 @@ static int sc450ai_set_fmt(struct v4l2_subdev *sd,
 
 	mutex_lock(&sc450ai->mutex);
 
-	mode = sc450ai_find_best_fit(fmt);
+	mode = sc450ai_find_best_fit(sc450ai, fmt);
 	fmt->format.code = mode->bus_fmt;
 	fmt->format.width = mode->width;
 	fmt->format.height = mode->height;
@@ -832,7 +1547,7 @@ static int sc450ai_set_fmt(struct v4l2_subdev *sd,
 					 1, vblank_def);
 		dst_link_freq = mode->link_freq_idx;
 		dst_pixel_rate = (u32)link_freq_menu_items[mode->link_freq_idx] /
-						 SC450AI_BITS_PER_SAMPLE * 2 * SC450AI_LANES;
+						 SC450AI_BITS_PER_SAMPLE * 2 * mode->lanes;
 		__v4l2_ctrl_s_ctrl_int64(sc450ai->pixel_rate,
 					 dst_pixel_rate);
 		__v4l2_ctrl_s_ctrl(sc450ai->link_freq,
@@ -893,16 +1608,18 @@ static int sc450ai_enum_frame_sizes(struct v4l2_subdev *sd,
 				    struct v4l2_subdev_state *sd_state,
 				    struct v4l2_subdev_frame_size_enum *fse)
 {
-	if (fse->index >= ARRAY_SIZE(supported_modes))
+	struct sc450ai *sc450ai = to_sc450ai(sd);
+
+	if (fse->index >= sc450ai->cfg_num)
 		return -EINVAL;
 
-	if (fse->code != supported_modes[0].bus_fmt)
+	if (fse->code != sc450ai->supported_modes[0].bus_fmt)
 		return -EINVAL;
 
-	fse->min_width  = supported_modes[fse->index].width;
-	fse->max_width  = supported_modes[fse->index].width;
-	fse->max_height = supported_modes[fse->index].height;
-	fse->min_height = supported_modes[fse->index].height;
+	fse->min_width  = sc450ai->supported_modes[fse->index].width;
+	fse->max_width  = sc450ai->supported_modes[fse->index].width;
+	fse->max_height = sc450ai->supported_modes[fse->index].height;
+	fse->min_height = sc450ai->supported_modes[fse->index].height;
 
 	return 0;
 }
@@ -941,8 +1658,10 @@ static int sc450ai_g_mbus_config(struct v4l2_subdev *sd,
 				unsigned int pad_id,
 				struct v4l2_mbus_config *config)
 {
+	struct sc450ai *sc450ai = to_sc450ai(sd);
+
 	config->type = V4L2_MBUS_CSI2_DPHY;
-	config->bus.mipi_csi2.num_data_lanes = SC450AI_LANES;
+	config->bus.mipi_csi2.num_data_lanes = sc450ai->cur_mode->lanes;
 
 	return 0;
 }
@@ -957,6 +1676,71 @@ static void sc450ai_get_module_inf(struct sc450ai *sc450ai,
 	strscpy(inf->base.lens, sc450ai->len_name, sizeof(inf->base.lens));
 }
 
+static int sc450ai_set_hdrae(struct sc450ai *sc450ai,
+			    struct preisp_hdrae_exp_s *ae)
+{
+	int ret = 0;
+	u32 l_exp_time, m_exp_time, s_exp_time;
+	u32 l_a_gain, m_a_gain, s_a_gain;
+
+	if (!sc450ai->has_init_exp && !sc450ai->streaming) {
+		sc450ai->init_hdrae_exp = *ae;
+		sc450ai->has_init_exp = true;
+		dev_dbg(&sc450ai->client->dev, "sc450ai don't stream, record exp for hdr!\n");
+		return ret;
+	}
+	l_exp_time = ae->long_exp_reg;
+	m_exp_time = ae->middle_exp_reg;
+	s_exp_time = ae->short_exp_reg;
+	l_a_gain = ae->long_gain_reg;
+	m_a_gain = ae->middle_gain_reg;
+	s_a_gain = ae->short_gain_reg;
+
+	dev_dbg(&sc450ai->client->dev,
+		"rev exp req: L_exp: 0x%x, 0x%x, M_exp: 0x%x, 0x%x S_exp: 0x%x, 0x%x\n",
+		l_exp_time, m_exp_time, s_exp_time,
+		l_a_gain, m_a_gain, s_a_gain);
+
+	if (sc450ai->cur_mode->hdr_mode == HDR_X2) {
+		//2 stagger
+		l_a_gain = m_a_gain;
+		l_exp_time = m_exp_time;
+	}
+
+	//set exposure
+	l_exp_time = l_exp_time * 2;
+	s_exp_time = s_exp_time * 2;
+	if (l_exp_time > 2 * (sc450ai->cur_vts - 0xba) - 13)
+		l_exp_time = 2 * (sc450ai->cur_vts - 0xba) - 13;
+	if (s_exp_time > 2 * 0xba - 11)
+		s_exp_time = 2 * 0xba - 11;
+
+	ret = sc450ai_write_reg(sc450ai->client,
+				SC450AI_REG_EXPOSURE_H,
+				SC450AI_REG_VALUE_08BIT,
+				SC450AI_FETCH_EXP_H(l_exp_time));
+	ret |= sc450ai_write_reg(sc450ai->client,
+				 SC450AI_REG_EXPOSURE_M,
+				 SC450AI_REG_VALUE_08BIT,
+				 SC450AI_FETCH_EXP_M(l_exp_time));
+	ret |= sc450ai_write_reg(sc450ai->client,
+				 SC450AI_REG_EXPOSURE_L,
+				 SC450AI_REG_VALUE_08BIT,
+				 SC450AI_FETCH_EXP_L(l_exp_time));
+
+	ret |= sc450ai_write_reg(sc450ai->client,
+				 SC450AI_REG_EXPOSURE_SHORT_M,
+				 SC450AI_REG_VALUE_08BIT,
+				 SC450AI_FETCH_EXP_M(s_exp_time));
+	ret |= sc450ai_write_reg(sc450ai->client,
+				 SC450AI_REG_EXPOSURE_SHORT_L,
+				 SC450AI_REG_VALUE_08BIT,
+				 SC450AI_FETCH_EXP_L(s_exp_time));
+
+	ret |= sc450ai_set_gain_reg(sc450ai, l_a_gain);
+	return ret;
+}
+
 static long sc450ai_ioctl(struct v4l2_subdev *sd, unsigned int cmd, void *arg)
 {
 	struct sc450ai *sc450ai = to_sc450ai(sd);
@@ -964,6 +1748,10 @@ static long sc450ai_ioctl(struct v4l2_subdev *sd, unsigned int cmd, void *arg)
 	u32 i, h, w;
 	long ret = 0;
 	u32 stream = 0;
+	const struct sc450ai_mode *mode;
+	u64 dst_link_freq = 0;
+	u64 dst_pixel_rate = 0;
+
 
 	switch (cmd) {
 	case RKMODULE_GET_MODULE_INFO:
@@ -978,29 +1766,38 @@ static long sc450ai_ioctl(struct v4l2_subdev *sd, unsigned int cmd, void *arg)
 		hdr = (struct rkmodule_hdr_cfg *)arg;
 		w = sc450ai->cur_mode->width;
 		h = sc450ai->cur_mode->height;
-		for (i = 0; i < ARRAY_SIZE(supported_modes); i++) {
-			if (w == supported_modes[i].width &&
-			    h == supported_modes[i].height &&
-			    supported_modes[i].hdr_mode == hdr->hdr_mode) {
-				sc450ai->cur_mode = &supported_modes[i];
+		for (i = 0; i < sc450ai->cfg_num; i++) {
+			if (w == sc450ai->supported_modes[i].width &&
+			    h == sc450ai->supported_modes[i].height &&
+			    sc450ai->supported_modes[i].hdr_mode == hdr->hdr_mode) {
+				sc450ai->cur_mode = &sc450ai->supported_modes[i];
 				break;
 			}
 		}
-		if (i == ARRAY_SIZE(supported_modes)) {
+		if (i == sc450ai->cfg_num) {
 			dev_err(&sc450ai->client->dev,
 				"not find hdr mode:%d %dx%d config\n",
 				hdr->hdr_mode, w, h);
 			ret = -EINVAL;
 		} else {
-			w = sc450ai->cur_mode->hts_def - sc450ai->cur_mode->width;
-			h = sc450ai->cur_mode->vts_def - sc450ai->cur_mode->height;
+			mode = sc450ai->cur_mode;
+			w = mode->hts_def - mode->width;
+			h = mode->vts_def - mode->height;
 			__v4l2_ctrl_modify_range(sc450ai->hblank, w, w, 1, w);
 			__v4l2_ctrl_modify_range(sc450ai->vblank, h,
-						 SC450AI_VTS_MAX - sc450ai->cur_mode->height, 1, h);
-			sc450ai->cur_fps = sc450ai->cur_mode->max_fps;
+						 SC450AI_VTS_MAX - mode->height, 1, h);
+			dst_link_freq = mode->link_freq_idx;
+			dst_pixel_rate = (u32)link_freq_menu_items[mode->link_freq_idx] /
+					 SC450AI_BITS_PER_SAMPLE * 2 * mode->lanes;
+			__v4l2_ctrl_s_ctrl_int64(sc450ai->pixel_rate,
+						 dst_pixel_rate);
+			__v4l2_ctrl_s_ctrl(sc450ai->link_freq,
+					   dst_link_freq);
+			sc450ai->cur_fps = mode->max_fps;
 		}
 		break;
 	case PREISP_CMD_SET_HDRAE_EXP:
+		ret = sc450ai_set_hdrae(sc450ai, arg);
 		break;
 	case RKMODULE_SET_QUICK_STREAM:
 
@@ -1340,6 +2137,7 @@ static int __maybe_unused sc450ai_resume(struct device *dev)
 			return ret;
 		}
 	}
+
 	return 0;
 }
 
@@ -1387,7 +2185,7 @@ static int sc450ai_open(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh)
 	struct sc450ai *sc450ai = to_sc450ai(sd);
 	struct v4l2_mbus_framefmt *try_fmt =
 				v4l2_subdev_get_try_format(sd, fh->state, 0);
-	const struct sc450ai_mode *def_mode = &supported_modes[0];
+	const struct sc450ai_mode *def_mode = &sc450ai->supported_modes[0];
 
 	mutex_lock(&sc450ai->mutex);
 	/* Initialize try_fmt */
@@ -1407,14 +2205,17 @@ static int sc450ai_enum_frame_interval(struct v4l2_subdev *sd,
 				       struct v4l2_subdev_state *sd_state,
 				       struct v4l2_subdev_frame_interval_enum *fie)
 {
-	if (fie->index >= ARRAY_SIZE(supported_modes))
+	struct sc450ai *sc450ai = to_sc450ai(sd);
+
+	if (fie->index >= sc450ai->cfg_num)
 		return -EINVAL;
 
-	fie->code = supported_modes[fie->index].bus_fmt;
-	fie->width = supported_modes[fie->index].width;
-	fie->height = supported_modes[fie->index].height;
-	fie->interval = supported_modes[fie->index].max_fps;
-	fie->reserved[0] = supported_modes[fie->index].hdr_mode;
+	fie->code = sc450ai->supported_modes[fie->index].bus_fmt;
+	fie->width = sc450ai->supported_modes[fie->index].width;
+	fie->height = sc450ai->supported_modes[fie->index].height;
+	fie->interval = sc450ai->supported_modes[fie->index].max_fps;
+	fie->reserved[0] = sc450ai->supported_modes[fie->index].hdr_mode;
+
 	return 0;
 }
 
@@ -1571,7 +2372,7 @@ static int sc450ai_initialize_controls(struct sc450ai *sc450ai)
 	u32 h_blank;
 	int ret;
 	u64 dst_link_freq = 0;
-	u64 dst_pixel_rate = 0;
+	u64 dst_pixel_rate = 0, max_dst_pixel_rate = 0;
 
 	handler = &sc450ai->ctrl_handler;
 	mode = sc450ai->cur_mode;
@@ -1587,13 +2388,15 @@ static int sc450ai_initialize_controls(struct sc450ai *sc450ai)
 		sc450ai->link_freq->flags |= V4L2_CTRL_FLAG_READ_ONLY;
 
 	dst_link_freq = mode->link_freq_idx;
+	max_dst_pixel_rate = SC450AI_MAX_LINK_FREQ / SC450AI_BITS_PER_SAMPLE * 2 * SC450AI_LANES_4LANE;
 	dst_pixel_rate = (u32)link_freq_menu_items[mode->link_freq_idx] /
-					 SC450AI_BITS_PER_SAMPLE * 2 * SC450AI_LANES;
+					 SC450AI_BITS_PER_SAMPLE * 2 * mode->lanes;
 	sc450ai->pixel_rate = v4l2_ctrl_new_std(handler, NULL, V4L2_CID_PIXEL_RATE,
-			  0, PIXEL_RATE_WITH_360M_10BIT, 1, dst_pixel_rate);
+			  0, max_dst_pixel_rate, 1, dst_pixel_rate);
 
 	__v4l2_ctrl_s_ctrl(sc450ai->link_freq, dst_link_freq);
 
+
 	h_blank = mode->hts_def - mode->width;
 	sc450ai->hblank = v4l2_ctrl_new_std(handler, NULL, V4L2_CID_HBLANK,
 					    h_blank, h_blank, 1, h_blank);
@@ -1660,7 +2463,7 @@ static int sc450ai_check_sensor_id(struct sc450ai *sc450ai,
 		return -ENODEV;
 	}
 
-	dev_info(dev, "Detected OV%06x sensor\n", CHIP_ID);
+	dev_info(dev, "Detected %s sensor chip_id %x\n", SC450AI_NAME, CHIP_ID);
 
 	return 0;
 }
@@ -1687,6 +2490,7 @@ static int sc450ai_probe(struct i2c_client *client,
 	char facing[2];
 	int ret;
 	int i, hdr_mode = 0;
+	struct device_node *endpoint;
 
 	dev_info(dev, "driver version: %02x.%02x.%02x",
 		 DRIVER_VERSION >> 16,
@@ -1712,16 +2516,49 @@ static int sc450ai_probe(struct i2c_client *client,
 
 	sc450ai->is_thunderboot = IS_ENABLED(CONFIG_VIDEO_ROCKCHIP_THUNDER_BOOT_ISP);
 
+	ret = of_property_read_u32(node, OF_CAMERA_HDR_MODE,
+		&hdr_mode);
+	if (ret) {
+		hdr_mode = NO_HDR;
+		dev_warn(dev, " Get hdr mode failed! no hdr default\n");
+	}
+
+	endpoint = of_graph_get_next_endpoint(dev->of_node, NULL);
+	if (!endpoint) {
+		dev_err(dev, "Failed to get endpoint\n");
+		return -EINVAL;
+	}
+
+	ret = v4l2_fwnode_endpoint_parse(of_fwnode_handle(endpoint),
+		&sc450ai->bus_cfg);
+	of_node_put(endpoint);
+	if (ret) {
+		dev_err(dev, "Failed to get bus config\n");
+		return -EINVAL;
+	}
+
+	if (sc450ai->bus_cfg.bus.mipi_csi2.num_data_lanes == SC450AI_LANES_4LANE) {
+		sc450ai->supported_modes = supported_modes_4lane;
+		sc450ai->cfg_num = ARRAY_SIZE(supported_modes_4lane);
+	} else {
+		sc450ai->supported_modes = supported_modes_2lane;
+		sc450ai->cfg_num = ARRAY_SIZE(supported_modes_2lane);
+	}
+
 	sc450ai->client = client;
-	for (i = 0; i < ARRAY_SIZE(supported_modes); i++) {
-		if (hdr_mode == supported_modes[i].hdr_mode) {
-			sc450ai->cur_mode = &supported_modes[i];
+	for (i = 0; i < sc450ai->cfg_num; i++) {
+		if (hdr_mode == sc450ai->supported_modes[i].hdr_mode) {
+			sc450ai->cur_mode = &sc450ai->supported_modes[i];
 			break;
 		}
 	}
 
-	if (i == ARRAY_SIZE(supported_modes))
-		sc450ai->cur_mode = &supported_modes[0];
+	if (i == sc450ai->cfg_num)
+		sc450ai->cur_mode = &sc450ai->supported_modes[0];
+
+	dev_dbg(dev, "SC450AI Info hdr_mode %d lanes %d vts 0x%04x fps %d\n",
+		sc450ai->cur_mode->hdr_mode, sc450ai->cur_mode->lanes, sc450ai->cur_mode->vts_def,
+		sc450ai->cur_mode->max_fps.denominator / sc450ai->cur_mode->max_fps.numerator);
 
 	sc450ai->xvclk = devm_clk_get(dev, "xvclk");
 	if (IS_ERR(sc450ai->xvclk)) {

From 604d7e490423b911eb6ae7a3d41ce5488932d747 Mon Sep 17 00:00:00 2001
From: LongChang Ma <chad.ma@rock-chips.com>
Date: Thu, 20 Mar 2025 19:09:40 +0800
Subject: [PATCH 21/24] media: i2c: add sc635hai sensor driver for kernel 6.1

Signed-off-by: LongChang Ma <chad.ma@rock-chips.com>
Change-Id: I985635745dad3cc55edd77054f0cdc63394d5fba
---
 drivers/media/i2c/Kconfig    |   10 +
 drivers/media/i2c/Makefile   |    1 +
 drivers/media/i2c/sc635hai.c | 2975 ++++++++++++++++++++++++++++++++++
 3 files changed, 2986 insertions(+)
 create mode 100644 drivers/media/i2c/sc635hai.c

diff --git a/drivers/media/i2c/Kconfig b/drivers/media/i2c/Kconfig
index a42301db7fca..4c811be0c29c 100644
--- a/drivers/media/i2c/Kconfig
+++ b/drivers/media/i2c/Kconfig
@@ -2078,6 +2078,16 @@ config VIDEO_SC5336
 	  This is a Video4Linux2 sensor driver for the SmartSens
 	  SC5336 camera.
 
+config VIDEO_SC635HAI
+	tristate "SmartSens SC635HAI sensor support"
+	depends on I2C && VIDEO_DEV
+	select MEDIA_CONTROLLER
+	select VIDEO_V4L2_SUBDEV_API
+	select V4L2_FWNODE
+	help
+	  This is a Video4Linux2 sensor driver for the SmartSens
+	  SC635HAI camera.
+
 config VIDEO_SC830AI
 	tristate "SmartSens SC830AI sensor support"
 	depends on I2C && VIDEO_DEV
diff --git a/drivers/media/i2c/Makefile b/drivers/media/i2c/Makefile
index 9c89270f1ce5..eb4d4513db0d 100644
--- a/drivers/media/i2c/Makefile
+++ b/drivers/media/i2c/Makefile
@@ -256,6 +256,7 @@ obj-$(CONFIG_VIDEO_SC500AI) += sc500ai.o
 obj-$(CONFIG_VIDEO_SC501AI) += sc501ai.o
 obj-$(CONFIG_VIDEO_SC530AI) += sc530ai.o
 obj-$(CONFIG_VIDEO_SC5336) += sc5336.o
+obj-$(CONFIG_VIDEO_SC635HAI) += sc635hai.o
 obj-$(CONFIG_VIDEO_SC830AI) += sc830ai.o
 obj-$(CONFIG_VIDEO_SC831AI) += sc831ai.o
 obj-$(CONFIG_VIDEO_SC850SL) += sc850sl.o
diff --git a/drivers/media/i2c/sc635hai.c b/drivers/media/i2c/sc635hai.c
new file mode 100644
index 000000000000..2f9a4ea8a7d7
--- /dev/null
+++ b/drivers/media/i2c/sc635hai.c
@@ -0,0 +1,2975 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * sc635hai driver
+ *
+ * Copyright (C) 2025 Rockchip Electronics Co., Ltd.
+ *
+ * V0.0X01.0X01 first version
+ *  support thunderboot
+ *  support sleep wake-up mode
+ * V0.0X01.0X02 support 2 lane setting
+ */
+
+// #define DEBUG
+
+#include <linux/clk.h>
+#include <linux/device.h>
+#include <linux/delay.h>
+#include <linux/gpio/consumer.h>
+#include <linux/i2c.h>
+#include <linux/module.h>
+#include <linux/of_graph.h>
+#include <linux/pm_runtime.h>
+#include <linux/regulator/consumer.h>
+#include <linux/sysfs.h>
+#include <linux/slab.h>
+#include <linux/version.h>
+#include <linux/rk-camera-module.h>
+#include <linux/rk-preisp.h>
+#include <media/media-entity.h>
+#include <media/v4l2-async.h>
+#include <media/v4l2-ctrls.h>
+#include <media/v4l2-subdev.h>
+#include <media/v4l2-fwnode.h>
+#include <linux/pinctrl/consumer.h>
+#include "../platform/rockchip/isp/rkisp_tb_helper.h"
+#include "cam-tb-setup.h"
+#include "cam-sleep-wakeup.h"
+
+#define DRIVER_VERSION			KERNEL_VERSION(0, 0x01, 0x02)
+
+#ifndef V4L2_CID_DIGITAL_GAIN
+#define V4L2_CID_DIGITAL_GAIN		V4L2_CID_GAIN
+#endif
+
+#define SC635HAI_BITS_PER_SAMPLE	10
+#define SC635HAI_LINK_FREQ_540		540000000	/* 1080Mbps pre lane*/
+
+#define OF_CAMERA_HDR_MODE		"rockchip,camera-hdr-mode"
+
+/* 2 lane */
+/* 1080Mbps pre lane */
+#define PIXEL_RATE_WITH_540M_10BIT_2L	(SC635HAI_LINK_FREQ_540 * 2 / \
+					SC635HAI_BITS_PER_SAMPLE * 2)
+
+/* 4 lane */
+/* 1080Mbps pre lane */
+#define PIXEL_RATE_WITH_540M_10BIT_4L	(SC635HAI_LINK_FREQ_540 * 2 / \
+					SC635HAI_BITS_PER_SAMPLE * 4)
+
+#define SC635HAI_XVCLK_FREQ		27000000
+
+#define CHIP_ID				0xce7c
+#define SC635HAI_REG_CHIP_ID		0x3107
+
+#define SC635HAI_REG_MIPI_CTRL		0x3019
+#define SC635HAI_MIPI_CTRL_ON		0x00
+#define SC635HAI_MIPI_CTRL_OFF		0xff
+
+#define SC635HAI_REG_CTRL_MODE		0x0100
+#define SC635HAI_MODE_SW_STANDBY	0x0
+#define SC635HAI_MODE_STREAMING		BIT(0)
+
+#define SC635HAI_REG_EXPOSURE_H		0x3e00
+#define SC635HAI_REG_EXPOSURE_M		0x3e01
+#define SC635HAI_REG_EXPOSURE_L		0x3e02
+
+#define SC635HAI_REG_SEXPOSURE_H	0x3e22
+#define SC635HAI_REG_SEXPOSURE_M	0x3e04
+#define SC635HAI_REG_SEXPOSURE_L	0x3e05
+
+#define	SC635HAI_EXPOSURE_MIN		2
+#define	SC635HAI_EXPOSURE_STEP		1
+#define SC635HAI_VTS_MAX		0x1ffff0
+
+#define SC635HAI_REG_DIG_GAIN		0x3e06
+#define SC635HAI_REG_DIG_FINE_GAIN	0x3e07
+#define SC635HAI_REG_ANA_GAIN		0x3e08
+#define SC635HAI_REG_ANA_FINE_GAIN	0x3e09
+#define SC635HAI_REG_SDIG_GAIN		0x3e10
+#define SC635HAI_REG_SDIG_FINE_GAIN	0x3e11
+#define SC635HAI_REG_SANA_GAIN		0x3e12
+#define SC635HAI_REG_SANA_FINE_GAIN	0x3e13
+
+#define SC635HAI_GAIN_MIN		0x0020
+#define SC635HAI_GAIN_MAX		42230 // 83.79 * 15.75 * 32 = 42230
+#define SC635HAI_GAIN_STEP		1
+#define SC635HAI_GAIN_DEFAULT		0x0020
+#define SC635HAI_LGAIN			0
+#define SC635HAI_SGAIN			1
+
+#define SC635HAI_REG_GROUP_HOLD		0x3812
+#define SC635HAI_GROUP_HOLD_START	0x00 // start hold
+#define SC635HAI_GROUP_HOLD_END		0x30 // release hold
+#define SC635HAI_REG_HOLD_DELAY		0x3802 //effective after group hold
+
+/* led strobe mode 1*/
+#define SC635HAI_REG_LED_STROBE_EN_M1		0x3362 // 0x00: auto mode; 0x01: manuale mode;
+#define SC635HAI_REG_LED_STROBE_OUTPUT_PIN0_M1	0x300a // [2:1, 6], use fsync as output single pin
+#define SC635HAI_REG_LED_STROBE_OUTPUT_PIN1_M1	0x3033 // [1]
+#define SC635HAI_REG_LED_STROBE_OUTPUT_PIN2_M1	0x3035 // 0x00
+#define SC635HAI_REG_LED_STROBE_PUSLE_START_H	0x3382 // start at {16’h320e,16’h320f} – 1 –{16’h3382,16’h3383}
+#define SC635HAI_REG_LED_STROBE_PUSLE_START_L	0x3383
+#define SC635HAI_REG_LED_STROBE_PUSLE_END_H	0x3386 // end at {16’h320e,16’h320f} – 1 –{16’h3386,16’h3387}
+#define SC635HAI_REG_LED_STROBE_PUSLE_END_L	0x3387
+/* led strobe mode 2 */
+#define SC635HAI_REG_LED_STROBE_EN_M2		0x4d0b	// 0x00: disable; 0x01: enable
+#define SC635HAI_REG_LED_STROBE_OUTPUT_PIN0_M2	0x300a // [2:1], use fsync as output single pin
+#define SC635HAI_REG_LED_STROBE_OUTPUT_PIN1_M2	0x3033 // [1]
+#define SC635HAI_REG_LED_STROBE_OUTPUT_PIN2_M2	0x3035 // 0x00
+#define SC635HAI_REG_LED_STROBE_PUSLE_WIDTH_H	0x4d0c // use {16’h320c,16’h320d} as unit
+#define SC635HAI_REG_LED_STROBE_PUSLE_WIDTH_L	0x4d0d
+
+#define SC635HAI_REG_TEST_PATTERN	0x4501
+#define SC635HAI_TEST_PATTERN_BIT_MASK	BIT(3)	// 0 -normal image; 1 - increasing gradient pattern
+
+/* max frame length 0x1ffff */
+#define SC635HAI_REG_VTS_H		0x326d	// [0]
+#define SC635HAI_REG_VTS_M		0x320e
+#define SC635HAI_REG_VTS_L		0x320f
+
+#define SC635HAI_FLIP_MIRROR_REG	0x3221
+
+#define SC635HAI_FETCH_EXP_H(VAL)	(((VAL) >> 12) & 0xF)
+#define SC635HAI_FETCH_EXP_M(VAL)	(((VAL) >> 4) & 0xFF)
+#define SC635HAI_FETCH_EXP_L(VAL)	(((VAL) & 0xF) << 4)
+
+#define SC635HAI_FETCH_MIRROR(VAL, ENABLE)	(ENABLE ? VAL | 0x06 : VAL & 0xf9)
+#define SC635HAI_FETCH_FLIP(VAL, ENABLE)	(ENABLE ? VAL | 0x60 : VAL & 0x9f)
+
+#define REG_DELAY			0xFFFE
+#define REG_NULL			0xFFFF
+
+#define SC635HAI_REG_VALUE_08BIT	1
+#define SC635HAI_REG_VALUE_16BIT	2
+#define SC635HAI_REG_VALUE_24BIT	3
+
+#define OF_CAMERA_PINCTRL_STATE_DEFAULT	"rockchip,camera_default"
+#define OF_CAMERA_PINCTRL_STATE_SLEEP	"rockchip,camera_sleep"
+#define SC635HAI_NAME			"sc635hai"
+
+static const char *const sc635hai_supply_names[] = {
+	"avdd",		/* Analog power */
+	"dovdd",	/* Digital I/O power */
+	"dvdd",		/* Digital core power */
+};
+
+#define SC635HAI_NUM_SUPPLIES ARRAY_SIZE(sc635hai_supply_names)
+
+struct regval {
+	u16 addr;
+	u8 val;
+};
+
+struct sc635hai_mode {
+	u32 bus_fmt;
+	u32 width;
+	u32 height;
+	struct v4l2_fract max_fps;
+	u32 hts_def;
+	u32 vts_def;
+	u32 exp_def;
+	const struct regval *global_reg_list;
+	const struct regval *reg_list;
+	u32 hdr_mode;
+	u32 mclk;
+	u32 link_freq_idx;
+	u32 vc[PAD_MAX];
+	u8 bpp;
+	u32 lanes;
+};
+
+struct sc635hai {
+	struct i2c_client	*client;
+	struct clk		*xvclk;
+	struct gpio_desc	*reset_gpio;
+	struct gpio_desc	*pwdn_gpio;
+	struct regulator_bulk_data supplies[SC635HAI_NUM_SUPPLIES];
+
+	struct pinctrl		*pinctrl;
+	struct pinctrl_state	*pins_default;
+	struct pinctrl_state	*pins_sleep;
+
+	struct v4l2_subdev	subdev;
+	struct media_pad	pad;
+	struct v4l2_ctrl_handler ctrl_handler;
+	struct v4l2_ctrl	*exposure;
+	struct v4l2_ctrl	*anal_gain;
+	struct v4l2_ctrl	*digi_gain;
+	struct v4l2_ctrl	*hblank;
+	struct v4l2_ctrl	*vblank;
+	struct v4l2_ctrl	*pixel_rate;
+	struct v4l2_ctrl	*link_freq;
+	struct v4l2_ctrl	*test_pattern;
+	struct mutex		mutex;
+	struct v4l2_fract	cur_fps;
+	bool			streaming;
+	bool			power_on;
+	const struct sc635hai_mode *supported_modes;
+	const struct sc635hai_mode *cur_mode;
+	u32			cfg_num;
+	u32			module_index;
+	const char		*module_facing;
+	const char		*module_name;
+	const char		*len_name;
+	u32			standby_hw;
+	u32			cur_vts;
+	bool			has_init_exp;
+	bool			is_thunderboot;
+	bool			is_first_streamoff;
+	bool			is_standby;
+	struct preisp_hdrae_exp_s init_hdrae_exp;
+	struct cam_sw_info	*cam_sw_inf;
+	struct v4l2_fwnode_endpoint bus_cfg;
+	struct rk_light_param	light_param;
+};
+
+#define to_sc635hai(sd) container_of(sd, struct sc635hai, subdev)
+
+/*
+ * Xclk 24Mhz
+ */
+static const struct regval sc635hai_global_4lane_regs[] = {
+	{REG_NULL, 0x00},
+};
+
+/*
+ * Xclk 27Mhz
+ * max_framerate 60fps
+ * mipi_datarate per lane 1080Mbps, 4lane
+ * linear: 3200x1800
+ * Cleaned_0x01_SC635HAI_raw_MIPI_27Minput_4Lane_10bit_1080Mbps_3200x1800_60fps
+ */
+static const struct regval sc635hai_linear_10_3200x1800_60fps_4lane_regs[] = {
+	{0x3105, 0x32},
+	{0x0103, 0x01},
+	{0x0100, 0x00},
+	{0x302c, 0x0c},
+	{0x302c, 0x00},
+	{0x3105, 0x12},
+	{0x23b0, 0x00},
+	{0x23b1, 0x08},
+	{0x23b2, 0x00},
+	{0x23b3, 0x18},
+	{0x23b4, 0x00},
+	{0x23b5, 0x38},
+	{0x23b6, 0x04},
+	{0x23b7, 0x08},
+	{0x23b8, 0x04},
+	{0x23b9, 0x18},
+	{0x23ba, 0x04},
+	{0x23bb, 0x38},
+	{0x23bc, 0x04},
+	{0x23bd, 0x08},
+	{0x23be, 0x04},
+	{0x23bf, 0x78},
+	{0x23c0, 0x04},
+	{0x23c1, 0x00},
+	{0x23c2, 0x04},
+	{0x23c3, 0x18},
+	{0x23c4, 0x04},
+	{0x23c5, 0x78},
+	{0x23c6, 0x04},
+	{0x23c7, 0x08},
+	{0x23c8, 0x04},
+	{0x23c9, 0x78},
+	{0x3018, 0x7b},
+	{0x301e, 0xf0},
+	{0x301f, 0x01},
+	{0x302c, 0x00},
+	{0x30b0, 0x01},
+	{0x30b8, 0x44},
+	{0x3204, 0x0c},
+	{0x3205, 0x87},
+	{0x3206, 0x07},
+	{0x3207, 0x0f},
+	{0x3208, 0x0c},
+	{0x3209, 0x80},
+	{0x320a, 0x07},
+	{0x320b, 0x08},
+	{0x320c, 0x03},
+	{0x320d, 0xc0},
+	{0x320e, 0x07},
+	{0x320f, 0x53},
+	{0x3211, 0x04},
+	{0x3213, 0x04},
+	{0x3214, 0x11},
+	{0x3215, 0x11},
+	{0x3223, 0xc0},
+	{0x3250, 0x00},
+	{0x3271, 0x10},
+	{0x327f, 0x3f},
+	{0x32e0, 0x00},
+	{0x3301, 0x12},
+	{0x3304, 0x50},
+	{0x3305, 0x00},
+	{0x3306, 0x70},
+	{0x3308, 0x18},
+	{0x3309, 0xb0},
+	{0x330a, 0x01},
+	{0x330b, 0x20},
+	{0x331e, 0x39},
+	{0x331f, 0x99},
+	{0x3333, 0x10},
+	{0x3334, 0x40},
+	{0x3364, 0x5e},
+	{0x338f, 0xa0},
+	{0x3393, 0x18},
+	{0x3394, 0x2c},
+	{0x3395, 0x3c},
+	{0x3399, 0x12},
+	{0x339a, 0x16},
+	{0x339b, 0x1e},
+	{0x339c, 0x2e},
+	{0x33ac, 0x0c},
+	{0x33ad, 0x2c},
+	{0x33ae, 0x30},
+	{0x33af, 0x90},
+	{0x33b0, 0x0f},
+	{0x33b2, 0x24},
+	{0x33b3, 0x10},
+	{0x33f8, 0x00},
+	{0x33f9, 0x70},
+	{0x33fa, 0x00},
+	{0x33fb, 0x70},
+	{0x349f, 0x03},
+	{0x34a8, 0x10},
+	{0x34a9, 0x10},
+	{0x34aa, 0x01},
+	{0x34ab, 0x20},
+	{0x34ac, 0x01},
+	{0x34ad, 0x20},
+	{0x34f9, 0x12},
+	{0x3632, 0x6d},
+	{0x3633, 0x4d},
+	{0x363a, 0x80},
+	{0x363b, 0x57},
+	{0x363c, 0xd8},
+	{0x363d, 0x40},
+	{0x3670, 0x42},
+	{0x3671, 0x33},
+	{0x3672, 0x34},
+	{0x3673, 0x04},
+	{0x3674, 0x08},
+	{0x3675, 0x04},
+	{0x3676, 0x18},
+	{0x367e, 0x69},
+	{0x367f, 0x6d},
+	{0x3680, 0x8d},
+	{0x3681, 0x04},
+	{0x3682, 0x08},
+	{0x3683, 0x04},
+	{0x3684, 0x78},
+	{0x3685, 0x80},
+	{0x3686, 0x80},
+	{0x3687, 0x83},
+	{0x3688, 0x82},
+	{0x3689, 0x85},
+	{0x368a, 0x8b},
+	{0x368b, 0x97},
+	{0x368c, 0xae},
+	{0x368d, 0x00},
+	{0x368e, 0x08},
+	{0x368f, 0x00},
+	{0x3690, 0x18},
+	{0x3691, 0x04},
+	{0x3692, 0x00},
+	{0x3693, 0x04},
+	{0x3694, 0x08},
+	{0x3695, 0x04},
+	{0x3696, 0x18},
+	{0x3697, 0x04},
+	{0x3698, 0x38},
+	{0x3699, 0x04},
+	{0x369a, 0x78},
+	{0x36d0, 0x0d},
+	{0x36ea, 0x14},
+	{0x36eb, 0x45},
+	{0x36ec, 0x4b},
+	{0x36ed, 0x18},
+	{0x370f, 0x13},
+	{0x3721, 0x6c},
+	{0x3722, 0x8b},
+	{0x3724, 0xc1},
+	{0x3727, 0x24},
+	{0x3729, 0xb4},
+	{0x37b0, 0x77},
+	{0x37b1, 0x77},
+	{0x37b2, 0x73},
+	{0x37b3, 0x04},
+	{0x37b4, 0x08},
+	{0x37b5, 0x04},
+	{0x37b6, 0x38},
+	{0x37b7, 0x13},
+	{0x37b8, 0x00},
+	{0x37b9, 0x00},
+	{0x37ba, 0xc4},
+	{0x37bb, 0xc4},
+	{0x37bc, 0xc4},
+	{0x37bd, 0x04},
+	{0x37be, 0x08},
+	{0x37bf, 0x04},
+	{0x37c0, 0x38},
+	{0x37c1, 0x04},
+	{0x37c2, 0x08},
+	{0x37c3, 0x04},
+	{0x37c4, 0x38},
+	{0x37fa, 0x18},
+	{0x37fb, 0x55},
+	{0x37fc, 0x19},
+	{0x37fd, 0x1a},
+	{0x3900, 0x05},
+	{0x3903, 0x60},
+	{0x3905, 0x0d},
+	{0x391a, 0x60},
+	{0x391b, 0x40},
+	{0x391c, 0x26},
+	{0x391d, 0x00},
+	{0x3926, 0xe0},
+	{0x3933, 0x80},
+	{0x3934, 0x06},
+	{0x3935, 0x00},
+	{0x3936, 0x72},
+	{0x3937, 0x71},
+	{0x3938, 0x75},
+	{0x3939, 0x0f},
+	{0x393a, 0xf3},
+	{0x393b, 0x0f},
+	{0x393c, 0xd8},
+	{0x393f, 0x80},
+	{0x3940, 0x0b},
+	{0x3941, 0x00},
+	{0x3942, 0x0b},
+	{0x3943, 0x7e},
+	{0x3944, 0x7f},
+	{0x3945, 0x7f},
+	{0x3946, 0x7e},
+	{0x39dd, 0x00},
+	{0x39de, 0x08},
+	{0x39e7, 0x04},
+	{0x39e8, 0x04},
+	{0x39e9, 0x80},
+	{0x3e00, 0x00},
+	{0x3e01, 0x74},
+	{0x3e02, 0xb0},
+	{0x3e03, 0x0b},
+	{0x3e08, 0x00},
+	{0x3e16, 0x01},
+	{0x3e17, 0x54},
+	{0x3e18, 0x01},
+	{0x3e19, 0x54},
+	{0x4402, 0x11},
+	{0x450a, 0x80},
+	{0x450d, 0x0a},
+	{0x4800, 0x24},
+	{0x480f, 0x03},
+	{0x4837, 0x1d},
+	{0x5000, 0x26},
+	{0x5780, 0x76},
+	{0x5784, 0x10},
+	{0x5785, 0x08},
+	{0x5787, 0x0a},
+	{0x5788, 0x0a},
+	{0x5789, 0x08},
+	{0x578a, 0x0a},
+	{0x578b, 0x0a},
+	{0x578c, 0x08},
+	{0x578d, 0x41},
+	{0x5790, 0x08},
+	{0x5791, 0x04},
+	{0x5792, 0x04},
+	{0x5793, 0x08},
+	{0x5794, 0x04},
+	{0x5795, 0x04},
+	{0x5799, 0x46},
+	{0x579a, 0x77},
+	{0x57a1, 0x04},
+	{0x57a8, 0xd2},
+	{0x57aa, 0x2a},
+	{0x57ab, 0x7f},
+	{0x57ac, 0x00},
+	{0x57ad, 0x00},
+	{0x58c0, 0x30},
+	{0x58c1, 0x28},
+	{0x58c2, 0x20},
+	{0x58c3, 0x30},
+	{0x58c4, 0x28},
+	{0x58c5, 0x20},
+	{0x58c6, 0x3c},
+	{0x58c7, 0x30},
+	{0x58c8, 0x28},
+	{0x58c9, 0x3c},
+	{0x58ca, 0x30},
+	{0x58cb, 0x28},
+	{0x36e9, 0x24},
+	{0x37f9, 0x24},
+	{REG_NULL, 0x00},
+};
+
+/*
+ * Xclk 27Mhz
+ * max_framerate 30fps
+ * mipi_datarate per lane 1080Mbps, 4lane
+ * hdr2: 3200x1800
+ * Cleaned_0x03_SC635HAI_raw_MIPI_27Minput_4Lane_10bit_1080Mbps_3200x1800_30fps.ini
+ */
+static const struct regval sc635hai_linear_10_3200x1800_30fps_4lane_regs[] = {
+	{0x3105, 0x32},
+	{0x0103, 0x01},
+	{0x0100, 0x00},
+	{0x302c, 0x0c},
+	{0x302c, 0x00},
+	{0x3105, 0x12},
+	{0x23b0, 0x00},
+	{0x23b1, 0x08},
+	{0x23b2, 0x00},
+	{0x23b3, 0x18},
+	{0x23b4, 0x00},
+	{0x23b5, 0x38},
+	{0x23b6, 0x04},
+	{0x23b7, 0x08},
+	{0x23b8, 0x04},
+	{0x23b9, 0x18},
+	{0x23ba, 0x04},
+	{0x23bb, 0x38},
+	{0x23bc, 0x04},
+	{0x23bd, 0x08},
+	{0x23be, 0x04},
+	{0x23bf, 0x78},
+	{0x23c0, 0x04},
+	{0x23c1, 0x00},
+	{0x23c2, 0x04},
+	{0x23c3, 0x18},
+	{0x23c4, 0x04},
+	{0x23c5, 0x78},
+	{0x23c6, 0x04},
+	{0x23c7, 0x08},
+	{0x23c8, 0x04},
+	{0x23c9, 0x78},
+	{0x3018, 0x7b},
+	{0x301e, 0xf0},
+	{0x301f, 0x03},
+	{0x302c, 0x00},
+	{0x30b0, 0x01},
+	{0x30b8, 0x44},
+	{0x3204, 0x0c},
+	{0x3205, 0x87},
+	{0x3206, 0x07},
+	{0x3207, 0x0f},
+	{0x3208, 0x0c},
+	{0x3209, 0x80},
+	{0x320a, 0x07},
+	{0x320b, 0x08},
+	{0x320c, 0x03},
+	{0x320d, 0xc0},
+	{0x320e, 0x0e},
+	{0x320f, 0xa6},
+	{0x3211, 0x04},
+	{0x3213, 0x04},
+	{0x3214, 0x11},
+	{0x3215, 0x11},
+	{0x3223, 0xc0},
+	{0x3250, 0x00},
+	{0x3271, 0x10},
+	{0x327f, 0x3f},
+	{0x32e0, 0x00},
+	{0x3301, 0x12},
+	{0x3304, 0x50},
+	{0x3305, 0x00},
+	{0x3306, 0x70},
+	{0x3308, 0x18},
+	{0x3309, 0xb0},
+	{0x330a, 0x01},
+	{0x330b, 0x20},
+	{0x331e, 0x39},
+	{0x331f, 0x99},
+	{0x3333, 0x10},
+	{0x3334, 0x40},
+	{0x3364, 0x5e},
+	{0x338f, 0xa0},
+	{0x3393, 0x18},
+	{0x3394, 0x2c},
+	{0x3395, 0x3c},
+	{0x3399, 0x12},
+	{0x339a, 0x16},
+	{0x339b, 0x1e},
+	{0x339c, 0x2e},
+	{0x33ac, 0x0c},
+	{0x33ad, 0x2c},
+	{0x33ae, 0x30},
+	{0x33af, 0x90},
+	{0x33b0, 0x0f},
+	{0x33b2, 0x24},
+	{0x33b3, 0x10},
+	{0x33f8, 0x00},
+	{0x33f9, 0x70},
+	{0x33fa, 0x00},
+	{0x33fb, 0x70},
+	{0x349f, 0x03},
+	{0x34a8, 0x10},
+	{0x34a9, 0x10},
+	{0x34aa, 0x01},
+	{0x34ab, 0x20},
+	{0x34ac, 0x01},
+	{0x34ad, 0x20},
+	{0x34f9, 0x12},
+	{0x3632, 0x6d},
+	{0x3633, 0x4d},
+	{0x363a, 0x80},
+	{0x363b, 0x57},
+	{0x363c, 0xd8},
+	{0x363d, 0x40},
+	{0x3670, 0x42},
+	{0x3671, 0x33},
+	{0x3672, 0x34},
+	{0x3673, 0x04},
+	{0x3674, 0x08},
+	{0x3675, 0x04},
+	{0x3676, 0x18},
+	{0x367e, 0x69},
+	{0x367f, 0x6d},
+	{0x3680, 0x8d},
+	{0x3681, 0x04},
+	{0x3682, 0x08},
+	{0x3683, 0x04},
+	{0x3684, 0x78},
+	{0x3685, 0x80},
+	{0x3686, 0x80},
+	{0x3687, 0x83},
+	{0x3688, 0x82},
+	{0x3689, 0x85},
+	{0x368a, 0x8b},
+	{0x368b, 0x97},
+	{0x368c, 0xae},
+	{0x368d, 0x00},
+	{0x368e, 0x08},
+	{0x368f, 0x00},
+	{0x3690, 0x18},
+	{0x3691, 0x04},
+	{0x3692, 0x00},
+	{0x3693, 0x04},
+	{0x3694, 0x08},
+	{0x3695, 0x04},
+	{0x3696, 0x18},
+	{0x3697, 0x04},
+	{0x3698, 0x38},
+	{0x3699, 0x04},
+	{0x369a, 0x78},
+	{0x36d0, 0x0d},
+	{0x36ea, 0x14},
+	{0x36eb, 0x45},
+	{0x36ec, 0x4b},
+	{0x36ed, 0x18},
+	{0x370f, 0x13},
+	{0x3721, 0x6c},
+	{0x3722, 0x8b},
+	{0x3724, 0xc1},
+	{0x3727, 0x24},
+	{0x3729, 0xb4},
+	{0x37b0, 0x77},
+	{0x37b1, 0x77},
+	{0x37b2, 0x73},
+	{0x37b3, 0x04},
+	{0x37b4, 0x08},
+	{0x37b5, 0x04},
+	{0x37b6, 0x38},
+	{0x37b7, 0x13},
+	{0x37b8, 0x00},
+	{0x37b9, 0x00},
+	{0x37ba, 0xc4},
+	{0x37bb, 0xc4},
+	{0x37bc, 0xc4},
+	{0x37bd, 0x04},
+	{0x37be, 0x08},
+	{0x37bf, 0x04},
+	{0x37c0, 0x38},
+	{0x37c1, 0x04},
+	{0x37c2, 0x08},
+	{0x37c3, 0x04},
+	{0x37c4, 0x38},
+	{0x37fa, 0x18},
+	{0x37fb, 0x55},
+	{0x37fc, 0x19},
+	{0x37fd, 0x1a},
+	{0x3900, 0x05},
+	{0x3903, 0x60},
+	{0x3905, 0x0d},
+	{0x391a, 0x60},
+	{0x391b, 0x40},
+	{0x391c, 0x26},
+	{0x391d, 0x00},
+	{0x3926, 0xe0},
+	{0x3933, 0x80},
+	{0x3934, 0x06},
+	{0x3935, 0x00},
+	{0x3936, 0x72},
+	{0x3937, 0x71},
+	{0x3938, 0x75},
+	{0x3939, 0x0f},
+	{0x393a, 0xf3},
+	{0x393b, 0x0f},
+	{0x393c, 0xd8},
+	{0x393f, 0x80},
+	{0x3940, 0x0b},
+	{0x3941, 0x00},
+	{0x3942, 0x0b},
+	{0x3943, 0x7e},
+	{0x3944, 0x7f},
+	{0x3945, 0x7f},
+	{0x3946, 0x7e},
+	{0x39dd, 0x00},
+	{0x39de, 0x08},
+	{0x39e7, 0x04},
+	{0x39e8, 0x04},
+	{0x39e9, 0x80},
+	{0x3e00, 0x00},
+	{0x3e01, 0xe9},
+	{0x3e02, 0xe0},
+	{0x3e03, 0x0b},
+	{0x3e08, 0x00},
+	{0x3e16, 0x01},
+	{0x3e17, 0x54},
+	{0x3e18, 0x01},
+	{0x3e19, 0x54},
+	{0x4402, 0x11},
+	{0x450a, 0x80},
+	{0x450d, 0x0a},
+	{0x4800, 0x24},
+	{0x480f, 0x03},
+	{0x4837, 0x1d},
+	{0x5000, 0x26},
+	{0x5780, 0x76},
+	{0x5784, 0x10},
+	{0x5785, 0x08},
+	{0x5787, 0x0a},
+	{0x5788, 0x0a},
+	{0x5789, 0x08},
+	{0x578a, 0x0a},
+	{0x578b, 0x0a},
+	{0x578c, 0x08},
+	{0x578d, 0x41},
+	{0x5790, 0x08},
+	{0x5791, 0x04},
+	{0x5792, 0x04},
+	{0x5793, 0x08},
+	{0x5794, 0x04},
+	{0x5795, 0x04},
+	{0x5799, 0x46},
+	{0x579a, 0x77},
+	{0x57a1, 0x04},
+	{0x57a8, 0xd2},
+	{0x57aa, 0x2a},
+	{0x57ab, 0x7f},
+	{0x57ac, 0x00},
+	{0x57ad, 0x00},
+	{0x58c0, 0x30},
+	{0x58c1, 0x28},
+	{0x58c2, 0x20},
+	{0x58c3, 0x30},
+	{0x58c4, 0x28},
+	{0x58c5, 0x20},
+	{0x58c6, 0x3c},
+	{0x58c7, 0x30},
+	{0x58c8, 0x28},
+	{0x58c9, 0x3c},
+	{0x58ca, 0x30},
+	{0x58cb, 0x28},
+	{0x36e9, 0x24},
+	{0x37f9, 0x24},
+	{REG_NULL, 0x00},
+};
+
+/*
+ * Xclk 27Mhz
+ * max_framerate 30fps
+ * mipi_datarate per lane 720Mbps, 2lane
+ * linear: 3200x1800
+ * Cleaned_0x13_SC635HAI_raw_MIPI_27Minput_2Lane_10bit_1080Mbps_3200x1800_30fps.ini
+ */
+static const struct regval sc635hai_linear_10_3200x1800_30fps_2lane_regs[] = {
+	{0x3105, 0x32},
+	{0x0103, 0x01},
+	{0x0100, 0x00},
+	{0x302c, 0x0c},
+	{0x302c, 0x00},
+	{0x3105, 0x12},
+	{0x23b0, 0x00},
+	{0x23b1, 0x08},
+	{0x23b2, 0x00},
+	{0x23b3, 0x18},
+	{0x23b4, 0x00},
+	{0x23b5, 0x38},
+	{0x23b6, 0x04},
+	{0x23b7, 0x08},
+	{0x23b8, 0x04},
+	{0x23b9, 0x18},
+	{0x23ba, 0x04},
+	{0x23bb, 0x38},
+	{0x23bc, 0x04},
+	{0x23bd, 0x08},
+	{0x23be, 0x04},
+	{0x23bf, 0x78},
+	{0x23c0, 0x04},
+	{0x23c1, 0x00},
+	{0x23c2, 0x04},
+	{0x23c3, 0x18},
+	{0x23c4, 0x04},
+	{0x23c5, 0x78},
+	{0x23c6, 0x04},
+	{0x23c7, 0x08},
+	{0x23c8, 0x04},
+	{0x23c9, 0x78},
+	{0x3018, 0x3b},
+	{0x3019, 0x0c},
+	{0x301e, 0xf0},
+	{0x301f, 0x13},
+	{0x302c, 0x00},
+	{0x30b0, 0x01},
+	{0x30b8, 0x44},
+	{0x3204, 0x0c},
+	{0x3205, 0x87},
+	{0x3206, 0x07},
+	{0x3207, 0x0f},
+	{0x3208, 0x0c},
+	{0x3209, 0x80},
+	{0x320a, 0x07},
+	{0x320b, 0x08},
+	{0x320c, 0x07},
+	{0x320d, 0x80},
+	{0x320e, 0x07},
+	{0x320f, 0x53},
+	{0x3211, 0x04},
+	{0x3213, 0x04},
+	{0x3214, 0x11},
+	{0x3215, 0x11},
+	{0x3223, 0xc0},
+	{0x3250, 0x00},
+	{0x3271, 0x10},
+	{0x327f, 0x3f},
+	{0x32e0, 0x00},
+	{0x3301, 0x12},
+	{0x3304, 0x50},
+	{0x3305, 0x00},
+	{0x3306, 0x70},
+	{0x3308, 0x18},
+	{0x3309, 0xb0},
+	{0x330a, 0x01},
+	{0x330b, 0x20},
+	{0x331e, 0x39},
+	{0x331f, 0x99},
+	{0x3333, 0x10},
+	{0x3334, 0x40},
+	{0x3364, 0x5e},
+	{0x338f, 0xa0},
+	{0x3393, 0x18},
+	{0x3394, 0x2c},
+	{0x3395, 0x3c},
+	{0x3399, 0x12},
+	{0x339a, 0x16},
+	{0x339b, 0x1e},
+	{0x339c, 0x2e},
+	{0x33ac, 0x0c},
+	{0x33ad, 0x2c},
+	{0x33ae, 0x30},
+	{0x33af, 0x90},
+	{0x33b0, 0x0f},
+	{0x33b2, 0x24},
+	{0x33b3, 0x10},
+	{0x33f8, 0x00},
+	{0x33f9, 0x70},
+	{0x33fa, 0x00},
+	{0x33fb, 0x70},
+	{0x349f, 0x03},
+	{0x34a8, 0x10},
+	{0x34a9, 0x10},
+	{0x34aa, 0x01},
+	{0x34ab, 0x20},
+	{0x34ac, 0x01},
+	{0x34ad, 0x20},
+	{0x34f9, 0x12},
+	{0x3632, 0x6d},
+	{0x3633, 0x4d},
+	{0x363a, 0x80},
+	{0x363b, 0x57},
+	{0x363c, 0xd8},
+	{0x363d, 0x40},
+	{0x3670, 0x42},
+	{0x3671, 0x33},
+	{0x3672, 0x34},
+	{0x3673, 0x04},
+	{0x3674, 0x08},
+	{0x3675, 0x04},
+	{0x3676, 0x18},
+	{0x367e, 0x69},
+	{0x367f, 0x6d},
+	{0x3680, 0x8d},
+	{0x3681, 0x04},
+	{0x3682, 0x08},
+	{0x3683, 0x04},
+	{0x3684, 0x78},
+	{0x3685, 0x80},
+	{0x3686, 0x80},
+	{0x3687, 0x83},
+	{0x3688, 0x82},
+	{0x3689, 0x85},
+	{0x368a, 0x8b},
+	{0x368b, 0x97},
+	{0x368c, 0xae},
+	{0x368d, 0x00},
+	{0x368e, 0x08},
+	{0x368f, 0x00},
+	{0x3690, 0x18},
+	{0x3691, 0x04},
+	{0x3692, 0x00},
+	{0x3693, 0x04},
+	{0x3694, 0x08},
+	{0x3695, 0x04},
+	{0x3696, 0x18},
+	{0x3697, 0x04},
+	{0x3698, 0x38},
+	{0x3699, 0x04},
+	{0x369a, 0x78},
+	{0x36d0, 0x0d},
+	{0x36ea, 0x14},
+	{0x36eb, 0x45},
+	{0x36ec, 0x4b},
+	{0x36ed, 0x18},
+	{0x370f, 0x13},
+	{0x3721, 0x6c},
+	{0x3722, 0x8b},
+	{0x3724, 0xc1},
+	{0x3727, 0x24},
+	{0x3729, 0xb4},
+	{0x37b0, 0x77},
+	{0x37b1, 0x77},
+	{0x37b2, 0x73},
+	{0x37b3, 0x04},
+	{0x37b4, 0x08},
+	{0x37b5, 0x04},
+	{0x37b6, 0x38},
+	{0x37b7, 0x13},
+	{0x37b8, 0x00},
+	{0x37b9, 0x00},
+	{0x37ba, 0xc4},
+	{0x37bb, 0xc4},
+	{0x37bc, 0xc4},
+	{0x37bd, 0x04},
+	{0x37be, 0x08},
+	{0x37bf, 0x04},
+	{0x37c0, 0x38},
+	{0x37c1, 0x04},
+	{0x37c2, 0x08},
+	{0x37c3, 0x04},
+	{0x37c4, 0x38},
+	{0x37fa, 0x18},
+	{0x37fb, 0x55},
+	{0x37fc, 0x19},
+	{0x37fd, 0x1a},
+	{0x3900, 0x05},
+	{0x3903, 0x60},
+	{0x3905, 0x0d},
+	{0x391a, 0x60},
+	{0x391b, 0x40},
+	{0x391c, 0x26},
+	{0x391d, 0x00},
+	{0x3926, 0xe0},
+	{0x3933, 0x80},
+	{0x3934, 0x06},
+	{0x3935, 0x00},
+	{0x3936, 0x72},
+	{0x3937, 0x71},
+	{0x3938, 0x75},
+	{0x3939, 0x0f},
+	{0x393a, 0xf3},
+	{0x393b, 0x0f},
+	{0x393c, 0xd8},
+	{0x393f, 0x80},
+	{0x3940, 0x0b},
+	{0x3941, 0x00},
+	{0x3942, 0x0b},
+	{0x3943, 0x7e},
+	{0x3944, 0x7f},
+	{0x3945, 0x7f},
+	{0x3946, 0x7e},
+	{0x39dd, 0x00},
+	{0x39de, 0x08},
+	{0x39e7, 0x04},
+	{0x39e8, 0x04},
+	{0x39e9, 0x80},
+	{0x3e00, 0x00},
+	{0x3e01, 0x74},
+	{0x3e02, 0xb0},
+	{0x3e03, 0x0b},
+	{0x3e08, 0x00},
+	{0x3e16, 0x01},
+	{0x3e17, 0x54},
+	{0x3e18, 0x01},
+	{0x3e19, 0x54},
+	{0x4402, 0x11},
+	{0x450a, 0x80},
+	{0x450d, 0x0a},
+	{0x4800, 0x24},
+	{0x480f, 0x03},
+	{0x4837, 0x1d},
+	{0x5000, 0x26},
+	{0x5780, 0x76},
+	{0x5784, 0x10},
+	{0x5785, 0x08},
+	{0x5787, 0x0a},
+	{0x5788, 0x0a},
+	{0x5789, 0x08},
+	{0x578a, 0x0a},
+	{0x578b, 0x0a},
+	{0x578c, 0x08},
+	{0x578d, 0x41},
+	{0x5790, 0x08},
+	{0x5791, 0x04},
+	{0x5792, 0x04},
+	{0x5793, 0x08},
+	{0x5794, 0x04},
+	{0x5795, 0x04},
+	{0x5799, 0x46},
+	{0x579a, 0x77},
+	{0x57a1, 0x04},
+	{0x57a8, 0xd2},
+	{0x57aa, 0x2a},
+	{0x57ab, 0x7f},
+	{0x57ac, 0x00},
+	{0x57ad, 0x00},
+	{0x58c0, 0x30},
+	{0x58c1, 0x28},
+	{0x58c2, 0x20},
+	{0x58c3, 0x30},
+	{0x58c4, 0x28},
+	{0x58c5, 0x20},
+	{0x58c6, 0x3c},
+	{0x58c7, 0x30},
+	{0x58c8, 0x28},
+	{0x58c9, 0x3c},
+	{0x58ca, 0x30},
+	{0x58cb, 0x28},
+	{0x36e9, 0x24},
+	{0x37f9, 0x24},
+	{REG_NULL, 0x00},
+};
+
+/*
+ * The width and height must be configured to be
+ * the same as the current output resolution of the sensor.
+ * The input width of the isp needs to be 16 aligned.
+ * The input height of the isp needs to be 8 aligned.
+ * If the width or height does not meet the alignment rules,
+ * you can configure the cropping parameters with the following function to
+ * crop out the appropriate resolution.
+ * struct v4l2_subdev_pad_ops {
+ *	.get_selection
+ * }
+ */
+
+static const struct sc635hai_mode supported_modes_4lane[] = {
+	/* linear 30fps */
+	{
+		.width = 3200,
+		.height = 1800,
+		.max_fps = {
+			.numerator = 10000,
+			.denominator = 300000,
+		},
+		.exp_def = 0x0e9e,
+		.hts_def = 0x3c0 * 4,	// 3840
+		.vts_def = 0x0ea6,	// 3750
+		.bus_fmt = MEDIA_BUS_FMT_SBGGR10_1X10,
+		.global_reg_list = sc635hai_global_4lane_regs,
+		.reg_list = sc635hai_linear_10_3200x1800_30fps_4lane_regs,
+		.hdr_mode = NO_HDR,
+		.mclk = 27000000,
+		.link_freq_idx = 0,
+		.bpp = 10,
+		.vc[PAD0] = 0,
+		.lanes = 4,
+	},
+	/* linear 60fps */
+	{
+		.width = 3200,
+		.height = 1800,
+		.max_fps = {
+			.numerator = 10000,
+			.denominator = 600000,
+		},
+		.exp_def = 0x074b,
+		.hts_def = 0x3c0 * 4,	// 3840
+		.vts_def = 0x0753,	// 1875
+		.bus_fmt = MEDIA_BUS_FMT_SBGGR10_1X10,
+		.global_reg_list = sc635hai_global_4lane_regs,
+		.reg_list = sc635hai_linear_10_3200x1800_60fps_4lane_regs,
+		.hdr_mode = NO_HDR,
+		.mclk = 27000000,
+		.link_freq_idx = 0,
+		.bpp = 10,
+		.vc[PAD0] = 0,
+		.lanes = 4,
+	},
+};
+
+static const struct sc635hai_mode supported_modes_2lane[] = {
+	/* linear 30fps */
+	{
+		.width = 3200,
+		.height = 1800,
+		.max_fps = {
+			.numerator = 10000,
+			.denominator = 300000,
+		},
+		.exp_def = 0x074b,
+		.hts_def = 0x780 * 2,	// 3840
+		.vts_def = 0x0753,	// 1875
+		.bus_fmt = MEDIA_BUS_FMT_SBGGR10_1X10,
+		.global_reg_list = sc635hai_global_4lane_regs,
+		.reg_list = sc635hai_linear_10_3200x1800_30fps_2lane_regs,
+		.hdr_mode = NO_HDR,
+		.mclk = 27000000,
+		.link_freq_idx = 0,
+		.bpp = 10,
+		.vc[PAD0] = 0,
+		.lanes = 2,
+	}
+};
+
+static const u32 bus_code[] = {
+	MEDIA_BUS_FMT_SBGGR10_1X10,
+};
+
+static const s64 link_freq_menu_items[] = {
+	SC635HAI_LINK_FREQ_540,	/* 4 lanes */
+};
+
+static const char *const sc635hai_test_pattern_menu[] = {
+	"Disabled",
+	"Vertical Color Bar Type 1",
+	"Vertical Color Bar Type 2",
+	"Vertical Color Bar Type 3",
+	"Vertical Color Bar Type 4",
+};
+
+
+static int sc635hai_write_reg(struct i2c_client *client, u16 reg,
+			     u32 len, u32 val)
+{
+	u32 buf_i, val_i;
+	u8 buf[6];
+	u8 *val_p;
+	__be32 val_be;
+
+	if (len > 4)
+		return -EINVAL;
+
+	buf[0] = reg >> 8;
+	buf[1] = reg & 0xff;
+
+	val_be = cpu_to_be32(val);
+	val_p = (u8 *)&val_be;
+	buf_i = 2;
+	val_i = 4 - len;
+
+	while (val_i < 4)
+		buf[buf_i++] = val_p[val_i++];
+
+	if (i2c_master_send(client, buf, len + 2) != len + 2)
+		return -EIO;
+	return 0;
+}
+
+static int sc635hai_write_array(struct i2c_client *client,
+			       const struct regval *regs)
+{
+	u32 i;
+	int ret = 0;
+
+	for (i = 0; ret == 0 && regs[i].addr != REG_NULL; i++)
+		ret = sc635hai_write_reg(client, regs[i].addr,
+					SC635HAI_REG_VALUE_08BIT, regs[i].val);
+
+	return ret;
+}
+
+static int sc635hai_read_reg(struct i2c_client *client, u16 reg, unsigned int len,
+			    u32 *val)
+{
+	struct i2c_msg msgs[2];
+	u8 *data_be_p;
+	__be32 data_be = 0;
+	__be16 reg_addr_be = cpu_to_be16(reg);
+	int ret;
+
+	if (len > 4 || !len)
+		return -EINVAL;
+
+	data_be_p = (u8 *)&data_be;
+	/* Write register address */
+	msgs[0].addr = client->addr;
+	msgs[0].flags = 0;
+	msgs[0].len = 2;
+	msgs[0].buf = (u8 *)&reg_addr_be;
+
+	/* Read data from register */
+	msgs[1].addr = client->addr;
+	msgs[1].flags = I2C_M_RD;
+	msgs[1].len = len;
+	msgs[1].buf = &data_be_p[4 - len];
+
+	ret = i2c_transfer(client->adapter, msgs, ARRAY_SIZE(msgs));
+	if (ret != ARRAY_SIZE(msgs))
+		return -EIO;
+
+	*val = be32_to_cpu(data_be);
+
+	return 0;
+}
+
+/* mode: 0 = lgain  1 = sgain */
+static int sc635hai_set_gain_reg(struct sc635hai *sc635hai, u32 gain, int mode)
+{
+	struct i2c_client *client = sc635hai->client;
+	u32 coarse_again = 0, coarse_dgain = 0, fine_again = 0, fine_dgain = 0;
+	int ret = 0, gain_factor;
+
+	if (gain <= SC635HAI_GAIN_MIN)
+		gain = SC635HAI_GAIN_MIN;
+	else if (gain > SC635HAI_GAIN_MAX)
+		gain = SC635HAI_GAIN_MAX;
+
+	gain_factor = gain * 1000 / 32;
+	if (gain_factor < 2000) {		/* start again,  1.0x - 2.0x, 1000 * 2 = 2000*/
+		coarse_again = 0x00;
+		coarse_dgain = 0x00;
+		fine_dgain = 0x80;
+		fine_again = DIV_ROUND_UP(gain_factor * 32, 1000);
+	} else if (gain_factor < 2660) {	/* 2.0x - 2.625x, 1000 * 2.66 = 2660 */
+		coarse_again = 0x01;
+		coarse_dgain = 0x00;
+		fine_dgain = 0x80;
+		fine_again = DIV_ROUND_UP(gain_factor * 32, 2000);
+	} else if (gain_factor < 5320) {	/* 2.660x - 5.320x, 1000 * 5.32 = 5320 */
+		coarse_again = 0x80;
+		coarse_dgain = 0x00;
+		fine_dgain = 0x80;
+		fine_again = DIV_ROUND_UP(gain_factor * 32, 2660);
+	} else if (gain_factor < 10640) {	/* 5.32x - 10.64x, 1000 * 10.64 = 10640 */
+		coarse_again = 0x81;
+		coarse_dgain = 0x00;
+		fine_dgain = 0x80;
+		fine_again = DIV_ROUND_UP(gain_factor * 32, 5320);
+	} else if (gain_factor < 21280) {	/* 10.64x - 21.28x, 1000 * 21.28 = 21280 */
+		coarse_again = 0x83;
+		coarse_dgain = 0x00;
+		fine_dgain = 0x80;
+		fine_again = DIV_ROUND_UP(gain_factor * 32, 10640);
+	} else if (gain_factor < 42560) {	/* 21.28x - 42.56x, 1000 * 42.56 = 42560 */
+		coarse_again = 0x87;
+		coarse_dgain = 0x00;
+		fine_dgain = 0x80;
+		fine_again = DIV_ROUND_UP(gain_factor * 32, 21280);
+	} else if (gain_factor <= 83790) {	/* 42.56x - 83.79x, 1000 * 83.79 = 83790 */
+		coarse_again = 0x8f;
+		coarse_dgain = 0x00;
+		fine_dgain = 0x80;
+		fine_again = DIV_ROUND_UP(gain_factor * 32, 42560);
+	} else if (gain_factor < 83790 * 2) {
+		// open dgain begin,  max digital gain 15.875x,
+		// the accuracy of the digital fractional gain is 1/32.
+		coarse_again = 0x8f;
+		coarse_dgain = 0x00;
+		fine_again = 0x3f;
+		fine_dgain = DIV_ROUND_UP(gain_factor * 128, 83790);
+	} else if (gain_factor < 83790 * 4) {
+		coarse_again = 0x8f;
+		coarse_dgain = 0x01;
+		fine_again = 0x3f;
+		fine_dgain = DIV_ROUND_UP(gain_factor * 128, 83790 * 2);
+	} else if (gain_factor < 83790 * 8) {
+		coarse_again = 0x8f;
+		coarse_dgain = 0x03;
+		fine_again = 0x3f;
+		fine_dgain = DIV_ROUND_UP(gain_factor * 128, 83790 * 4);
+	} else if (gain_factor < 83790 * 16) {
+		coarse_again = 0x8f;
+		coarse_dgain = 0x07;
+		fine_again = 0x3f;
+		fine_dgain = DIV_ROUND_UP(gain_factor * 128, 83790 * 8);
+	}
+	dev_dbg(&client->dev, "c_again: 0x%x, c_dgain: 0x%x, f_again: 0x%x, f_dgain: 0x%0x\n",
+		coarse_again, coarse_dgain, fine_again, fine_dgain);
+
+	if (mode == SC635HAI_LGAIN) {
+		ret = sc635hai_write_reg(sc635hai->client,
+					SC635HAI_REG_DIG_GAIN,
+					SC635HAI_REG_VALUE_08BIT,
+					coarse_dgain);
+		ret |= sc635hai_write_reg(sc635hai->client,
+					 SC635HAI_REG_DIG_FINE_GAIN,
+					 SC635HAI_REG_VALUE_08BIT,
+					 fine_dgain);
+		ret |= sc635hai_write_reg(sc635hai->client,
+					 SC635HAI_REG_ANA_GAIN,
+					 SC635HAI_REG_VALUE_08BIT,
+					 coarse_again);
+		ret |= sc635hai_write_reg(sc635hai->client,
+					 SC635HAI_REG_ANA_FINE_GAIN,
+					 SC635HAI_REG_VALUE_08BIT,
+					 fine_again);
+	} else {
+		ret = sc635hai_write_reg(sc635hai->client,
+					SC635HAI_REG_SDIG_GAIN,
+					SC635HAI_REG_VALUE_08BIT,
+					coarse_dgain);
+		ret |= sc635hai_write_reg(sc635hai->client,
+					 SC635HAI_REG_SDIG_FINE_GAIN,
+					 SC635HAI_REG_VALUE_08BIT,
+					 fine_dgain);
+		ret |= sc635hai_write_reg(sc635hai->client,
+					 SC635HAI_REG_SANA_GAIN,
+					 SC635HAI_REG_VALUE_08BIT,
+					 coarse_again);
+		ret |= sc635hai_write_reg(sc635hai->client,
+					 SC635HAI_REG_SANA_FINE_GAIN,
+					 SC635HAI_REG_VALUE_08BIT,
+					 fine_again);
+	}
+	return ret;
+}
+
+static int sc635hai_set_hdrae(struct sc635hai *sc635hai,
+			     struct preisp_hdrae_exp_s *ae)
+{
+	int ret = 0;
+	u32 l_exp_time, m_exp_time, s_exp_time;
+	u32 l_a_gain, m_a_gain, s_a_gain;
+	u32 l_exp_max = 0;
+
+	if (!sc635hai->has_init_exp && !sc635hai->streaming) {
+		sc635hai->init_hdrae_exp = *ae;
+		sc635hai->has_init_exp = true;
+		dev_dbg(&sc635hai->client->dev, "sc635hai don't stream, record exp for hdr!\n");
+		return ret;
+	}
+	l_exp_time = ae->long_exp_reg;
+	m_exp_time = ae->middle_exp_reg;
+	s_exp_time = ae->short_exp_reg;
+	l_a_gain = ae->long_gain_reg;
+	m_a_gain = ae->middle_gain_reg;
+	s_a_gain = ae->short_gain_reg;
+
+	dev_dbg(&sc635hai->client->dev,
+		"rev exp req: L_exp: 0x%x, 0x%x, M_exp: 0x%x, 0x%x S_exp: 0x%x, 0x%x\n",
+		l_exp_time, m_exp_time, s_exp_time,
+		l_a_gain, m_a_gain, s_a_gain);
+
+	if (sc635hai->cur_mode->hdr_mode == HDR_X2) {
+		//2 stagger
+		l_a_gain = m_a_gain;
+		l_exp_time = m_exp_time;
+	}
+
+	/*
+	 * manual long exposure time in double-line overlap HDR mode,
+	 * register value is in units of one line
+	 * (3033[0],3e23~3e24) default value is 0x00c4 from reg list
+	 * {326d[0],320e[7:0],320f} -{3033[0],3e23,3e24} - 15
+	 */
+	l_exp_max = sc635hai->cur_vts - 196 - 16;
+	//set exposure
+	l_exp_time = l_exp_time * 2;
+	s_exp_time = s_exp_time * 2;
+	if (l_exp_time > l_exp_max)
+		l_exp_time = l_exp_max;
+
+	/*
+	 * read regs list to get (3e23~3e24) value, then subtract 11
+	 * (3033[0], 3e23~3e24) default value is 0x00c4  from reg list
+	 * 184 = (3033[0],3e23~3e24) - 13
+	 */
+	if (s_exp_time > 184)
+		s_exp_time = 184;
+
+	ret = sc635hai_write_reg(sc635hai->client,
+				SC635HAI_REG_EXPOSURE_H,
+				SC635HAI_REG_VALUE_08BIT,
+				SC635HAI_FETCH_EXP_H(l_exp_time));
+	ret |= sc635hai_write_reg(sc635hai->client,
+				 SC635HAI_REG_EXPOSURE_M,
+				 SC635HAI_REG_VALUE_08BIT,
+				 SC635HAI_FETCH_EXP_M(l_exp_time));
+	ret |= sc635hai_write_reg(sc635hai->client,
+				 SC635HAI_REG_EXPOSURE_L,
+				 SC635HAI_REG_VALUE_08BIT,
+				 SC635HAI_FETCH_EXP_L(l_exp_time));
+	ret |= sc635hai_write_reg(sc635hai->client,
+				 SC635HAI_REG_SEXPOSURE_M,
+				 SC635HAI_REG_VALUE_08BIT,
+				 SC635HAI_FETCH_EXP_M(s_exp_time));
+	ret |= sc635hai_write_reg(sc635hai->client,
+				 SC635HAI_REG_SEXPOSURE_L,
+				 SC635HAI_REG_VALUE_08BIT,
+				 SC635HAI_FETCH_EXP_L(s_exp_time));
+
+	ret |= sc635hai_set_gain_reg(sc635hai, l_a_gain, SC635HAI_LGAIN);
+	ret |= sc635hai_set_gain_reg(sc635hai, s_a_gain, SC635HAI_SGAIN);
+	return ret;
+}
+
+static int sc635hai_get_reso_dist(const struct sc635hai_mode *mode,
+				 struct v4l2_mbus_framefmt *framefmt)
+{
+	return abs(mode->width - framefmt->width) +
+	       abs(mode->height - framefmt->height);
+}
+
+static const struct sc635hai_mode *
+sc635hai_find_best_fit(struct sc635hai *sc635hai, struct v4l2_subdev_format *fmt)
+{
+	struct v4l2_mbus_framefmt *framefmt = &fmt->format;
+	int dist;
+	int cur_best_fit = 0;
+	int cur_best_fit_dist = -1;
+	unsigned int i;
+
+	for (i = 0; i < sc635hai->cfg_num; i++) {
+		dist = sc635hai_get_reso_dist(&sc635hai->supported_modes[i], framefmt);
+		if (cur_best_fit_dist == -1 || dist < cur_best_fit_dist) {
+			cur_best_fit_dist = dist;
+			cur_best_fit = i;
+		} else if (dist == cur_best_fit_dist &&
+			   framefmt->code == sc635hai->supported_modes[i].bus_fmt) {
+			cur_best_fit = i;
+			break;
+		}
+	}
+
+	return &sc635hai->supported_modes[cur_best_fit];
+}
+
+static int sc635hai_set_fmt(struct v4l2_subdev *sd,
+			   struct v4l2_subdev_state *sd_state,
+			   struct v4l2_subdev_format *fmt)
+{
+	struct sc635hai *sc635hai = to_sc635hai(sd);
+	const struct sc635hai_mode *mode;
+	s64 h_blank, vblank_def;
+	u64 dst_link_freq = 0;
+	u64 dst_pixel_rate = 0;
+	u8 lanes = sc635hai->bus_cfg.bus.mipi_csi2.num_data_lanes;
+
+	mutex_lock(&sc635hai->mutex);
+
+	mode = sc635hai_find_best_fit(sc635hai, fmt);
+	fmt->format.code = mode->bus_fmt;
+	fmt->format.width = mode->width;
+	fmt->format.height = mode->height;
+	fmt->format.field = V4L2_FIELD_NONE;
+	if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
+#ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
+		*v4l2_subdev_get_try_format(sd, sd_state, fmt->pad) = fmt->format;
+#else
+		mutex_unlock(&sc635hai->mutex);
+		return -ENOTTY;
+#endif
+	} else {
+		sc635hai->cur_mode = mode;
+		h_blank = mode->hts_def - mode->width;
+		__v4l2_ctrl_modify_range(sc635hai->hblank, h_blank,
+					 h_blank, 1, h_blank);
+		vblank_def = mode->vts_def - mode->height;
+		__v4l2_ctrl_modify_range(sc635hai->vblank, vblank_def,
+					 SC635HAI_VTS_MAX - mode->height,
+					 1, vblank_def);
+		dst_link_freq = mode->link_freq_idx;
+		dst_pixel_rate = (u32)link_freq_menu_items[mode->link_freq_idx] /
+				 mode->bpp * 2 * lanes;
+		__v4l2_ctrl_s_ctrl_int64(sc635hai->pixel_rate,
+					 dst_pixel_rate);
+		__v4l2_ctrl_s_ctrl(sc635hai->link_freq,
+				   dst_link_freq);
+		sc635hai->cur_fps = mode->max_fps;
+	}
+
+	mutex_unlock(&sc635hai->mutex);
+
+	return 0;
+}
+
+static int sc635hai_get_fmt(struct v4l2_subdev *sd,
+			   struct v4l2_subdev_state *sd_state,
+			   struct v4l2_subdev_format *fmt)
+{
+	struct sc635hai *sc635hai = to_sc635hai(sd);
+	const struct sc635hai_mode *mode = sc635hai->cur_mode;
+
+	mutex_lock(&sc635hai->mutex);
+	if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
+#ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
+		fmt->format = *v4l2_subdev_get_try_format(sd, sd_state, fmt->pad);
+#else
+		mutex_unlock(&sc635hai->mutex);
+		return -ENOTTY;
+#endif
+	} else {
+		fmt->format.width = mode->width;
+		fmt->format.height = mode->height;
+		fmt->format.code = mode->bus_fmt;
+		fmt->format.field = V4L2_FIELD_NONE;
+		/* format info: width/height/data type/virctual channel */
+		if (fmt->pad < PAD_MAX && mode->hdr_mode != NO_HDR)
+			fmt->reserved[0] = mode->vc[fmt->pad];
+		else
+			fmt->reserved[0] = mode->vc[PAD0];
+	}
+	mutex_unlock(&sc635hai->mutex);
+
+	return 0;
+}
+
+static int sc635hai_enum_mbus_code(struct v4l2_subdev *sd,
+				  struct v4l2_subdev_state *sd_state,
+				  struct v4l2_subdev_mbus_code_enum *code)
+{
+	if (code->index >= ARRAY_SIZE(bus_code))
+		return -EINVAL;
+	code->code = bus_code[code->index];
+
+	return 0;
+}
+
+static int sc635hai_enum_frame_sizes(struct v4l2_subdev *sd,
+				    struct v4l2_subdev_state *sd_state,
+				    struct v4l2_subdev_frame_size_enum *fse)
+{
+	struct sc635hai *sc635hai = to_sc635hai(sd);
+
+	if (fse->index >= sc635hai->cfg_num)
+		return -EINVAL;
+
+	if (fse->code != sc635hai->supported_modes[fse->index].bus_fmt)
+		return -EINVAL;
+
+	fse->min_width  = sc635hai->supported_modes[fse->index].width;
+	fse->max_width  = sc635hai->supported_modes[fse->index].width;
+	fse->min_height = sc635hai->supported_modes[fse->index].height;
+	fse->max_height = sc635hai->supported_modes[fse->index].height;
+
+	return 0;
+}
+
+static int sc635hai_enable_test_pattern(struct sc635hai *sc635hai, u32 pattern)
+{
+	u32 val = 0;
+	int ret = 0;
+
+	ret = sc635hai_read_reg(sc635hai->client, SC635HAI_REG_TEST_PATTERN,
+			       SC635HAI_REG_VALUE_08BIT, &val);
+	if (pattern)
+		val |= SC635HAI_TEST_PATTERN_BIT_MASK;
+	else
+		val &= ~SC635HAI_TEST_PATTERN_BIT_MASK;
+
+	ret |= sc635hai_write_reg(sc635hai->client, SC635HAI_REG_TEST_PATTERN,
+				 SC635HAI_REG_VALUE_08BIT, val);
+	return ret;
+}
+
+static int sc635hai_g_frame_interval(struct v4l2_subdev *sd,
+				    struct v4l2_subdev_frame_interval *fi)
+{
+	struct sc635hai *sc635hai = to_sc635hai(sd);
+	const struct sc635hai_mode *mode = sc635hai->cur_mode;
+
+	if (sc635hai->streaming)
+		fi->interval = sc635hai->cur_fps;
+	else
+		fi->interval = mode->max_fps;
+	return 0;
+}
+
+static const struct sc635hai_mode *sc635hai_find_mode(struct sc635hai *sc635hai, int fps)
+{
+	const struct sc635hai_mode *mode = NULL;
+	const struct sc635hai_mode *match = NULL;
+	int cur_fps = 0;
+	int i = 0;
+
+	for (i = 0; i < sc635hai->cfg_num; i++) {
+		mode = &sc635hai->supported_modes[i];
+		if (mode->width == sc635hai->cur_mode->width &&
+		    mode->height == sc635hai->cur_mode->height &&
+		    mode->hdr_mode == sc635hai->cur_mode->hdr_mode &&
+		    mode->bus_fmt == sc635hai->cur_mode->bus_fmt) {
+			cur_fps = DIV_ROUND_CLOSEST(mode->max_fps.denominator,
+						    mode->max_fps.numerator);
+			if (cur_fps == fps) {
+				match = mode;
+				break;
+			}
+		}
+	}
+	return match;
+}
+
+static int sc635hai_s_frame_interval(struct v4l2_subdev *sd,
+				    struct v4l2_subdev_frame_interval *fi)
+{
+	struct sc635hai *sc635hai = to_sc635hai(sd);
+	const struct sc635hai_mode *mode = NULL;
+	struct v4l2_fract *fract = &fi->interval;
+	s64 h_blank, vblank_def;
+	u64 pixel_rate = 0;
+	int fps;
+
+	if (sc635hai->streaming)
+		return -EBUSY;
+
+	if (fi->pad != 0)
+		return -EINVAL;
+
+	if (fract->numerator == 0) {
+		v4l2_err(sd, "error param, check interval param\n");
+		return -EINVAL;
+	}
+	fps = DIV_ROUND_CLOSEST(fract->denominator, fract->numerator);
+	mode = sc635hai_find_mode(sc635hai, fps);
+	if (mode == NULL) {
+		v4l2_err(sd, "couldn't match fi\n");
+		return -EINVAL;
+	}
+
+	sc635hai->cur_mode = mode;
+
+	h_blank = mode->hts_def - mode->width;
+	__v4l2_ctrl_modify_range(sc635hai->hblank, h_blank,
+				 h_blank, 1, h_blank);
+	vblank_def = mode->vts_def - mode->height;
+	__v4l2_ctrl_modify_range(sc635hai->vblank, vblank_def,
+				 SC635HAI_VTS_MAX - mode->height,
+				 1, vblank_def);
+	pixel_rate = (u32)link_freq_menu_items[mode->link_freq_idx] /
+		     mode->bpp * 2 * mode->lanes;
+
+	__v4l2_ctrl_s_ctrl_int64(sc635hai->pixel_rate,
+				 pixel_rate);
+	__v4l2_ctrl_s_ctrl(sc635hai->link_freq,
+			   mode->link_freq_idx);
+	sc635hai->cur_fps = mode->max_fps;
+
+	return 0;
+}
+
+static int sc635hai_g_mbus_config(struct v4l2_subdev *sd,
+				 unsigned int pad_id,
+				 struct v4l2_mbus_config *config)
+{
+	struct sc635hai *sc635hai = to_sc635hai(sd);
+	u8 lanes = sc635hai->bus_cfg.bus.mipi_csi2.num_data_lanes;
+
+	config->type = V4L2_MBUS_CSI2_DPHY;
+	config->bus.mipi_csi2.num_data_lanes = lanes;
+
+	return 0;
+}
+
+static void sc635hai_get_module_inf(struct sc635hai *sc635hai,
+				   struct rkmodule_inf *inf)
+{
+	memset(inf, 0, sizeof(*inf));
+	strscpy(inf->base.sensor, SC635HAI_NAME, sizeof(inf->base.sensor));
+	strscpy(inf->base.module, sc635hai->module_name,
+		sizeof(inf->base.module));
+	strscpy(inf->base.lens, sc635hai->len_name, sizeof(inf->base.lens));
+}
+
+static int sc635hai_set_setting(struct sc635hai *sc635hai, struct rk_sensor_setting *setting)
+{
+	int i = 0;
+	int cur_fps = 0;
+	s64 h_blank, vblank_def;
+	u64 pixel_rate = 0;
+	const struct sc635hai_mode *mode = NULL;
+	const struct sc635hai_mode *match = NULL;
+	u8 lane = sc635hai->bus_cfg.bus.mipi_csi2.num_data_lanes;
+
+	dev_info(&sc635hai->client->dev,
+		 "sensor setting: %d x %d, fps:%d fmt:%d, mode:%d\n",
+		 setting->width, setting->height,
+		 setting->fps, setting->fmt, setting->mode);
+
+	for (i = 0; i < sc635hai->cfg_num; i++) {
+		mode = &sc635hai->supported_modes[i];
+		if (mode->width == setting->width &&
+		    mode->height == setting->height &&
+		    mode->hdr_mode == setting->mode &&
+		    mode->bus_fmt == setting->fmt) {
+			cur_fps = DIV_ROUND_CLOSEST(mode->max_fps.denominator,
+						    mode->max_fps.numerator);
+			if (cur_fps == setting->fps) {
+				match = mode;
+				break;
+			}
+		}
+	}
+
+	if (match) {
+		dev_info(&sc635hai->client->dev, "-----%s: match the support mode, mode idx:%d-----\n",
+			 __func__, i);
+		sc635hai->cur_mode = mode;
+
+		h_blank = mode->hts_def - mode->width;
+		__v4l2_ctrl_modify_range(sc635hai->hblank, h_blank,
+					 h_blank, 1, h_blank);
+		vblank_def = mode->vts_def - mode->height;
+		__v4l2_ctrl_modify_range(sc635hai->vblank, vblank_def,
+					 SC635HAI_VTS_MAX - mode->height,
+					 1, vblank_def);
+
+
+		__v4l2_ctrl_s_ctrl(sc635hai->link_freq, mode->link_freq_idx);
+		pixel_rate = (u32)link_freq_menu_items[mode->link_freq_idx] /
+			     mode->bpp * 2 * lane;
+		__v4l2_ctrl_s_ctrl_int64(sc635hai->pixel_rate, pixel_rate);
+		dev_info(&sc635hai->client->dev, "freq_idx:%d pixel_rate:%lld\n",
+			 mode->link_freq_idx, pixel_rate);
+
+		sc635hai->cur_vts = mode->vts_def;
+		sc635hai->cur_fps = mode->max_fps;
+
+		dev_info(&sc635hai->client->dev, "hts_def:%d cur_vts:%d cur_fps:%d\n",
+			 mode->hts_def, mode->vts_def,
+			 sc635hai->cur_fps.denominator / sc635hai->cur_fps.numerator);
+	} else {
+		dev_err(&sc635hai->client->dev, "couldn't match the support modes\n");
+		return -EINVAL;
+	}
+
+	return 0;
+}
+
+static int sc635hai_adjust_time(struct sc635hai *sc635hai)
+{
+	int ret = 0;
+	u32 val;
+
+	/* Read and modify register 0x36e9 */
+	ret |= sc635hai_read_reg(sc635hai->client, 0x36e9, SC635HAI_REG_VALUE_08BIT, &val);
+	val |= 0x80;
+	ret |= sc635hai_write_reg(sc635hai->client, 0x36e9, SC635HAI_REG_VALUE_08BIT, val);
+
+	/* Read and modify register 0x36f9 */
+	ret |= sc635hai_read_reg(sc635hai->client, 0x36f9, SC635HAI_REG_VALUE_08BIT, &val);
+	val |= 0x80;
+	ret |= sc635hai_write_reg(sc635hai->client, 0x36f9, SC635HAI_REG_VALUE_08BIT, val);
+
+	return ret;
+}
+
+static long sc635hai_ioctl(struct v4l2_subdev *sd, unsigned int cmd, void *arg)
+{
+	struct sc635hai *sc635hai = to_sc635hai(sd);
+	struct rkmodule_hdr_cfg *hdr;
+	struct rk_sensor_setting *setting;
+	u32 i, h, w;
+	long ret = 0;
+	u32 stream = 0;
+	u64 dst_link_freq = 0;
+	u64 dst_pixel_rate = 0;
+	u8 lanes = sc635hai->bus_cfg.bus.mipi_csi2.num_data_lanes;
+	const struct sc635hai_mode *mode;
+	int cur_best_fit = -1;
+	int cur_best_fit_dist = -1;
+	int cur_dist, cur_fps, dst_fps;
+
+	switch (cmd) {
+	case RKMODULE_GET_MODULE_INFO:
+		sc635hai_get_module_inf(sc635hai, (struct rkmodule_inf *)arg);
+		break;
+	case RKMODULE_GET_HDR_CFG:
+		hdr = (struct rkmodule_hdr_cfg *)arg;
+		hdr->esp.mode = HDR_NORMAL_VC;
+		hdr->hdr_mode = sc635hai->cur_mode->hdr_mode;
+		break;
+	case RKMODULE_SET_HDR_CFG:
+		hdr = (struct rkmodule_hdr_cfg *)arg;
+		if (hdr->hdr_mode == sc635hai->cur_mode->hdr_mode)
+			return 0;
+		w = sc635hai->cur_mode->width;
+		h = sc635hai->cur_mode->height;
+		dst_fps = DIV_ROUND_CLOSEST(sc635hai->cur_mode->max_fps.denominator,
+					    sc635hai->cur_mode->max_fps.numerator);
+		for (i = 0; i < sc635hai->cfg_num; i++) {
+			if (w == sc635hai->supported_modes[i].width &&
+			    h == sc635hai->supported_modes[i].height &&
+			    sc635hai->supported_modes[i].hdr_mode == hdr->hdr_mode &&
+			    sc635hai->supported_modes[i].bus_fmt == sc635hai->cur_mode->bus_fmt) {
+				cur_fps = DIV_ROUND_CLOSEST(sc635hai->supported_modes[i].max_fps.denominator,
+							    sc635hai->supported_modes[i].max_fps.numerator);
+				cur_dist = abs(cur_fps - dst_fps);
+				if (cur_best_fit_dist == -1 || cur_dist < cur_best_fit_dist) {
+					cur_best_fit_dist = cur_dist;
+					cur_best_fit = i;
+				} else if (cur_dist == cur_best_fit_dist) {
+					cur_best_fit = i;
+					break;
+				}
+			}
+		}
+		if (cur_best_fit == -1) {
+			dev_err(&sc635hai->client->dev,
+				"not find hdr mode:%d %dx%d config\n",
+				hdr->hdr_mode, w, h);
+			ret = -EINVAL;
+		} else {
+			sc635hai->cur_mode = &sc635hai->supported_modes[cur_best_fit];
+			mode = sc635hai->cur_mode;
+			w = mode->hts_def - mode->width;
+			h = mode->vts_def - mode->height;
+			__v4l2_ctrl_modify_range(sc635hai->hblank, w, w, 1, w);
+			__v4l2_ctrl_modify_range(sc635hai->vblank, h,
+						 SC635HAI_VTS_MAX - sc635hai->cur_mode->height, 1, h);
+			sc635hai->cur_fps = sc635hai->cur_mode->max_fps;
+
+			dst_link_freq = mode->link_freq_idx;
+			dst_pixel_rate = (u32)link_freq_menu_items[mode->link_freq_idx] /
+					 mode->bpp * 2 * lanes;
+			__v4l2_ctrl_s_ctrl_int64(sc635hai->pixel_rate,
+						 dst_pixel_rate);
+			__v4l2_ctrl_s_ctrl(sc635hai->link_freq,
+					   dst_link_freq);
+		}
+		break;
+	case PREISP_CMD_SET_HDRAE_EXP:
+		sc635hai_set_hdrae(sc635hai, arg);
+		if (sc635hai->cam_sw_inf)
+			memcpy(&sc635hai->cam_sw_inf->hdr_ae, (struct preisp_hdrae_exp_s *)(arg),
+			       sizeof(struct preisp_hdrae_exp_s));
+		break;
+	case RKMODULE_SET_QUICK_STREAM:
+
+		stream = *((u32 *)arg);
+
+		if (sc635hai->standby_hw) {	/* hardware standby */
+			if (stream) {
+				sc635hai->is_standby = false;
+				/* pwdn gpio pull up */
+				if (!IS_ERR(sc635hai->pwdn_gpio))
+					gpiod_set_value_cansleep(sc635hai->pwdn_gpio, 1);
+				// Make sure __v4l2_ctrl_handler_setup can be called correctly
+				usleep_range(4000, 5000);
+				/* mipi clk on */
+				ret |= sc635hai_write_reg(sc635hai->client, SC635HAI_REG_MIPI_CTRL,
+							 SC635HAI_REG_VALUE_08BIT,
+							 SC635HAI_MIPI_CTRL_ON);
+				/* adjust timing */
+				ret |= sc635hai_adjust_time(sc635hai);
+
+#if IS_REACHABLE(CONFIG_VIDEO_CAM_SLEEP_WAKEUP)
+				if (__v4l2_ctrl_handler_setup(&sc635hai->ctrl_handler))
+					dev_err(&sc635hai->client->dev, "__v4l2_ctrl_handler_setup fail!");
+				/* Check if the current mode is HDR and cam sw info is available */
+				if (sc635hai->cur_mode->hdr_mode != NO_HDR && sc635hai->cam_sw_inf) {
+					ret = sc635hai_ioctl(&sc635hai->subdev,
+							    PREISP_CMD_SET_HDRAE_EXP,
+							    &sc635hai->cam_sw_inf->hdr_ae);
+					if (ret) {
+						dev_err(&sc635hai->client->dev,
+							"Failed init exp fail in hdr mode\n");
+						return ret;
+					}
+
+				}
+#endif
+
+				/* stream on */
+				ret |= sc635hai_write_reg(sc635hai->client, SC635HAI_REG_CTRL_MODE,
+							 SC635HAI_REG_VALUE_08BIT,
+							 SC635HAI_MODE_STREAMING);
+				dev_info(&sc635hai->client->dev,
+					 "quickstream, streaming on: exit hw standby mode\n");
+			} else {
+				/* adjust timing */
+				ret |= sc635hai_adjust_time(sc635hai);
+
+				/* stream off */
+				ret |= sc635hai_write_reg(sc635hai->client, SC635HAI_REG_CTRL_MODE,
+							 SC635HAI_REG_VALUE_08BIT,
+							 SC635HAI_MODE_SW_STANDBY);
+				/* mipi clk off */
+				ret |= sc635hai_write_reg(sc635hai->client, SC635HAI_REG_MIPI_CTRL,
+							 SC635HAI_REG_VALUE_08BIT,
+							 SC635HAI_MIPI_CTRL_OFF);
+
+				sc635hai->is_standby = true;
+				/* pwnd gpio pull down */
+				if (!IS_ERR(sc635hai->pwdn_gpio))
+					gpiod_set_value_cansleep(sc635hai->pwdn_gpio, 0);
+				dev_info(&sc635hai->client->dev,
+					 "quickstream, streaming off: enter hw standby mode\n");
+			}
+		} else {	/* software standby */
+			if (stream) {
+				ret |= sc635hai_write_reg(sc635hai->client, SC635HAI_REG_MIPI_CTRL,
+							 SC635HAI_REG_VALUE_08BIT,
+							 SC635HAI_MIPI_CTRL_ON);
+				ret |= sc635hai_write_reg(sc635hai->client, SC635HAI_REG_CTRL_MODE,
+							 SC635HAI_REG_VALUE_08BIT,
+							 SC635HAI_MODE_STREAMING);
+				dev_info(&sc635hai->client->dev,
+					 "quickstream, streaming on: exit soft standby mode\n");
+			} else {
+				ret |= sc635hai_write_reg(sc635hai->client, SC635HAI_REG_CTRL_MODE,
+							 SC635HAI_REG_VALUE_08BIT,
+							 SC635HAI_MODE_SW_STANDBY);
+				ret |= sc635hai_write_reg(sc635hai->client, SC635HAI_REG_MIPI_CTRL,
+							 SC635HAI_REG_VALUE_08BIT,
+							 SC635HAI_MIPI_CTRL_OFF);
+				dev_info(&sc635hai->client->dev,
+					 "quickstream, streaming off: enter soft standby mode\n");
+			}
+		}
+		break;
+	case RKCIS_CMD_SELECT_SETTING:
+		setting = (struct rk_sensor_setting *)arg;
+		ret = sc635hai_set_setting(sc635hai, setting);
+		break;
+	default:
+		ret = -ENOIOCTLCMD;
+		break;
+	}
+
+	return ret;
+}
+
+
+#ifdef CONFIG_COMPAT
+static long sc635hai_compat_ioctl32(struct v4l2_subdev *sd,
+				   unsigned int cmd, unsigned long arg)
+{
+	void __user *up = compat_ptr(arg);
+	struct rkmodule_inf *inf;
+	struct rkmodule_hdr_cfg *hdr;
+	struct preisp_hdrae_exp_s *hdrae;
+	struct rk_sensor_setting *setting;
+	struct rk_light_param *light_param;
+	long ret;
+	u32 stream = 0;
+
+	switch (cmd) {
+	case RKMODULE_GET_MODULE_INFO:
+		inf = kzalloc(sizeof(*inf), GFP_KERNEL);
+		if (!inf) {
+			ret = -ENOMEM;
+			return ret;
+		}
+
+		ret = sc635hai_ioctl(sd, cmd, inf);
+		if (!ret) {
+			if (copy_to_user(up, inf, sizeof(*inf)))
+				ret = -EFAULT;
+		}
+		kfree(inf);
+		break;
+	case RKMODULE_GET_HDR_CFG:
+		hdr = kzalloc(sizeof(*hdr), GFP_KERNEL);
+		if (!hdr) {
+			ret = -ENOMEM;
+			return ret;
+		}
+
+		ret = sc635hai_ioctl(sd, cmd, hdr);
+		if (!ret) {
+			if (copy_to_user(up, hdr, sizeof(*hdr)))
+				ret = -EFAULT;
+		}
+		kfree(hdr);
+		break;
+	case RKMODULE_SET_HDR_CFG:
+		hdr = kzalloc(sizeof(*hdr), GFP_KERNEL);
+		if (!hdr) {
+			ret = -ENOMEM;
+			return ret;
+		}
+
+		ret = copy_from_user(hdr, up, sizeof(*hdr));
+		if (!ret)
+			ret = sc635hai_ioctl(sd, cmd, hdr);
+		else
+			ret = -EFAULT;
+		kfree(hdr);
+		break;
+	case PREISP_CMD_SET_HDRAE_EXP:
+		hdrae = kzalloc(sizeof(*hdrae), GFP_KERNEL);
+		if (!hdrae) {
+			ret = -ENOMEM;
+			return ret;
+		}
+
+		ret = copy_from_user(hdrae, up, sizeof(*hdrae));
+		if (!ret)
+			ret = sc635hai_ioctl(sd, cmd, hdrae);
+		else
+			ret = -EFAULT;
+		kfree(hdrae);
+		break;
+	case RKMODULE_SET_QUICK_STREAM:
+		ret = copy_from_user(&stream, up, sizeof(u32));
+		if (!ret)
+			ret = sc635hai_ioctl(sd, cmd, &stream);
+		else
+			ret = -EFAULT;
+		break;
+	case RKCIS_CMD_SELECT_SETTING:
+		setting = kzalloc(sizeof(*setting), GFP_KERNEL);
+		if (!setting) {
+			ret = -ENOMEM;
+			return ret;
+		}
+
+		ret = copy_from_user(setting, up, sizeof(*setting));
+		if (!ret)
+			ret = sc635hai_ioctl(sd, cmd, setting);
+		else
+			ret = -EFAULT;
+		kfree(setting);
+		break;
+	case RKCIS_CMD_FLASH_LIGHT_CTRL:
+		light_param = kzalloc(sizeof(*light_param), GFP_KERNEL);
+		if (!light_param) {
+			ret = -ENOMEM;
+			return ret;
+		}
+
+		ret = copy_from_user(light_param, up, sizeof(*light_param));
+		if (!ret)
+			ret = sc635hai_ioctl(sd, cmd, light_param);
+		else
+			ret = -EFAULT;
+		kfree(light_param);
+		break;
+	default:
+		ret = -ENOIOCTLCMD;
+		break;
+	}
+
+	return ret;
+}
+#endif
+
+static int __sc635hai_start_stream(struct sc635hai *sc635hai)
+{
+	int ret;
+
+	if (!sc635hai->is_thunderboot) {
+		ret = sc635hai_write_array(sc635hai->client, sc635hai->cur_mode->reg_list);
+		if (ret)
+			return ret;
+		/* In case these controls are set before streaming */
+		ret = __v4l2_ctrl_handler_setup(&sc635hai->ctrl_handler);
+		if (ret)
+			return ret;
+		if (sc635hai->has_init_exp && sc635hai->cur_mode->hdr_mode != NO_HDR) {
+			ret = sc635hai_ioctl(&sc635hai->subdev, PREISP_CMD_SET_HDRAE_EXP,
+					    &sc635hai->init_hdrae_exp);
+			if (ret) {
+				dev_err(&sc635hai->client->dev,
+					"init exp fail in hdr mode\n");
+				return ret;
+			}
+		}
+	}
+	ret = sc635hai_write_reg(sc635hai->client, SC635HAI_REG_CTRL_MODE,
+				SC635HAI_REG_VALUE_08BIT, SC635HAI_MODE_STREAMING);
+	return ret;
+}
+
+static int __sc635hai_stop_stream(struct sc635hai *sc635hai)
+{
+	sc635hai->has_init_exp = false;
+	if (sc635hai->is_thunderboot)
+		sc635hai->is_first_streamoff = true;
+	return sc635hai_write_reg(sc635hai->client, SC635HAI_REG_CTRL_MODE,
+				 SC635HAI_REG_VALUE_08BIT, SC635HAI_MODE_SW_STANDBY);
+}
+
+/* Calculate the delay in us by clock rate and clock cycles */
+static inline u32 sc635hai_cal_delay(u32 cycles, struct sc635hai *sc635hai)
+{
+	return DIV_ROUND_UP(cycles, sc635hai->cur_mode->mclk / 1000 / 1000);
+}
+
+static int __sc635hai_power_on(struct sc635hai *sc635hai)
+{
+	int ret;
+	u32 delay_us;
+	struct device *dev = &sc635hai->client->dev;
+
+	if (!IS_ERR_OR_NULL(sc635hai->pins_default)) {
+		ret = pinctrl_select_state(sc635hai->pinctrl,
+					   sc635hai->pins_default);
+		if (ret < 0)
+			dev_err(dev, "could not set pins\n");
+	}
+	ret = clk_set_rate(sc635hai->xvclk, sc635hai->cur_mode->mclk);
+	if (ret < 0)
+		dev_warn(dev, "Failed to set xvclk rate (%dHz)\n", sc635hai->cur_mode->mclk);
+	if (clk_get_rate(sc635hai->xvclk) != sc635hai->cur_mode->mclk)
+		dev_warn(dev, "xvclk mismatched, modes are based on %dHz\n",
+			 sc635hai->cur_mode->mclk);
+	ret = clk_prepare_enable(sc635hai->xvclk);
+	if (ret < 0) {
+		dev_err(dev, "Failed to enable xvclk\n");
+		return ret;
+	}
+
+	cam_sw_regulator_bulk_init(sc635hai->cam_sw_inf, SC635HAI_NUM_SUPPLIES, sc635hai->supplies);
+
+	if (sc635hai->is_thunderboot)
+		return 0;
+
+	if (!IS_ERR(sc635hai->reset_gpio))
+		gpiod_set_value_cansleep(sc635hai->reset_gpio, 0);
+
+	ret = regulator_bulk_enable(SC635HAI_NUM_SUPPLIES, sc635hai->supplies);
+	if (ret < 0) {
+		dev_err(dev, "Failed to enable regulators\n");
+		goto disable_clk;
+	}
+
+	if (!IS_ERR(sc635hai->reset_gpio))
+		gpiod_set_value_cansleep(sc635hai->reset_gpio, 1);
+
+	usleep_range(500, 1000);
+
+	if (!IS_ERR(sc635hai->pwdn_gpio))
+		gpiod_set_value_cansleep(sc635hai->pwdn_gpio, 1);
+
+	if (!IS_ERR(sc635hai->reset_gpio))
+		usleep_range(6000, 8000);
+	else
+		usleep_range(12000, 16000);
+
+	/* 8192 cycles prior to first SCCB transaction */
+	delay_us = sc635hai_cal_delay(8192, sc635hai);
+	usleep_range(delay_us, delay_us * 2);
+
+	return 0;
+
+disable_clk:
+	clk_disable_unprepare(sc635hai->xvclk);
+
+	return ret;
+}
+
+static void __sc635hai_power_off(struct sc635hai *sc635hai)
+{
+	int ret;
+	struct device *dev = &sc635hai->client->dev;
+
+	clk_disable_unprepare(sc635hai->xvclk);
+	if (sc635hai->is_thunderboot) {
+		if (sc635hai->is_first_streamoff) {
+			sc635hai->is_thunderboot = false;
+			sc635hai->is_first_streamoff = false;
+		} else {
+			return;
+		}
+	}
+
+	if (!IS_ERR(sc635hai->pwdn_gpio))
+		gpiod_set_value_cansleep(sc635hai->pwdn_gpio, 0);
+	clk_disable_unprepare(sc635hai->xvclk);
+	if (!IS_ERR(sc635hai->reset_gpio))
+		gpiod_set_value_cansleep(sc635hai->reset_gpio, 0);
+	if (!IS_ERR_OR_NULL(sc635hai->pins_sleep)) {
+		ret = pinctrl_select_state(sc635hai->pinctrl,
+					   sc635hai->pins_sleep);
+		if (ret < 0)
+			dev_dbg(dev, "could not set pins\n");
+	}
+	regulator_bulk_disable(SC635HAI_NUM_SUPPLIES, sc635hai->supplies);
+}
+
+static int sc635hai_s_stream(struct v4l2_subdev *sd, int on)
+{
+	struct sc635hai *sc635hai = to_sc635hai(sd);
+	struct i2c_client *client = sc635hai->client;
+	int ret = 0;
+
+	mutex_lock(&sc635hai->mutex);
+
+	on = !!on;
+	if (on == sc635hai->streaming)
+		goto unlock_and_return;
+
+	if (on) {
+		if (sc635hai->is_thunderboot && rkisp_tb_get_state() == RKISP_TB_NG) {
+			sc635hai->is_thunderboot = false;
+			__sc635hai_power_on(sc635hai);
+		}
+		ret = pm_runtime_get_sync(&client->dev);
+		if (ret < 0) {
+			pm_runtime_put_noidle(&client->dev);
+			goto unlock_and_return;
+		}
+		ret = __sc635hai_start_stream(sc635hai);
+		if (ret) {
+			v4l2_err(sd, "start stream failed while write regs\n");
+			pm_runtime_put(&client->dev);
+			goto unlock_and_return;
+		}
+	} else {
+		__sc635hai_stop_stream(sc635hai);
+		pm_runtime_put(&client->dev);
+	}
+
+	sc635hai->streaming = on;
+unlock_and_return:
+	mutex_unlock(&sc635hai->mutex);
+	return ret;
+}
+
+static int sc635hai_s_power(struct v4l2_subdev *sd, int on)
+{
+	struct sc635hai *sc635hai = to_sc635hai(sd);
+	struct i2c_client *client = sc635hai->client;
+	int ret = 0;
+
+	mutex_lock(&sc635hai->mutex);
+
+	/* If the power state is not modified - no work to do. */
+	if (sc635hai->power_on == !!on)
+		goto unlock_and_return;
+
+	if (on) {
+		ret = pm_runtime_get_sync(&client->dev);
+		if (ret < 0) {
+			pm_runtime_put_noidle(&client->dev);
+			goto unlock_and_return;
+		}
+
+		if (!sc635hai->is_thunderboot) {
+			ret = sc635hai_write_array(sc635hai->client,
+						  sc635hai->cur_mode->global_reg_list);
+			if (ret) {
+				v4l2_err(sd, "could not set init registers\n");
+				pm_runtime_put_noidle(&client->dev);
+				goto unlock_and_return;
+			}
+		}
+
+		sc635hai->power_on = true;
+	} else {
+		pm_runtime_put(&client->dev);
+		sc635hai->power_on = false;
+	}
+
+unlock_and_return:
+	mutex_unlock(&sc635hai->mutex);
+
+	return ret;
+}
+
+#if IS_REACHABLE(CONFIG_VIDEO_CAM_SLEEP_WAKEUP)
+static int __maybe_unused sc635hai_resume(struct device *dev)
+{
+	int ret;
+	struct i2c_client *client = to_i2c_client(dev);
+	struct v4l2_subdev *sd = i2c_get_clientdata(client);
+	struct sc635hai *sc635hai = to_sc635hai(sd);
+
+	if (sc635hai->standby_hw) {
+		dev_info(dev, "resume standby!");
+		return 0;
+	}
+
+	cam_sw_prepare_wakeup(sc635hai->cam_sw_inf, dev);
+	usleep_range(4000, 5000);
+	cam_sw_write_array(sc635hai->cam_sw_inf);
+
+	if (__v4l2_ctrl_handler_setup(&sc635hai->ctrl_handler))
+		dev_err(dev, "__v4l2_ctrl_handler_setup fail!");
+
+	if (sc635hai->has_init_exp && sc635hai->cur_mode != NO_HDR) {	// hdr mode
+		ret = sc635hai_ioctl(&sc635hai->subdev, PREISP_CMD_SET_HDRAE_EXP,
+				    &sc635hai->cam_sw_inf->hdr_ae);
+		if (ret) {
+			dev_err(&sc635hai->client->dev, "set exp fail in hdr mode\n");
+			return ret;
+		}
+	}
+
+	return 0;
+}
+
+static int __maybe_unused sc635hai_suspend(struct device *dev)
+{
+	struct i2c_client *client = to_i2c_client(dev);
+	struct v4l2_subdev *sd = i2c_get_clientdata(client);
+	struct sc635hai *sc635hai = to_sc635hai(sd);
+
+	if (sc635hai->standby_hw) {
+		dev_info(dev, "suspend standby!");
+		return 0;
+	}
+
+	cam_sw_write_array_cb_init(sc635hai->cam_sw_inf, client,
+				   (void *)sc635hai->cur_mode->reg_list,
+				   (sensor_write_array)sc635hai_write_array);
+	cam_sw_prepare_sleep(sc635hai->cam_sw_inf);
+
+	return 0;
+}
+#else
+#define sc635hai_resume NULL
+#define sc635hai_suspend NULL
+#endif
+
+static int __maybe_unused sc635hai_runtime_resume(struct device *dev)
+{
+	struct i2c_client *client = to_i2c_client(dev);
+	struct v4l2_subdev *sd = i2c_get_clientdata(client);
+	struct sc635hai *sc635hai = to_sc635hai(sd);
+
+	return __sc635hai_power_on(sc635hai);
+}
+
+static int __maybe_unused sc635hai_runtime_suspend(struct device *dev)
+{
+	struct i2c_client *client = to_i2c_client(dev);
+	struct v4l2_subdev *sd = i2c_get_clientdata(client);
+	struct sc635hai *sc635hai = to_sc635hai(sd);
+
+	__sc635hai_power_off(sc635hai);
+
+	return 0;
+}
+
+#ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
+static int sc635hai_open(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh)
+{
+	struct sc635hai *sc635hai = to_sc635hai(sd);
+	struct v4l2_mbus_framefmt *try_fmt =
+		v4l2_subdev_get_try_format(sd, fh->state, 0);
+	const struct sc635hai_mode *def_mode = &sc635hai->supported_modes[0];
+
+	mutex_lock(&sc635hai->mutex);
+	/* Initialize try_fmt */
+	try_fmt->width = def_mode->width;
+	try_fmt->height = def_mode->height;
+	try_fmt->code = def_mode->bus_fmt;
+	try_fmt->field = V4L2_FIELD_NONE;
+
+	mutex_unlock(&sc635hai->mutex);
+	/* No crop or compose */
+
+	return 0;
+}
+#endif
+
+static int sc635hai_enum_frame_interval(struct v4l2_subdev *sd,
+				       struct v4l2_subdev_state *sd_state,
+				       struct v4l2_subdev_frame_interval_enum *fie)
+{
+	struct sc635hai *sc635hai = to_sc635hai(sd);
+
+	if (fie->index >= sc635hai->cfg_num)
+		return -EINVAL;
+
+	fie->code = sc635hai->supported_modes[fie->index].bus_fmt;
+	fie->width = sc635hai->supported_modes[fie->index].width;
+	fie->height = sc635hai->supported_modes[fie->index].height;
+	fie->interval = sc635hai->supported_modes[fie->index].max_fps;
+	fie->reserved[0] = sc635hai->supported_modes[fie->index].hdr_mode;
+	return 0;
+}
+
+static const struct dev_pm_ops sc635hai_pm_ops = {
+	SET_RUNTIME_PM_OPS(sc635hai_runtime_suspend,
+	sc635hai_runtime_resume, NULL)
+#ifdef CONFIG_VIDEO_CAM_SLEEP_WAKEUP
+	SET_LATE_SYSTEM_SLEEP_PM_OPS(sc635hai_suspend, sc635hai_resume)
+#endif
+};
+
+#ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
+static const struct v4l2_subdev_internal_ops sc635hai_internal_ops = {
+	.open = sc635hai_open,
+};
+#endif
+
+static const struct v4l2_subdev_core_ops sc635hai_core_ops = {
+	.s_power = sc635hai_s_power,
+	.ioctl = sc635hai_ioctl,
+#ifdef CONFIG_COMPAT
+	.compat_ioctl32 = sc635hai_compat_ioctl32,
+#endif
+};
+
+static const struct v4l2_subdev_video_ops sc635hai_video_ops = {
+	.s_stream = sc635hai_s_stream,
+	.g_frame_interval = sc635hai_g_frame_interval,
+	.s_frame_interval = sc635hai_s_frame_interval,
+};
+
+static const struct v4l2_subdev_pad_ops sc635hai_pad_ops = {
+	.enum_mbus_code = sc635hai_enum_mbus_code,
+	.enum_frame_size = sc635hai_enum_frame_sizes,
+	.enum_frame_interval = sc635hai_enum_frame_interval,
+	.get_fmt = sc635hai_get_fmt,
+	.set_fmt = sc635hai_set_fmt,
+	.get_mbus_config = sc635hai_g_mbus_config,
+};
+
+static const struct v4l2_subdev_ops sc635hai_subdev_ops = {
+	.core	= &sc635hai_core_ops,
+	.video	= &sc635hai_video_ops,
+	.pad	= &sc635hai_pad_ops,
+};
+
+static void sc635hai_modify_fps_info(struct sc635hai *sc635hai)
+{
+	const struct sc635hai_mode *mode = sc635hai->cur_mode;
+
+	sc635hai->cur_fps.denominator = mode->max_fps.denominator * mode->vts_def /
+				       sc635hai->cur_vts;
+}
+
+static int sc635hai_set_ctrl(struct v4l2_ctrl *ctrl)
+{
+	struct sc635hai *sc635hai = container_of(ctrl->handler,
+					       struct sc635hai, ctrl_handler);
+	struct i2c_client *client = sc635hai->client;
+	s64 max;
+	int ret = 0;
+	u32 val = 0;
+
+	/* Propagate change of current control to all related controls */
+	switch (ctrl->id) {
+	case V4L2_CID_VBLANK:
+		/* Update max exposure while meeting expected vblanking */
+		max = sc635hai->cur_mode->height + ctrl->val - 8;
+		__v4l2_ctrl_modify_range(sc635hai->exposure,
+					 sc635hai->exposure->minimum, max,
+					 sc635hai->exposure->step,
+					 sc635hai->exposure->default_value);
+		break;
+	}
+
+	if (sc635hai->standby_hw && sc635hai->is_standby) {
+		dev_dbg(&client->dev, "%s: is_standby = true, will return\n", __func__);
+		return 0;
+	}
+
+	if (!pm_runtime_get_if_in_use(&client->dev))
+		return 0;
+
+	switch (ctrl->id) {
+	case V4L2_CID_EXPOSURE:
+		dev_dbg(&client->dev, "set exposure 0x%x\n", ctrl->val);
+		if (sc635hai->cur_mode->hdr_mode == NO_HDR) {
+			/* 4 least significant bits of expsoure are fractional part */
+			ret = sc635hai_write_reg(sc635hai->client,
+						SC635HAI_REG_EXPOSURE_H,
+						SC635HAI_REG_VALUE_08BIT,
+						SC635HAI_FETCH_EXP_H(ctrl->val));
+			ret |= sc635hai_write_reg(sc635hai->client,
+						 SC635HAI_REG_EXPOSURE_M,
+						 SC635HAI_REG_VALUE_08BIT,
+						 SC635HAI_FETCH_EXP_M(ctrl->val));
+			ret |= sc635hai_write_reg(sc635hai->client,
+						 SC635HAI_REG_EXPOSURE_L,
+						 SC635HAI_REG_VALUE_08BIT,
+						 SC635HAI_FETCH_EXP_L(ctrl->val));
+		}
+		break;
+	case V4L2_CID_ANALOGUE_GAIN:
+		dev_dbg(&client->dev, "set gain 0x%x\n", ctrl->val);
+		if (sc635hai->cur_mode->hdr_mode == NO_HDR)
+			ret = sc635hai_set_gain_reg(sc635hai, ctrl->val, SC635HAI_LGAIN);
+		break;
+	case V4L2_CID_VBLANK:
+		dev_dbg(&client->dev, "set vblank 0x%x\n", ctrl->val);
+		ret = sc635hai_write_reg(sc635hai->client,
+					SC635HAI_REG_VTS_H,
+					SC635HAI_REG_VALUE_08BIT,
+					0x00);
+		ret |= sc635hai_write_reg(sc635hai->client,
+					 SC635HAI_REG_VTS_M,
+					 SC635HAI_REG_VALUE_08BIT,
+					 (ctrl->val + sc635hai->cur_mode->height) >> 8);
+		ret |= sc635hai_write_reg(sc635hai->client,
+					 SC635HAI_REG_VTS_L,
+					 SC635HAI_REG_VALUE_08BIT,
+					 (ctrl->val + sc635hai->cur_mode->height) & 0xff);
+		sc635hai->cur_vts = ctrl->val + sc635hai->cur_mode->height;
+		if (sc635hai->cur_vts != sc635hai->cur_mode->vts_def)
+			sc635hai_modify_fps_info(sc635hai);
+		break;
+	case V4L2_CID_TEST_PATTERN:
+		ret = sc635hai_enable_test_pattern(sc635hai, ctrl->val);
+		break;
+	case V4L2_CID_HFLIP:
+		ret = sc635hai_read_reg(sc635hai->client, SC635HAI_FLIP_MIRROR_REG,
+				       SC635HAI_REG_VALUE_08BIT, &val);
+		ret |= sc635hai_write_reg(sc635hai->client, SC635HAI_FLIP_MIRROR_REG,
+					 SC635HAI_REG_VALUE_08BIT,
+					 SC635HAI_FETCH_MIRROR(val, ctrl->val));
+		break;
+	case V4L2_CID_VFLIP:
+		ret = sc635hai_read_reg(sc635hai->client, SC635HAI_FLIP_MIRROR_REG,
+				       SC635HAI_REG_VALUE_08BIT, &val);
+		ret |= sc635hai_write_reg(sc635hai->client, SC635HAI_FLIP_MIRROR_REG,
+					 SC635HAI_REG_VALUE_08BIT,
+					 SC635HAI_FETCH_FLIP(val, ctrl->val));
+		break;
+	default:
+		dev_warn(&client->dev, "%s Unhandled id:0x%x, val:0x%x\n",
+			 __func__, ctrl->id, ctrl->val);
+		break;
+	}
+
+	pm_runtime_put(&client->dev);
+
+	return ret;
+}
+
+
+static const struct v4l2_ctrl_ops sc635hai_ctrl_ops = {
+	.s_ctrl = sc635hai_set_ctrl,
+};
+
+static int sc635hai_initialize_controls(struct sc635hai *sc635hai)
+{
+	const struct sc635hai_mode *mode;
+	struct v4l2_ctrl_handler *handler;
+	s64 exposure_max, vblank_def;
+	u32 h_blank;
+	int ret;
+	u64 dst_link_freq = 0;
+	u64 dst_pixel_rate = 0;
+	u8 lanes = sc635hai->bus_cfg.bus.mipi_csi2.num_data_lanes;
+
+	handler = &sc635hai->ctrl_handler;
+	mode = sc635hai->cur_mode;
+	ret = v4l2_ctrl_handler_init(handler, 9);
+	if (ret)
+		return ret;
+	handler->lock = &sc635hai->mutex;
+
+	sc635hai->link_freq = v4l2_ctrl_new_int_menu(handler, NULL,
+			     V4L2_CID_LINK_FREQ,
+			     ARRAY_SIZE(link_freq_menu_items) - 1,
+			     0, link_freq_menu_items);
+	if (sc635hai->link_freq)
+		sc635hai->link_freq->flags |= V4L2_CTRL_FLAG_READ_ONLY;
+
+	dst_link_freq = mode->link_freq_idx;
+	/* pixel rate = link frequency * 2 * lanes / BITS_PER_SAMPLE */
+	dst_pixel_rate = (u32)link_freq_menu_items[mode->link_freq_idx] /
+			 mode->bpp * 2 * lanes;
+	if (lanes == 2) {
+		sc635hai->pixel_rate = v4l2_ctrl_new_std(handler, NULL, V4L2_CID_PIXEL_RATE,
+							0, PIXEL_RATE_WITH_540M_10BIT_2L,
+							1, dst_pixel_rate);
+	} else if (lanes == 4) {
+		if (mode->hdr_mode == NO_HDR)
+			sc635hai->pixel_rate = v4l2_ctrl_new_std(handler, NULL, V4L2_CID_PIXEL_RATE,
+								0, PIXEL_RATE_WITH_540M_10BIT_4L,
+								1, dst_pixel_rate);
+		else if (mode->hdr_mode == HDR_X2)
+			sc635hai->pixel_rate = v4l2_ctrl_new_std(handler, NULL, V4L2_CID_PIXEL_RATE,
+								0, PIXEL_RATE_WITH_540M_10BIT_4L,
+								1, dst_pixel_rate);
+	}
+
+	__v4l2_ctrl_s_ctrl(sc635hai->link_freq, dst_link_freq);
+
+	h_blank = mode->hts_def - mode->width;
+	sc635hai->hblank = v4l2_ctrl_new_std(handler, NULL, V4L2_CID_HBLANK,
+					    h_blank, h_blank, 1, h_blank);
+	if (sc635hai->hblank)
+		sc635hai->hblank->flags |= V4L2_CTRL_FLAG_READ_ONLY;
+	vblank_def = mode->vts_def - mode->height;
+	sc635hai->vblank = v4l2_ctrl_new_std(handler, &sc635hai_ctrl_ops,
+					    V4L2_CID_VBLANK, vblank_def,
+					    SC635HAI_VTS_MAX - mode->height,
+					    1, vblank_def);
+	exposure_max = mode->vts_def - 8;
+	sc635hai->exposure = v4l2_ctrl_new_std(handler, &sc635hai_ctrl_ops,
+					      V4L2_CID_EXPOSURE, SC635HAI_EXPOSURE_MIN,
+					      exposure_max, SC635HAI_EXPOSURE_STEP,
+					      mode->exp_def); //Set default exposure
+	sc635hai->anal_gain = v4l2_ctrl_new_std(handler, &sc635hai_ctrl_ops,
+					       V4L2_CID_ANALOGUE_GAIN, SC635HAI_GAIN_MIN,
+					       SC635HAI_GAIN_MAX, SC635HAI_GAIN_STEP,
+					       SC635HAI_GAIN_DEFAULT); //Set default gain
+	sc635hai->test_pattern = v4l2_ctrl_new_std_menu_items(handler,
+				&sc635hai_ctrl_ops,
+				V4L2_CID_TEST_PATTERN,
+				ARRAY_SIZE(sc635hai_test_pattern_menu) - 1,
+				0, 0, sc635hai_test_pattern_menu);
+	v4l2_ctrl_new_std(handler, &sc635hai_ctrl_ops,
+			  V4L2_CID_HFLIP, 0, 1, 1, 0);
+	v4l2_ctrl_new_std(handler, &sc635hai_ctrl_ops,
+			  V4L2_CID_VFLIP, 0, 1, 1, 0);
+	if (handler->error) {
+		ret = handler->error;
+		dev_err(&sc635hai->client->dev,
+			"Failed to init controls(%d)\n", ret);
+		goto err_free_handler;
+	}
+
+	sc635hai->subdev.ctrl_handler = handler;
+	sc635hai->has_init_exp = false;
+	sc635hai->cur_fps = mode->max_fps;
+	sc635hai->is_standby = false;
+
+	return 0;
+
+err_free_handler:
+	v4l2_ctrl_handler_free(handler);
+
+	return ret;
+}
+
+static int sc635hai_check_sensor_id(struct sc635hai *sc635hai,
+				   struct i2c_client *client)
+{
+	struct device *dev = &sc635hai->client->dev;
+	u32 id = 0;
+	int ret;
+
+	if (sc635hai->is_thunderboot) {
+		dev_info(dev, "Enable thunderboot mode, skip sensor id check\n");
+		return 0;
+	}
+
+	ret = sc635hai_read_reg(client, SC635HAI_REG_CHIP_ID,
+			       SC635HAI_REG_VALUE_16BIT, &id);
+	if (id != CHIP_ID) {
+		dev_err(dev, "Unexpected sensor id(%06x), ret(%d)\n", id, ret);
+		return -ENODEV;
+	}
+
+	dev_info(dev, "Detected SC635HAI (0x%04x) sensor\n", CHIP_ID);
+
+	return 0;
+}
+
+static int sc635hai_configure_regulators(struct sc635hai *sc635hai)
+{
+	unsigned int i;
+
+	for (i = 0; i < SC635HAI_NUM_SUPPLIES; i++)
+		sc635hai->supplies[i].supply = sc635hai_supply_names[i];
+
+	return devm_regulator_bulk_get(&sc635hai->client->dev,
+				       SC635HAI_NUM_SUPPLIES,
+				       sc635hai->supplies);
+}
+
+static int sc635hai_read_module_info(struct sc635hai *sc635hai)
+{
+	int ret;
+	struct device *dev = &sc635hai->client->dev;
+	struct device_node *node = dev->of_node;
+
+	ret = of_property_read_u32(node, RKMODULE_CAMERA_MODULE_INDEX,
+				   &sc635hai->module_index);
+	ret |= of_property_read_string(node, RKMODULE_CAMERA_MODULE_FACING,
+				       &sc635hai->module_facing);
+	ret |= of_property_read_string(node, RKMODULE_CAMERA_MODULE_NAME,
+				       &sc635hai->module_name);
+	ret |= of_property_read_string(node, RKMODULE_CAMERA_LENS_NAME,
+				       &sc635hai->len_name);
+	if (ret)
+		dev_err(dev, "could not get module information!\n");
+
+	/* Compatible with non-standby mode if this attribute is not configured in dts*/
+	of_property_read_u32(node, RKMODULE_CAMERA_STANDBY_HW,
+			     &sc635hai->standby_hw);
+	dev_info(dev, "sc635hai->standby_hw = %d\n", sc635hai->standby_hw);
+
+	return ret;
+}
+
+static int sc635hai_find_modes(struct sc635hai *sc635hai)
+{
+	int i, ret;
+	u32 hdr_mode = 0;
+	struct device_node *endpoint;
+	struct device *dev = &sc635hai->client->dev;
+	struct device_node *node = sc635hai->client->dev.of_node;
+
+	ret = of_property_read_u32(node, OF_CAMERA_HDR_MODE, &hdr_mode);
+	if (ret) {
+		hdr_mode = NO_HDR;
+		dev_warn(dev, "Get hdr mode failed! no hdr default\n");
+	} else
+		dev_warn(dev, "Get hdr mode OK! hdr_mode = %d\n", hdr_mode);
+
+	endpoint = of_graph_get_next_endpoint(dev->of_node, NULL);
+	if (!endpoint) {
+		dev_err(dev, "Failed to get endpoint\n");
+		return -EINVAL;
+	}
+	ret = v4l2_fwnode_endpoint_parse(of_fwnode_handle(endpoint),
+					 &sc635hai->bus_cfg);
+	of_node_put(endpoint);
+	if (ret) {
+		dev_err(dev, "Failed to get bus config\n");
+		return -EINVAL;
+	}
+
+	dev_info(dev, "Detect sc635hai lane: %d\n",
+		sc635hai->bus_cfg.bus.mipi_csi2.num_data_lanes);
+	if (sc635hai->bus_cfg.bus.mipi_csi2.num_data_lanes == 4) {
+		sc635hai->supported_modes = supported_modes_4lane;
+		sc635hai->cfg_num = ARRAY_SIZE(supported_modes_4lane);
+	} else {
+		sc635hai->supported_modes = supported_modes_2lane;
+		sc635hai->cfg_num = ARRAY_SIZE(supported_modes_2lane);
+	}
+
+	for (i = 0; i < sc635hai->cfg_num; i++) {
+		if (hdr_mode == sc635hai->supported_modes[i].hdr_mode) {
+			sc635hai->cur_mode = &sc635hai->supported_modes[i];
+			break;
+		}
+	}
+
+	if (i == sc635hai->cfg_num)
+		sc635hai->cur_mode = &sc635hai->supported_modes[0];
+
+	return 0;
+}
+
+static int sc635hai_setup_clocks_and_gpios(struct sc635hai *sc635hai)
+{
+	struct device *dev = &sc635hai->client->dev;
+
+	sc635hai->xvclk = devm_clk_get(dev, "xvclk");
+	if (IS_ERR(sc635hai->xvclk)) {
+		dev_err(dev, "Failed to get xvclk\n");
+		return -EINVAL;
+	}
+
+	sc635hai->reset_gpio = devm_gpiod_get(dev, "reset",
+					     sc635hai->is_thunderboot ? GPIOD_ASIS : GPIOD_OUT_LOW);
+	if (IS_ERR(sc635hai->reset_gpio))
+		dev_warn(dev, "Failed to get reset-gpios\n");
+
+	sc635hai->pwdn_gpio = devm_gpiod_get(dev, "pwdn",
+					    sc635hai->is_thunderboot ? GPIOD_ASIS : GPIOD_OUT_LOW);
+	if (IS_ERR(sc635hai->pwdn_gpio))
+		dev_warn(dev, "Failed to get pwdn-gpios\n");
+
+	sc635hai->pinctrl = devm_pinctrl_get(dev);
+	if (!IS_ERR(sc635hai->pinctrl)) {
+		sc635hai->pins_default =
+			pinctrl_lookup_state(sc635hai->pinctrl,
+					     OF_CAMERA_PINCTRL_STATE_DEFAULT);
+		if (IS_ERR(sc635hai->pins_default))
+			dev_err(dev, "could not get default pinstate\n");
+
+		sc635hai->pins_sleep =
+			pinctrl_lookup_state(sc635hai->pinctrl,
+					     OF_CAMERA_PINCTRL_STATE_SLEEP);
+		if (IS_ERR(sc635hai->pins_sleep))
+			dev_err(dev, "could not get sleep pinstate\n");
+	} else {
+		dev_err(dev, "no pinctrl\n");
+	}
+
+	return 0;
+}
+
+static int sc635hai_probe(struct i2c_client *client,
+			 const struct i2c_device_id *id)
+{
+	struct device *dev = &client->dev;
+	struct sc635hai *sc635hai;
+	struct v4l2_subdev *sd;
+
+	char facing[2];
+	int ret;
+
+	dev_info(dev, "driver version: %02x.%02x.%02x",
+		 DRIVER_VERSION >> 16,
+		 (DRIVER_VERSION & 0xff00) >> 8,
+		 DRIVER_VERSION & 0x00ff);
+
+	sc635hai = devm_kzalloc(dev, sizeof(*sc635hai), GFP_KERNEL);
+	if (!sc635hai)
+		return -ENOMEM;
+
+	sc635hai->is_thunderboot = IS_ENABLED(CONFIG_VIDEO_ROCKCHIP_THUNDER_BOOT_ISP);
+	sc635hai->client = client;
+
+	ret = sc635hai_read_module_info(sc635hai);
+	if (ret) {
+		dev_err(dev, "could not get module information!\n");
+		return -EINVAL;
+	}
+
+	/* Set current mode based on HDR mode */
+	ret = sc635hai_find_modes(sc635hai);
+	if (ret) {
+		dev_err(dev, "Failed to get modes!\n");
+		return -EINVAL;
+	}
+
+	/* setup sc635hai clock and gpios*/
+	ret = sc635hai_setup_clocks_and_gpios(sc635hai);
+	if (ret) {
+		dev_err(dev, "Failed to set up clocks and GPIOs\n");
+		return ret;
+	}
+
+	ret = sc635hai_configure_regulators(sc635hai);
+	if (ret) {
+		dev_err(dev, "Failed to get power regulators\n");
+		return ret;
+	}
+
+	mutex_init(&sc635hai->mutex);
+
+	sd = &sc635hai->subdev;
+	v4l2_i2c_subdev_init(sd, client, &sc635hai_subdev_ops);
+	ret = sc635hai_initialize_controls(sc635hai);
+	if (ret)
+		goto err_destroy_mutex;
+
+	ret = __sc635hai_power_on(sc635hai);
+	if (ret)
+		goto err_free_handler;
+
+	ret = sc635hai_check_sensor_id(sc635hai, client);
+	if (ret)
+		goto err_power_off;
+
+#ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
+	sd->internal_ops = &sc635hai_internal_ops;
+	sd->flags |= V4L2_SUBDEV_FL_HAS_DEVNODE |
+		     V4L2_SUBDEV_FL_HAS_EVENTS;
+#endif
+#if defined(CONFIG_MEDIA_CONTROLLER)
+	sc635hai->pad.flags = MEDIA_PAD_FL_SOURCE;
+	sd->entity.function = MEDIA_ENT_F_CAM_SENSOR;
+	ret = media_entity_pads_init(&sd->entity, 1, &sc635hai->pad);
+	if (ret < 0)
+		goto err_power_off;
+#endif
+
+	if (!sc635hai->cam_sw_inf) {
+		sc635hai->cam_sw_inf = cam_sw_init();
+		cam_sw_clk_init(sc635hai->cam_sw_inf, sc635hai->xvclk,
+				sc635hai->cur_mode->mclk);
+		cam_sw_reset_pin_init(sc635hai->cam_sw_inf, sc635hai->reset_gpio, 0);
+		cam_sw_pwdn_pin_init(sc635hai->cam_sw_inf, sc635hai->pwdn_gpio, 1);
+	}
+
+	memset(facing, 0, sizeof(facing));
+	if (strcmp(sc635hai->module_facing, "back") == 0)
+		facing[0] = 'b';
+	else
+		facing[0] = 'f';
+
+	snprintf(sd->name, sizeof(sd->name), "m%02d_%s_%s %s",
+		 sc635hai->module_index, facing,
+		 SC635HAI_NAME, dev_name(sd->dev));
+	ret = v4l2_async_register_subdev_sensor(sd);
+	if (ret) {
+		dev_err(dev, "v4l2 async register subdev failed\n");
+		goto err_clean_entity;
+	}
+
+	pm_runtime_set_active(dev);
+	pm_runtime_enable(dev);
+	if (sc635hai->is_thunderboot)
+		pm_runtime_get_sync(dev);
+	else
+		pm_runtime_idle(dev);
+
+	return 0;
+
+err_clean_entity:
+#if defined(CONFIG_MEDIA_CONTROLLER)
+	media_entity_cleanup(&sd->entity);
+#endif
+err_power_off:
+	__sc635hai_power_off(sc635hai);
+err_free_handler:
+	v4l2_ctrl_handler_free(&sc635hai->ctrl_handler);
+err_destroy_mutex:
+	mutex_destroy(&sc635hai->mutex);
+
+	return ret;
+}
+
+static void sc635hai_remove(struct i2c_client *client)
+{
+	struct v4l2_subdev *sd = i2c_get_clientdata(client);
+	struct sc635hai *sc635hai = to_sc635hai(sd);
+
+	v4l2_async_unregister_subdev(sd);
+#if defined(CONFIG_MEDIA_CONTROLLER)
+	media_entity_cleanup(&sd->entity);
+#endif
+	v4l2_ctrl_handler_free(&sc635hai->ctrl_handler);
+	mutex_destroy(&sc635hai->mutex);
+
+	cam_sw_deinit(sc635hai->cam_sw_inf);
+
+	pm_runtime_disable(&client->dev);
+	if (!pm_runtime_status_suspended(&client->dev))
+		__sc635hai_power_off(sc635hai);
+	pm_runtime_set_suspended(&client->dev);
+}
+
+#if IS_ENABLED(CONFIG_OF)
+static const struct of_device_id sc635hai_of_match[] = {
+	{ .compatible = "smartsens,sc635hai" },
+	{},
+};
+MODULE_DEVICE_TABLE(of, sc635hai_of_match);
+#endif
+
+static const struct i2c_device_id sc635hai_match_id[] = {
+	{ "smartsens,sc635hai", 0 },
+	{ },
+};
+
+static struct i2c_driver sc635hai_i2c_driver = {
+	.driver = {
+		.name = SC635HAI_NAME,
+		.pm = &sc635hai_pm_ops,
+		.of_match_table = of_match_ptr(sc635hai_of_match),
+	},
+	.probe		= sc635hai_probe,
+	.remove		= sc635hai_remove,
+	.id_table	= sc635hai_match_id,
+};
+
+static int __init sensor_mod_init(void)
+{
+	return i2c_add_driver(&sc635hai_i2c_driver);
+}
+
+static void __exit sensor_mod_exit(void)
+{
+	i2c_del_driver(&sc635hai_i2c_driver);
+}
+
+#if defined(CONFIG_VIDEO_ROCKCHIP_THUNDER_BOOT_ISP) && !defined(CONFIG_INITCALL_ASYNC)
+subsys_initcall(sensor_mod_init);
+#else
+device_initcall_sync(sensor_mod_init);
+#endif
+module_exit(sensor_mod_exit);
+
+MODULE_DESCRIPTION("smartsens sc635hai CMOS Image Sensor driver");
+MODULE_LICENSE("GPL");

From 7fb7faf2f4f03f9cf257d7ee02b71fb3d668e110 Mon Sep 17 00:00:00 2001
From: Su Yuefu <yuefu.su@rock-chips.com>
Date: Thu, 3 Apr 2025 17:01:45 +0800
Subject: [PATCH 22/24] ARM: configs: rv1126b-evb: Enable CONFIG_VIDEO_SC635HAI

Signed-off-by: Su Yuefu <yuefu.su@rock-chips.com>
Change-Id: I70c16c8f56a60fa752219ceb2af9d40acacab0f5
---
 arch/arm/configs/rv1126b-evb.config | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm/configs/rv1126b-evb.config b/arch/arm/configs/rv1126b-evb.config
index 8f438225560c..709422aa5160 100644
--- a/arch/arm/configs/rv1126b-evb.config
+++ b/arch/arm/configs/rv1126b-evb.config
@@ -55,6 +55,7 @@ CONFIG_VIDEO_SC401AI=m
 CONFIG_VIDEO_SC4336=m
 CONFIG_VIDEO_SC450AI=m
 CONFIG_VIDEO_SC530AI=m
+CONFIG_VIDEO_SC635HAI=m
 CONFIG_VIDEO_SC850SL=m
 CONFIG_VIDEO_TECHPOINT=m
 CONFIG_WIRELESS=y

From 34e611a84e5d303a1fc87aa10050b35973915de2 Mon Sep 17 00:00:00 2001
From: David Wu <david.wu@rock-chips.com>
Date: Thu, 3 Apr 2025 16:52:16 +0800
Subject: [PATCH 23/24] arm64: dts: rockchip: rv1126b-evb2-v10: Fix FEPHY clock
 and led

Change clk_phy to 50M and add led function.

Change-Id: Ifd91490c799e866eb69a0fcad56c98acaed03366
Signed-off-by: David Wu <david.wu@rock-chips.com>
---
 arch/arm64/boot/dts/rockchip/rv1126b-evb2-v10.dts | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/rockchip/rv1126b-evb2-v10.dts b/arch/arm64/boot/dts/rockchip/rv1126b-evb2-v10.dts
index bf2b2289d1af..c9298061b562 100644
--- a/arch/arm64/boot/dts/rockchip/rv1126b-evb2-v10.dts
+++ b/arch/arm64/boot/dts/rockchip/rv1126b-evb2-v10.dts
@@ -320,8 +320,10 @@
 		compatible = "ethernet-phy-id0680.8101", "ethernet-phy-ieee802.3-c22";
 		reg = <2>;
 		clocks = <&cru CLK_MACPHY>;
-		clock-frequency = <24000000>;
+		clock-frequency = <50000000>;
 		resets = <&cru SRST_RESETN_MACPHY>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&fephym2_pins>;
 		phy-is-integrated;
 	};
 };

From fc5aafdc74cb363bf1c2d69461083e455d935f25 Mon Sep 17 00:00:00 2001
From: David Wu <david.wu@rock-chips.com>
Date: Thu, 3 Apr 2025 17:03:53 +0800
Subject: [PATCH 24/24] ethernet: stmmac: dwmac-rk: Add macphy clock input
 method for rv1126b

Change-Id: I37b33aec1fd5f7d09abfd7b3b4644e6eb5fbc78d
Signed-off-by: David Wu <david.wu@rock-chips.com>
---
 drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c | 14 ++++++++++----
 1 file changed, 10 insertions(+), 4 deletions(-)

diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c
index 548ee82ff3b4..9c2d790d3a90 100644
--- a/drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c
@@ -2557,6 +2557,9 @@ static const struct rk_gmac_ops rv1126_ops = {
 #define RV1126B_RK_MACPHY_DISABLE		0
 #define RV1126B_RK_MACPHY_ENABLE		BIT(31)
 
+#define RV1126B_RK_MACPHY_EXTCLK_SEL_OUTPUT	0
+#define RV1126B_RK_MACPHY_EXTCLK_SEL_INPUT	BIT(8)
+
 #define RV1126B_RK_MACPHY_CLK_24M		0
 #define RV1126B_RK_MACPHY_CLK_50M		BIT(11)
 
@@ -2680,11 +2683,14 @@ static void rv1126b_integrated_phy_power(struct rk_priv_data *priv, bool up)
 		usleep_range(20, 40);
 
 		if (priv->clk_phy_rate == 50000000)
-			regmap_write(priv->grf, RV1126B_VI_GRF_RK_MACPHY_CON2,
-				     RV1126B_RK_MACPHY_CLK_50M);
+			value = RV1126B_RK_MACPHY_CLK_50M;
 		else
-			regmap_write(priv->grf, RV1126B_VI_GRF_RK_MACPHY_CON2,
-				     RV1126B_RK_MACPHY_CLK_24M);
+			value = RV1126B_RK_MACPHY_CLK_24M;
+
+		value |= priv->clock_input ? RV1126B_RK_MACPHY_EXTCLK_SEL_INPUT :
+					     RV1126B_RK_MACPHY_EXTCLK_SEL_OUTPUT;
+
+		regmap_write(priv->grf, RV1126B_VI_GRF_RK_MACPHY_CON2, value);
 
 		regmap_write(priv->grf, RV1126B_VI_GRF_RK_MACPHY_CON0,
 			     RV1126B_RK_MACPHY_PHY_ID | RV1126B_RK_MACPHY_PHY_ADDR);