From 1f802e2fefc8035495eb00246995cd94c63444d5 Mon Sep 17 00:00:00 2001 From: Ding Wei Date: Sun, 21 Feb 2021 16:03:51 +0800 Subject: [PATCH] arm64: dts: rockchip: rk3568: rkvdec: reset clock rates clock set 297M/396M, and it will divided from gpll. Change-Id: Ie039dfa0c55c323b9fd7b6a628a389677f87728f Signed-off-by: Ding Wei --- arch/arm64/boot/dts/rockchip/rk3568.dtsi | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/arch/arm64/boot/dts/rockchip/rk3568.dtsi b/arch/arm64/boot/dts/rockchip/rk3568.dtsi index 22e8e8792f0e..f05cba67201b 100644 --- a/arch/arm64/boot/dts/rockchip/rk3568.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3568.dtsi @@ -1363,9 +1363,9 @@ clock-names = "aclk_vcodec", "hclk_vcodec","clk_cabac", "clk_core", "clk_hevc_cabac"; rockchip,normal-rates = <297000000>, <0>, <297000000>, - <297000000>, <400000000>; - rockchip,advanced-rates = <400000000>, <0>, <400000000>, - <400000000>, <500000000>; + <297000000>, <600000000>; + rockchip,advanced-rates = <396000000>, <0>, <396000000>, + <396000000>, <600000000>; rockchip,default-max-load = <2088960>; resets = <&cru SRST_A_RKVDEC>, <&cru SRST_H_RKVDEC>, <&cru SRST_RKVDEC_CA>, <&cru SRST_RKVDEC_CORE>,