From 1f9d2a5bd7b2dd1bd1454bd24bce44da1070eee8 Mon Sep 17 00:00:00 2001 From: Elaine Zhang Date: Fri, 10 Feb 2017 10:29:46 +0800 Subject: [PATCH] clk: rockchip: rk3399: remove the flag ROCKCHIP_PLL_SYNC_RATE for VPLL and CPLL to slove the display shaking, when uboot logo display to kernel show. Change-Id: I804aa09f24bc4fa7b6314a7a5487f0ee1a321724 Signed-off-by: Elaine Zhang --- drivers/clk/rockchip/clk-rk3399.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/clk/rockchip/clk-rk3399.c b/drivers/clk/rockchip/clk-rk3399.c index 0833b484b5a0..a112bc05a94f 100644 --- a/drivers/clk/rockchip/clk-rk3399.c +++ b/drivers/clk/rockchip/clk-rk3399.c @@ -321,7 +321,7 @@ static struct rockchip_pll_clock rk3399_pll_clks[] __initdata = { [npll] = PLL(pll_rk3399, PLL_NPLL, "npll", mux_pll_p, 0, RK3399_PLL_CON(40), RK3399_PLL_CON(43), 8, 31, ROCKCHIP_PLL_SYNC_RATE, rk3399_pll_rates), [vpll] = PLL(pll_rk3399, PLL_VPLL, "vpll", mux_pll_p, 0, RK3399_PLL_CON(48), - RK3399_PLL_CON(51), 8, 31, ROCKCHIP_PLL_SYNC_RATE, rk3399_vpll_rates), + RK3399_PLL_CON(51), 8, 31, 0, rk3399_vpll_rates), }; static struct rockchip_pll_clock rk3399_pmu_pll_clks[] __initdata = {