diff --git a/drivers/clk/rockchip/clk-rv1126b.c b/drivers/clk/rockchip/clk-rv1126b.c
index 1bff71eedba1..b27cc612a447 100644
--- a/drivers/clk/rockchip/clk-rv1126b.c
+++ b/drivers/clk/rockchip/clk-rv1126b.c
@@ -924,9 +924,9 @@ static struct rockchip_clk_branch rv1126b_clk_branches[] __initdata = {
 			RV1126B_BUSCLKGATE_CON(4), 14, GFLAGS),
 	GATE(PCLK_UART7, "pclk_uart7", "pclk_bus_root", 0,
 			RV1126B_BUSCLKGATE_CON(4), 15, GFLAGS),
-	GATE(PCLK_TSADC, "pclk_tsadc", "pclk_bus_root", 0,
+	GATE(PCLK_TSADC, "pclk_tsadc", "pclk_bus_root", CLK_IS_CRITICAL,
 			RV1126B_BUSCLKGATE_CON(5), 0, GFLAGS),
-	GATE(CLK_TSADC, "clk_tsadc", "xin24m", 0,
+	GATE(CLK_TSADC, "clk_tsadc", "xin24m", CLK_IS_CRITICAL,
 			RV1126B_BUSCLKGATE_CON(5), 1, GFLAGS),
 	GATE(HCLK_SAI0, "hclk_sai0", "hclk_bus_root", 0,
 			RV1126B_BUSCLKGATE_CON(5), 2, GFLAGS),
@@ -962,7 +962,7 @@ static struct rockchip_clk_branch rv1126b_clk_branches[] __initdata = {
 			RV1126B_BUSCLKGATE_CON(6), 4, GFLAGS),
 	GATE(PCLK_OTP_MASK, "pclk_otp_mask", "pclk_bus_root", 0,
 			RV1126B_BUSCLKGATE_CON(6), 6, GFLAGS),
-	GATE(CLK_TSADC_PHYCTRL, "clk_tsadc_phyctrl", "xin24m", 0,
+	GATE(CLK_TSADC_PHYCTRL, "clk_tsadc_phyctrl", "xin24m", CLK_IS_CRITICAL,
 			RV1126B_BUSCLKGATE_CON(6), 8, GFLAGS),
 	MUX(LRCK_SRC_ASRC0, "lrck_src_asrc0", lrck_src_asrc_p, 0,
 			RV1126B_BUSCLKSEL_CON(3), 0, 3, MFLAGS),