From 20c43992f80fbdcf98c529a95bd023121dadfa20 Mon Sep 17 00:00:00 2001 From: Lin Jinhan Date: Mon, 29 Jun 2020 14:46:07 +0800 Subject: [PATCH] crypto: rockchip - add rv1126 crypto des/des3_ede support cipher mode list: des/des3_ede: ecb/cbc Change-Id: I0b8a75f3f67892988982ea7b52380eb847758af4 Signed-off-by: Lin Jinhan --- drivers/crypto/rockchip/rk_crypto_core.c | 23 +++++++++++++++++++++++ 1 file changed, 23 insertions(+) diff --git a/drivers/crypto/rockchip/rk_crypto_core.c b/drivers/crypto/rockchip/rk_crypto_core.c index d1d386efff29..678abdc8824e 100644 --- a/drivers/crypto/rockchip/rk_crypto_core.c +++ b/drivers/crypto/rockchip/rk_crypto_core.c @@ -310,6 +310,25 @@ static const struct rk_crypto_soc_data px30_soc_data = { .hw_info_size = sizeof(struct rk_hw_crypto_v2_info), }; +static struct rk_crypto_tmp *rv1126_cipher_algs[] = { + &rk_v2_ecb_des_alg, + &rk_v2_cbc_des_alg, + &rk_v2_ecb_des3_ede_alg, + &rk_v2_cbc_des3_ede_alg, +}; + +static const struct rk_crypto_soc_data rv1126_soc_data = { + .cipher_algs = &rv1126_cipher_algs[0], + .cipher_num = ARRAY_SIZE(rv1126_cipher_algs), + .clks = crypto_v2_clks, + .clks_num = ARRAY_SIZE(crypto_v2_clks), + .rsts = crypto_v2_rsts, + .rsts_num = ARRAY_SIZE(crypto_v2_rsts), + .hw_init = rk_hw_crypto_v2_init, + .hw_deinit = rk_hw_crypto_v2_deinit, + .hw_info_size = sizeof(struct rk_hw_crypto_v2_info), +}; + static const char * const crypto_v1_clks[] = { "hclk", "aclk", @@ -351,6 +370,10 @@ static const struct of_device_id crypto_of_id_table[] = { .compatible = "rockchip,px30-crypto", .data = (void *)&px30_soc_data, }, + { + .compatible = "rockchip,rv1126-crypto", + .data = (void *)&rv1126_soc_data, + }, /* crypto v1 in belows */ { .compatible = "rockchip,rk3288-crypto",