From 24992130f2a4e2bc8ebc1d140518218dc0231307 Mon Sep 17 00:00:00 2001
From: David Wu <david.wu@rock-chips.com>
Date: Tue, 3 Dec 2019 11:32:46 +0800
Subject: [PATCH] arm64: dts: rockchip: Add HCLK_USB_PERI for rk3368 otg

If this clock does not enable, the otg controller is
working abnormally.

Change-Id: Ic08043e19d3ef1ed8cfb35267828ff317fb438f6
Signed-off-by: David Wu <david.wu@rock-chips.com>
---
 arch/arm64/boot/dts/rockchip/rk3368.dtsi | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm64/boot/dts/rockchip/rk3368.dtsi b/arch/arm64/boot/dts/rockchip/rk3368.dtsi
index af92fcf51ec1..62e289417705 100644
--- a/arch/arm64/boot/dts/rockchip/rk3368.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3368.dtsi
@@ -814,8 +814,8 @@
 				"snps,dwc2";
 		reg = <0x0 0xff580000 0x0 0x40000>;
 		interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
-		clocks = <&cru HCLK_OTG0>;
-		clock-names = "otg";
+		clocks = <&cru HCLK_OTG0>, <&cru HCLK_USB_PERI>;
+		clock-names = "otg", "hclk_usb_peri";
 		dr_mode = "otg";
 		g-np-tx-fifo-size = <16>;
 		g-rx-fifo-size = <280>;