From 250a8af383aff0d1a66a2ada39af5da2f2bc828c Mon Sep 17 00:00:00 2001 From: Wu Liangqing Date: Tue, 30 Nov 2021 20:54:04 +0800 Subject: [PATCH] arm64: dts: rockchip: rk3588s-evb: sync with rk3588-evb Signed-off-by: Wu Liangqing Change-Id: If6aaec4a52b28fe0e25c7ace20aa4611177a3e03 --- arch/arm64/boot/dts/rockchip/rk3588s-evb.dtsi | 60 ++++++++++++------- 1 file changed, 38 insertions(+), 22 deletions(-) diff --git a/arch/arm64/boot/dts/rockchip/rk3588s-evb.dtsi b/arch/arm64/boot/dts/rockchip/rk3588s-evb.dtsi index 86dffb439a11..2e5b65e826f7 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588s-evb.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3588s-evb.dtsi @@ -99,18 +99,6 @@ }; }; - leds: leds { - compatible = "gpio-leds"; - work_led: work { - gpios = <&gpio3 RK_PB7 GPIO_ACTIVE_HIGH>; - linux,default-trigger = "heartbeat"; - }; - }; - - test-power { - status = "okay"; - }; - spdif_tx1_dc: spdif-tx1-dc { status = "disabled"; compatible = "linux,spdif-dit"; @@ -129,6 +117,10 @@ }; }; + test-power { + status = "okay"; + }; + vcc12v_dcin: vcc12v-dcin { compatible = "regulator-fixed"; regulator-name = "vcc12v_dcin"; @@ -192,14 +184,6 @@ mem-supply = <&vdd_cpu_big1_mem_s0>; }; -&i2s0_8ch { - status = "okay"; - pinctrl-0 = <&i2s0_lrck - &i2s0_sclk - &i2s0_sdi0 - &i2s0_sdo0>; -}; - &dsi0 { status = "disabled"; //rockchip,lane-rate = <1000>; @@ -493,7 +477,7 @@ hactive = <1080>; vactive = <1920>; hfront-porch = <15>; - hsync-len = <2>; + hsync-len = <4>; hback-porch = <30>; vfront-porch = <15>; vsync-len = <2>; @@ -825,7 +809,7 @@ hactive = <1080>; vactive = <1920>; hfront-porch = <15>; - hsync-len = <2>; + hsync-len = <4>; hback-porch = <30>; vfront-porch = <15>; vsync-len = <2>; @@ -870,6 +854,14 @@ status = "okay"; }; +&i2s0_8ch { + status = "okay"; + pinctrl-0 = <&i2s0_lrck + &i2s0_sclk + &i2s0_sdi0 + &i2s0_sdo0>; +}; + &iep { status = "okay"; }; @@ -898,6 +890,30 @@ status = "okay"; }; +&rkvdec_ccu { + status = "okay"; +}; + +&rga3_core0 { + status = "okay"; +}; + +&rga3_0_mmu { + status = "okay"; +}; + +&rga3_core1 { + status = "okay"; +}; + +&rga3_1_mmu { + status = "okay"; +}; + +&rga2 { + status = "okay"; +}; + &rkvdec0 { status = "okay"; };