From 25130a98f309636e96589dbdc476bd1e12a6fa46 Mon Sep 17 00:00:00 2001
From: Finley Xiao <finley.xiao@rock-chips.com>
Date: Mon, 26 Feb 2024 09:35:24 +0800
Subject: [PATCH] dt-bindings: opp: rockchip: Document rockchip,pvtpll

Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Change-Id: Iaf74ec66027a6364947048807d078c439e3f8846
---
 Documentation/devicetree/bindings/opp/rockchip-opp.txt | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/opp/rockchip-opp.txt b/Documentation/devicetree/bindings/opp/rockchip-opp.txt
index c4a87aed6653..393b481c7d1b 100644
--- a/Documentation/devicetree/bindings/opp/rockchip-opp.txt
+++ b/Documentation/devicetree/bindings/opp/rockchip-opp.txt
@@ -62,6 +62,7 @@ In 'operating-points-v2' table:
                        target frequency less than the threshold frequency,
                        there may be no need to set intermediate rate.
 
+- rockchip,pvtpll: The phandle of the syscon node for PVTPLL register.
 - rockchip,pvtpll-table: The property is an array of 5-tuples items, and
                        each item consists frequency and pvtpll config like
                        <freq_khz ring length low_temp_ring low_temp_length>,