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clk: rockchip: rk3288: add gate id of hclk_usb_peri for usb otg

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Change-Id: Ib45f6d97ec81329ec9a4a19e9e836efa0ea61fe2
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
This commit is contained in:
Frank Wang
2017-03-28 17:27:01 +08:00
committed by Tao Huang
parent 0f4a6a32c2
commit 2550716315
2 changed files with 2 additions and 1 deletions
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2
drivers/clk/rockchip/clk-rk3288.c
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@@ -720,7 +720,7 @@ static struct rockchip_clk_branch rk3288_clk_branches[] __initdata = {
GATE(HCLK_USBHOST0, "hclk_host0", "hclk_peri", 0, RK3288_CLKGATE_CON(7), 6, GFLAGS),
GATE(HCLK_USBHOST1, "hclk_host1", "hclk_peri", CLK_IGNORE_UNUSED, RK3288_CLKGATE_CON(7), 7, GFLAGS),
GATE(HCLK_HSIC, "hclk_hsic", "hclk_peri", 0, RK3288_CLKGATE_CON(7), 8, GFLAGS),
GATE(0, "hclk_usb_peri", "hclk_peri", CLK_IGNORE_UNUSED, RK3288_CLKGATE_CON(7), 9, GFLAGS),
GATE(HCLK_USB_PERI, "hclk_usb_peri", "hclk_peri", CLK_IGNORE_UNUSED, RK3288_CLKGATE_CON(7), 9, GFLAGS),
GATE(0, "hclk_peri_ahb_arbi", "hclk_peri", CLK_IGNORE_UNUSED, RK3288_CLKGATE_CON(7), 10, GFLAGS),
GATE(0, "hclk_emem", "hclk_peri", CLK_IGNORE_UNUSED, RK3288_CLKGATE_CON(7), 12, GFLAGS),
GATE(0, "hclk_mem", "hclk_peri", CLK_IGNORE_UNUSED, RK3288_CLKGATE_CON(7), 13, GFLAGS),

1
include/dt-bindings/clock/rk3288-cru.h
View File

@@ -198,6 +198,7 @@
#define HCLK_VCODEC 476
#define HCLK_CPU 477
#define HCLK_PERI 478
#define HCLK_USB_PERI 479
#define CLK_NR_CLKS (HCLK_PERI + 1)