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arm64: rockchip: dts: enable pcie for rk356x evb

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Signed-off-by: Jianhui Wang <wjh@rock-chips.com>
Change-Id: I31906f667315e67f633e2cd98d832731540e8131
This commit is contained in:
Jianhui Wang
2020-12-09 15:51:06 +08:00
committed by Tao Huang
parent 29aa91cb2a
commit 259ea199e5
6 changed files with 14 additions and 18 deletions
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4
arch/arm64/boot/dts/rockchip/rk3566-evb1-ddr4-v10.dtsi
View File

@@ -52,7 +52,7 @@
};
&combphy2_psq {
status = "disabled";
status = "okay";
};
&csi_dphy {
@@ -264,7 +264,7 @@
&pcie2x1 {
reset-gpios = <&gpio1 RK_PB2 GPIO_ACTIVE_HIGH>;
vpcie3v3-supply = <&pcie20_3v3>;
status = "disabled";
status = "okay";
};
&pdm {

4
arch/arm64/boot/dts/rockchip/rk3566-evb2-lp4x-v10.dtsi
View File

@@ -50,7 +50,7 @@
};
&combphy2_psq {
status = "disabled";
status = "okay";
};
&csi_dphy {
@@ -280,7 +280,7 @@
&pcie2x1 {
reset-gpios = <&gpio1 RK_PB2 GPIO_ACTIVE_HIGH>;
vpcie3v3-supply = <&pcie20_3v3>;
status = "disabled";
status = "okay";
};
&pinctrl {

4
arch/arm64/boot/dts/rockchip/rk3566-evb3-ddr3-v10.dtsi
View File

@@ -259,10 +259,6 @@
status = "disabled";
};
&pcie2x1 {
status = "disabled";
};
&pdm {
status = "disabled";
pinctrl-names = "default";

4
arch/arm64/boot/dts/rockchip/rk3568-evb1-ddr4-v10.dtsi
View File

@@ -358,13 +358,13 @@
};
&pcie30phy {
status = "disabled";
status = "okay";
};
&pcie3x2 {
reset-gpios = <&gpio2 RK_PD6 GPIO_ACTIVE_HIGH>;
vpcie3v3-supply = <&pcie30_3v3>;
status = "disabled";
status = "okay";
};
&pinctrl {

6
arch/arm64/boot/dts/rockchip/rk3568-evb2-lp4x-v10.dtsi
View File

@@ -246,17 +246,17 @@
&pcie2x1 {
reset-gpios = <&gpio1 RK_PB2 GPIO_ACTIVE_HIGH>;
vpcie3v3-supply = <&pcie20_3v3>;
status = "disabled";
status = "okay";
};
&pcie30phy {
status = "disabled";
status = "okay";
};
&pcie3x2 {
reset-gpios = <&gpio0 RK_PC6 GPIO_ACTIVE_HIGH>;
vpcie3v3-supply = <&pcie30_3v3>;
status = "disabled";
status = "okay";
};
&pinctrl {

10
arch/arm64/boot/dts/rockchip/rk3568-evb6-ddr3-v10.dtsi
View File

@@ -73,7 +73,7 @@
};
&combphy2_psq {
status = "disabled";
status = "okay";
};
&dmc_opp_table {
@@ -180,27 +180,27 @@
};
&pcie30phy {
status = "disabled";
status = "okay";
};
&pcie2x1 {
reset-gpios = <&gpio1 RK_PB2 GPIO_ACTIVE_HIGH>;
vpcie3v3-supply = <&pcie20_3v3>;
status = "disabled";
status = "okay";
};
&pcie3x1 {
rockchip,bifurcation;
reset-gpios = <&gpio3 RK_PA1 GPIO_ACTIVE_HIGH>;
vpcie3v3-supply = <&pcie30_3v3>;
status = "disabled";
status = "okay";
};
&pcie3x2 {
rockchip,bifurcation;
reset-gpios = <&gpio2 RK_PD6 GPIO_ACTIVE_HIGH>;
vpcie3v3-supply = <&pcie30_3v3>;
status = "disabled";
status = "okay";
};
&pinctrl {