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emmc: run hs400 200M on sm1 [1/1]

Browse Source 
PD#SWPL-12424

Problem:
run hs400 166M on sm1 now

Solution:
modify dts

Verify:
passed on sm1_ac200

Change-Id: I28f5f8da3481c9f2a19e27bc8e430a3379ec6b2a
Signed-off-by: Ruixuan Li <ruixuan.li@amlogic.com>
This commit is contained in:
Ruixuan Li
2019-08-08 10:08:32 +08:00
committed by Tao Zeng
parent 540c031cbb
commit 25a55cbcd4
15 changed files with 30 additions and 16 deletions
Download Patch File Download Diff File Expand all files Collapse all files

2
arch/arm/boot/dts/amlogic/sm1_s905d3_ac200.dts
View File

@@ -1734,7 +1734,7 @@
"MMC_CAP_DRIVER_TYPE_D";
caps2 = "MMC_CAP2_HS200", "MMC_CAP2_HS400";
f_min = <400000>;
f_max = <166666666>;
f_max = <200000000>;
};
};

2
arch/arm/boot/dts/amlogic/sm1_s905d3_ac200_buildroot.dts
View File

@@ -1809,7 +1809,7 @@
"MMC_CAP_DRIVER_TYPE_D";
caps2 = "MMC_CAP2_HS200", "MMC_CAP2_HS400";
f_min = <400000>;
f_max = <166666666>;
f_max = <200000000>;
};
};

2
arch/arm/boot/dts/amlogic/sm1_s905d3_ac200_drm_buildroot.dts
View File

@@ -1825,7 +1825,7 @@
"MMC_CAP_DRIVER_TYPE_D";
caps2 = "MMC_CAP2_HS200", "MMC_CAP2_HS400";
f_min = <400000>;
f_max = <166666666>;
f_max = <200000000>;
};
};

2
arch/arm/boot/dts/amlogic/sm1_s905d3_ac202.dts
View File

@@ -1744,7 +1744,7 @@
"MMC_CAP_DRIVER_TYPE_D";
caps2 = "MMC_CAP2_HS200", "MMC_CAP2_HS400";
f_min = <400000>;
f_max = <166666666>;
f_max = <200000000>;
};
};

2
arch/arm/boot/dts/amlogic/sm1_s905d3_ac202_1g.dts
View File

@@ -1744,7 +1744,7 @@
"MMC_CAP_DRIVER_TYPE_D";
caps2 = "MMC_CAP2_HS200", "MMC_CAP2_HS400";
f_min = <400000>;
f_max = <166666666>;
f_max = <200000000>;
};
};

2
arch/arm/boot/dts/amlogic/sm1_s905x3_ac213.dts
View File

@@ -1698,7 +1698,7 @@
"MMC_CAP_DRIVER_TYPE_D";
caps2 = "MMC_CAP2_HS200", "MMC_CAP2_HS400";
f_min = <400000>;
f_max = <166666666>;
f_max = <200000000>;
};
};

2
arch/arm/boot/dts/amlogic/sm1_s905x3_ac213_buildroot.dts
View File

@@ -1777,7 +1777,7 @@
"MMC_CAP_DRIVER_TYPE_D";
caps2 = "MMC_CAP2_HS200", "MMC_CAP2_HS400";
f_min = <400000>;
f_max = <166666666>;
f_max = <200000000>;
};
};

2
arch/arm64/boot/dts/amlogic/sm1_s905d3_ac200.dts
View File

@@ -1717,7 +1717,7 @@
"MMC_CAP_DRIVER_TYPE_D";
caps2 = "MMC_CAP2_HS200", "MMC_CAP2_HS400";
f_min = <400000>;
f_max = <166666666>;
f_max = <200000000>;
};
};

2
arch/arm64/boot/dts/amlogic/sm1_s905d3_ac200_buildroot.dts
View File

@@ -1796,7 +1796,7 @@
"MMC_CAP_DRIVER_TYPE_D";
caps2 = "MMC_CAP2_HS200", "MMC_CAP2_HS400";
f_min = <400000>;
f_max = <166666666>;
f_max = <200000000>;
};
};

2
arch/arm64/boot/dts/amlogic/sm1_s905d3_ac200_drm_buildroot.dts
View File

@@ -1812,7 +1812,7 @@
"MMC_CAP_DRIVER_TYPE_D";
caps2 = "MMC_CAP2_HS200", "MMC_CAP2_HS400";
f_min = <400000>;
f_max = <166666666>;
f_max = <200000000>;
};
};

2
arch/arm64/boot/dts/amlogic/sm1_s905d3_ac202.dts
View File

@@ -1742,7 +1742,7 @@
"MMC_CAP_DRIVER_TYPE_D";
caps2 = "MMC_CAP2_HS200", "MMC_CAP2_HS400";
f_min = <400000>;
f_max = <166666666>;
f_max = <200000000>;
};
};

2
arch/arm64/boot/dts/amlogic/sm1_s905d3_ac202_1g.dts
View File

@@ -1743,7 +1743,7 @@
"MMC_CAP_DRIVER_TYPE_D";
caps2 = "MMC_CAP2_HS200", "MMC_CAP2_HS400";
f_min = <400000>;
f_max = <166666666>;
f_max = <200000000>;
};
};

2
arch/arm64/boot/dts/amlogic/sm1_s905x3_ac213.dts
View File

@@ -1761,7 +1761,7 @@
"MMC_CAP_DRIVER_TYPE_D";
caps2 = "MMC_CAP2_HS200", "MMC_CAP2_HS400";
f_min = <400000>;
f_max = <166666666>;
f_max = <200000000>;
};
};

2
arch/arm64/boot/dts/amlogic/sm1_s905x3_ac213_buildroot.dts
View File

@@ -1853,7 +1853,7 @@
"MMC_CAP_DRIVER_TYPE_D";
caps2 = "MMC_CAP2_HS200", "MMC_CAP2_HS400";
f_min = <400000>;
f_max = <166666666>;
f_max = <200000000>;
};
};

18
drivers/amlogic/mmc/aml_sd_emmc_v3.c
View File

@@ -156,6 +156,21 @@ int meson_mmc_clk_init_v3(struct amlsd_host *host)
return ret;
}
/**************************
* select clock source
* ************************
* HS200 200M -> HS400 200M
*
* G12B: 800M -> 800M
*
* TL1 : 792M -> 792M
*
* SM1 : 1G -> 800M
*
* TM2 : 1G -> 800M
*
* TXLX: 1G -> 400M
**************************/
static int meson_mmc_clk_set_rate_v3(struct mmc_host *mmc,
unsigned long clk_ios)
@@ -2276,8 +2291,7 @@ int aml_mmc_execute_tuning_v3(struct mmc_host *mmc, u32 opcode)
intf3 |= (1<<22);
writel(intf3, (host->base + SD_EMMC_INTF3));
pdata->intf3 = intf3;
if ((host->data->chip_type >= MMC_CHIP_TL1)
|| (host->data->chip_type == MMC_CHIP_G12B))
if (host->data->chip_type == MMC_CHIP_G12B)
aml_emmc_hs200_tl1(mmc);
err = 0;
}