From 2780a47ffe2fbf5909b0d289a60640d68c0251b9 Mon Sep 17 00:00:00 2001 From: Finley Xiao Date: Wed, 28 Jun 2023 18:06:57 +0800 Subject: [PATCH] arm64: dts: rockchip: rk3588s: Add opp table for vop Signed-off-by: Finley Xiao Signed-off-by: Sandy Huang Change-Id: Ia1c30f8a18cb9e445910e909f39e0a27671f2bfa --- arch/arm64/boot/dts/rockchip/rk3588s.dtsi | 93 ++++++++++++++++------- 1 file changed, 67 insertions(+), 26 deletions(-) diff --git a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi index 8609dae175f6..c154a3a03f0a 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi @@ -1772,49 +1772,49 @@ opp-supported-hw = <0xf9 0xffff>; opp-hz = /bits/ 64 <528000000>; opp-microvolt = <675000 675000 875000>, - <725000 725000 750000>; + <725000 725000 800000>; opp-microvolt-L1 = <675000 675000 875000>, - <700000 700000 750000>; + <700000 700000 800000>; opp-microvolt-L2 = <675000 675000 875000>, - <687500 687500 750000>; + <687500 687500 800000>; opp-microvolt-L3 = <675000 675000 875000>, - <675000 675000 750000>; + <675000 675000 800000>; }; opp-1068000000 { opp-supported-hw = <0xf9 0xffff>; opp-hz = /bits/ 64 <1068000000>; opp-microvolt = <725000 725000 875000>, - <737500 737500 750000>; + <737500 737500 800000>; opp-microvolt-L1 = <700000 700000 875000>, - <712500 712500 750000>; + <712500 712500 800000>; opp-microvolt-L2 = <675000 675000 875000>, - <700000 700000 750000>; + <700000 700000 800000>; opp-microvolt-L3 = <675000 675000 875000>, - <687500 687500 750000>; + <687500 687500 800000>; }; opp-1560000000 { opp-supported-hw = <0xf9 0xffff>; opp-hz = /bits/ 64 <1560000000>; opp-microvolt = <800000 800000 875000>, - <750000 750000 750000>; + <750000 750000 800000>; opp-microvolt-L1 = <775000 775000 875000>, - <725000 725000 750000>; + <725000 725000 800000>; opp-microvolt-L2 = <750000 750000 875000>, - <712500 712500 750000>; + <712500 712500 800000>; opp-microvolt-L3 = <725000 725000 875000>, - <700000 700000 750000>; + <700000 700000 800000>; }; opp-2750000000 { opp-supported-hw = <0xf9 0xffff>; opp-hz = /bits/ 64 <2750000000>; opp-microvolt = <875000 875000 875000>, - <750000 750000 750000>; + <750000 750000 800000>; opp-microvolt-L1 = <850000 850000 875000>, - <750000 750000 750000>; + <750000 750000 800000>; opp-microvolt-L2 = <837500 837500 875000>, - <725000 725000 750000>; + <725000 725000 800000>; opp-microvolt-L3 = <825000 820000 875000>, - <700000 700000 750000>; + <700000 700000 800000>; }; /* RK3588J/M dmc OPPs */ @@ -1822,37 +1822,37 @@ opp-supported-hw = <0x06 0xffff>; opp-hz = /bits/ 64 <528000000>; opp-microvolt = <750000 750000 875000>, - <750000 750000 750000>; + <750000 750000 800000>; }; opp-j-m-1068000000 { opp-supported-hw = <0x06 0xffff>; opp-hz = /bits/ 64 <1068000000>; opp-microvolt = <750000 750000 875000>, - <750000 750000 750000>; + <750000 750000 800000>; }; opp-j-m-1560000000 { opp-supported-hw = <0x06 0xffff>; opp-hz = /bits/ 64 <1560000000>; opp-microvolt = <800000 800000 875000>, - <750000 750000 750000>; + <750000 750000 800000>; opp-microvolt-L1 = <775000 775000 875000>, - <750000 750000 750000>; + <750000 750000 800000>; opp-microvolt-L2 = <750000 750000 875000>, - <750000 750000 750000>; + <750000 750000 800000>; opp-microvolt-L3 = <750000 750000 875000>, - <750000 750000 750000>; + <750000 750000 800000>; }; opp-j-m-2750000000 { opp-supported-hw = <0x06 0xffff>; opp-hz = /bits/ 64 <2750000000>; opp-microvolt = <875000 875000 875000>, - <750000 750000 750000>; + <750000 750000 800000>; opp-microvolt-L1 = <850000 850000 875000>, - <750000 750000 750000>; + <750000 750000 800000>; opp-microvolt-L2 = <837500 837500 875000>, - <750000 750000 750000>; + <750000 750000 800000>; opp-microvolt-L3 = <825000 820000 875000>, - <750000 750000 750000>; + <750000 750000 800000>; }; }; @@ -4649,6 +4649,9 @@ "dclk_vp1", "dclk_vp2", "dclk_vp3"; + rockchip,aclk-normal-mode-rates = <500000000>; + rockchip,aclk-advanced-mode-rates = <750000000>; + operating-points-v2 = <&vop_opp_table>; iommus = <&vop_mmu>; power-domains = <&power RK3588_PD_VOP>; rockchip,grf = <&sys_grf>; @@ -4761,6 +4764,44 @@ }; }; + vop_opp_table: vop-opp-table { + compatible = "operating-points-v2"; + + nvmem-cells = <&log_leakage>; + nvmem-cell-names = "leakage"; + + rockchip,init-freq = <750000>; /* KHz */ + + rockchip,leakage-voltage-sel = < + 1 31 0 + 32 44 1 + 45 57 2 + 58 254 3 + >; + + opp-5000000000 { + opp-hz = /bits/ 64 <500000000>; + opp-microvolt = <725000 725000 800000>; + opp-microvolt-L1 = <700000 700000 800000>; + opp-microvolt-L2 = <687500 687500 800000>; + opp-microvolt-L3 = <675000 675000 800000>; + }; + opp-7500000000 { + opp-hz = /bits/ 64 <750000000>; + opp-microvolt = <725000 725000 800000>; + opp-microvolt-L1 = <700000 700000 800000>; + opp-microvolt-L2 = <687500 687500 800000>; + opp-microvolt-L3 = <675000 675000 800000>; + }; + opp-8500000000 { + opp-hz = /bits/ 64 <850000000>; + opp-microvolt = <800000 800000 800000>; + opp-microvolt-L1 = <775000 775000 800000>; + opp-microvolt-L2 = <750000 750000 800000>; + opp-microvolt-L3 = <750000 750000 800000>; + }; + }; + vop_mmu: iommu@fdd97e00 { compatible = "rockchip,iommu-v2"; reg = <0x0 0xfdd97e00 0x0 0x100>, <0x0 0xfdd97f00 0x0 0x100>;