From 27b569b56887bfb768bce24066778260db546067 Mon Sep 17 00:00:00 2001 From: Po-Wen Kao Date: Wed, 22 Mar 2023 13:32:30 +0800 Subject: [PATCH] FROMLIST: scsi: ufs: core: Add host quirk UFSHCD_QUIRK_MCQ_BROKEN_INTR Quirk UFSHCD_QUIRK_MCQ_BROKEN_INTR is introduced for host that implement different interrupt topology from UFSHCI 4.0 spec. Some host raise per hw queue interrupt in addition to CQES (traditional) when ESI is disabled. Enable this quirk will disable CQES and use only per hw queue interrupt. Bug: 267974767 Link: https://lore.kernel.org/all/20230612085817.12275-2-powen.kao@mediatek.com/ Signed-off-by: Po-Wen Kao Reviewed-by: Stanley Chu Change-Id: I42b24f668ed501bc6c7511898d5b90e8d9fd1492 --- drivers/ufs/core/ufshcd.c | 6 +++++- include/ufs/ufshcd.h | 7 +++++++ 2 files changed, 12 insertions(+), 1 deletion(-) diff --git a/drivers/ufs/core/ufshcd.c b/drivers/ufs/core/ufshcd.c index 5892169b8f83..25e7f7c2d83b 100644 --- a/drivers/ufs/core/ufshcd.c +++ b/drivers/ufs/core/ufshcd.c @@ -8712,11 +8712,15 @@ err: static void ufshcd_config_mcq(struct ufs_hba *hba) { int ret; + u32 intrs; ret = ufshcd_mcq_vops_config_esi(hba); dev_info(hba->dev, "ESI %sconfigured\n", ret ? "is not " : ""); - ufshcd_enable_intr(hba, UFSHCD_ENABLE_MCQ_INTRS); + intrs = UFSHCD_ENABLE_MCQ_INTRS; + if (hba->quirks & UFSHCD_QUIRK_MCQ_BROKEN_INTR) + intrs &= ~MCQ_CQ_EVENT_STATUS; + ufshcd_enable_intr(hba, intrs); ufshcd_mcq_make_queues_operational(hba); ufshcd_mcq_config_mac(hba, hba->nutrs); diff --git a/include/ufs/ufshcd.h b/include/ufs/ufshcd.h index 659598549ce0..08084cac555f 100644 --- a/include/ufs/ufshcd.h +++ b/include/ufs/ufshcd.h @@ -616,6 +616,13 @@ enum ufshcd_quirks { * auto-hibernate capability but it's FASTAUTO only. */ UFSHCD_QUIRK_HIBERN_FASTAUTO = 1 << 18, + + /* + * Some host raises interrupt (per queue) in addition to + * CQES (traditional) when ESI is disabled. + * Enable this quirk will disable CQES and use per queue interrupt. + */ + UFSHCD_QUIRK_MCQ_BROKEN_INTR = 1 << 20, }; enum ufshcd_android_quirks {