From 27dc0c199bd73009e4e3d49e90248976f5153190 Mon Sep 17 00:00:00 2001 From: Andy Yan Date: Wed, 1 Dec 2021 10:07:00 +0800 Subject: [PATCH] drm/rockchip: vop2: Fix hdmi_edp1_pixclk div width Max div of hdmi_edp1_pixclk is 2. Signed-off-by: Andy Yan Change-Id: Idb21a06a586f088f8a332435676a8bb031a384ca --- drivers/gpu/drm/rockchip/rockchip_vop2_clk.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/rockchip/rockchip_vop2_clk.c b/drivers/gpu/drm/rockchip/rockchip_vop2_clk.c index fd5dfaab358e..d381d767d726 100644 --- a/drivers/gpu/drm/rockchip/rockchip_vop2_clk.c +++ b/drivers/gpu/drm/rockchip/rockchip_vop2_clk.c @@ -121,7 +121,7 @@ static struct vop2_clk_branch rk3588_vop_clk_branches[] = { MUX("hdmi_edp1_clk_src", mux_hdmi_edp_clk_src_p, CLK_SET_RATE_PARENT | CLK_SET_RATE_NO_REPARENT), DIV("hdmi_edp1_dclk", "hdmi_edp1_clk_src", 0, 2), - DIV("hdmi_edp1_pixclk", "hdmi_edp1_clk_src", CLK_SET_RATE_PARENT, 2), + DIV("hdmi_edp1_pixclk", "hdmi_edp1_clk_src", CLK_SET_RATE_PARENT, 1), MUX("mipi0_clk_src", mux_mipi_clk_src_p, CLK_SET_RATE_PARENT | CLK_SET_RATE_NO_REPARENT), DIV("mipi0_pixclk", "mipi0_clk_src", CLK_SET_RATE_PARENT, 2),