From 28f15a48873bf0ba7efa0be5524725f449ef36bb Mon Sep 17 00:00:00 2001 From: Cai YiWei Date: Mon, 26 Oct 2020 14:13:19 +0800 Subject: [PATCH] arm64: dts: rockchip: rk3568: add isp node Change-Id: I225988eb7aa7695f536637efb79800ba17e82e15 Signed-off-by: Cai YiWei --- arch/arm64/boot/dts/rockchip/rk3568.dtsi | 42 ++++++++++++++++++++++++ 1 file changed, 42 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3568.dtsi b/arch/arm64/boot/dts/rockchip/rk3568.dtsi index 30e4f28c33ae..9fbe54b20704 100644 --- a/arch/arm64/boot/dts/rockchip/rk3568.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3568.dtsi @@ -1057,6 +1057,48 @@ status = "disabled"; }; + rkisp: rkisp@fdff0000 { + compatible = "rockchip,rk3568-rkisp"; + reg = <0x0 0xfdff0000 0x0 0x10000>; + interrupts = , + , + ; + interrupt-names = "mipi_irq", "mi_irq", "isp_irq"; + clocks = <&cru ACLK_ISP>, <&cru HCLK_ISP>, <&cru CLK_ISP>; + clock-names = "aclk_isp", "hclk_isp", "clk_isp"; + resets = <&cru SRST_ISP>, <&cru SRST_H_ISP>; + reset-names = "isp", "isp-h"; + rockchip,grf = <&grf>; + power-domains = <&power RK3568_PD_VI>; + iommus = <&rkisp_mmu>; + status = "disabled"; + }; + + rkisp_mmu: iommu@fdff1a00 { + compatible = "rockchip,iommu"; + reg = <0x0 0xfdff1a00 0x0 0x100>; + interrupts = ; + interrupt-names = "isp_mmu"; + clocks = <&cru ACLK_ISP>, <&cru HCLK_ISP>; + clock-names = "aclk", "iface"; + power-domains = <&power RK3568_PD_VI>; + #iommu-cells = <0>; + rockchip,disable-mmu-reset; + status = "disabled"; + }; + + rkisp_vir0: rkisp-vir0 { + compatible = "rockchip,rkisp-vir"; + rockchip,hw = <&rkisp>; + status = "disabled"; + }; + + rkisp_vir1: rkisp-vir1 { + compatible = "rockchip,rkisp-vir"; + rockchip,hw = <&rkisp>; + status = "disabled"; + }; + gmac1: ethernet@fe010000 { compatible = "rockchip,rk3568-gmac", "snps,dwmac-4.20a"; reg = <0x0 0xfe010000 0x0 0x10000>;