From 7d56bedb2730dc2ea8abf0fd7240ee99ecfee3c9 Mon Sep 17 00:00:00 2001 From: Tony Lindgren Date: Tue, 26 Mar 2019 10:32:23 -0700 Subject: [PATCH 01/10] ARM: dts: Fix dcan clkctrl clock for am3 We must not use legacy clock defines for dts clckctrl clocks as the offsets will be wrong. Fixes: 87fc89ced3a7 ("ARM: dts: am335x: Move l4 child devices to probe them with ti-sysc") Cc: Tero Kristo Signed-off-by: Tony Lindgren --- arch/arm/boot/dts/am33xx-l4.dtsi | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm/boot/dts/am33xx-l4.dtsi b/arch/arm/boot/dts/am33xx-l4.dtsi index f459ec316a22..ca6d9f02a800 100644 --- a/arch/arm/boot/dts/am33xx-l4.dtsi +++ b/arch/arm/boot/dts/am33xx-l4.dtsi @@ -1762,7 +1762,7 @@ reg = <0xcc000 0x4>; reg-names = "rev"; /* Domains (P, C): per_pwrdm, l4ls_clkdm */ - clocks = <&l4ls_clkctrl AM3_D_CAN0_CLKCTRL 0>; + clocks = <&l4ls_clkctrl AM3_L4LS_D_CAN0_CLKCTRL 0>; clock-names = "fck"; #address-cells = <1>; #size-cells = <1>; @@ -1785,7 +1785,7 @@ reg = <0xd0000 0x4>; reg-names = "rev"; /* Domains (P, C): per_pwrdm, l4ls_clkdm */ - clocks = <&l4ls_clkctrl AM3_D_CAN1_CLKCTRL 0>; + clocks = <&l4ls_clkctrl AM3_L4LS_D_CAN1_CLKCTRL 0>; clock-names = "fck"; #address-cells = <1>; #size-cells = <1>; From 7f0d078667a494466991aa7133f49594f32ff6a2 Mon Sep 17 00:00:00 2001 From: Tony Lindgren Date: Thu, 21 Mar 2019 11:00:21 -0700 Subject: [PATCH 02/10] ARM: OMAP2+: Fix potentially uninitialized return value for _setup_reset() Commit 747834ab8347 ("ARM: OMAP2+: hwmod: revise hardreset behavior") made the call to _enable() conditional based on no oh->rst_lines_cnt. This caused the return value to be potentially uninitialized. Curiously we see no compiler warnings for this, probably as this gets inlined. We call _setup_reset() from _setup() and only _setup_postsetup() if the return value is zero. Currently the return value can be uninitialized for cases where oh->rst_lines_cnt is set and HWMOD_INIT_NO_RESET is not set. Fixes: 747834ab8347 ("ARM: OMAP2+: hwmod: revise hardreset behavior") Cc: Paul Walmsley Cc: Tero Kristo Signed-off-by: Tony Lindgren --- arch/arm/mach-omap2/omap_hwmod.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c index 3a04c73ac03c..21afaf630caa 100644 --- a/arch/arm/mach-omap2/omap_hwmod.c +++ b/arch/arm/mach-omap2/omap_hwmod.c @@ -2465,7 +2465,7 @@ static void _setup_iclk_autoidle(struct omap_hwmod *oh) */ static int _setup_reset(struct omap_hwmod *oh) { - int r; + int r = 0; if (oh->_state != _HWMOD_STATE_INITIALIZED) return -EINVAL; From 798bd175ab0d8024652ddba2cacaba6768c63c30 Mon Sep 17 00:00:00 2001 From: Tony Lindgren Date: Thu, 21 Mar 2019 11:00:21 -0700 Subject: [PATCH 03/10] ARM: OMAP2+: Make interconnect target module allocation functions static Only omap_hwmod_init_module() gets called, the rest of the interconnect target module allocation functions can be static. Cc: Paul Walmsley Cc: Tero Kristo Signed-off-by: Tony Lindgren --- arch/arm/mach-omap2/omap_hwmod.c | 30 ++++++++++++++++-------------- 1 file changed, 16 insertions(+), 14 deletions(-) diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c index 21afaf630caa..b88cf32cf8a9 100644 --- a/arch/arm/mach-omap2/omap_hwmod.c +++ b/arch/arm/mach-omap2/omap_hwmod.c @@ -3241,9 +3241,10 @@ static int omap_hwmod_init_regbits(struct device *dev, * @sysc_offs: sysc register offset * @syss_offs: syss register offset */ -int omap_hwmod_init_reg_offs(struct device *dev, - const struct ti_sysc_module_data *data, - s32 *rev_offs, s32 *sysc_offs, s32 *syss_offs) +static int omap_hwmod_init_reg_offs(struct device *dev, + const struct ti_sysc_module_data *data, + s32 *rev_offs, s32 *sysc_offs, + s32 *syss_offs) { *rev_offs = -ENODEV; *sysc_offs = 0; @@ -3267,9 +3268,9 @@ int omap_hwmod_init_reg_offs(struct device *dev, * @data: module data * @sysc_flags: module configuration */ -int omap_hwmod_init_sysc_flags(struct device *dev, - const struct ti_sysc_module_data *data, - u32 *sysc_flags) +static int omap_hwmod_init_sysc_flags(struct device *dev, + const struct ti_sysc_module_data *data, + u32 *sysc_flags) { *sysc_flags = 0; @@ -3341,9 +3342,9 @@ int omap_hwmod_init_sysc_flags(struct device *dev, * @data: module data * @idlemodes: module supported idle modes */ -int omap_hwmod_init_idlemodes(struct device *dev, - const struct ti_sysc_module_data *data, - u32 *idlemodes) +static int omap_hwmod_init_idlemodes(struct device *dev, + const struct ti_sysc_module_data *data, + u32 *idlemodes) { *idlemodes = 0; @@ -3434,11 +3435,12 @@ static int omap_hwmod_check_module(struct device *dev, * * Note that the allocations here cannot use devm as ti-sysc can rebind. */ -int omap_hwmod_allocate_module(struct device *dev, struct omap_hwmod *oh, - const struct ti_sysc_module_data *data, - struct sysc_regbits *sysc_fields, - s32 rev_offs, s32 sysc_offs, s32 syss_offs, - u32 sysc_flags, u32 idlemodes) +static int omap_hwmod_allocate_module(struct device *dev, struct omap_hwmod *oh, + const struct ti_sysc_module_data *data, + struct sysc_regbits *sysc_fields, + s32 rev_offs, s32 sysc_offs, + s32 syss_offs, u32 sysc_flags, + u32 idlemodes) { struct omap_hwmod_class_sysconfig *sysc; struct omap_hwmod_class *class; From 513a4abb19d55253ea9490288986ec781a78b786 Mon Sep 17 00:00:00 2001 From: Tony Lindgren Date: Thu, 21 Mar 2019 11:00:21 -0700 Subject: [PATCH 04/10] ARM: OMAP2+: Prepare class allocation for dynamically allocated modules For dynamically allocated sysconfig data we only need to allocate a new class for the cases where the class is shared. For dynamically allocated struct omap_hwmod we will always allocate a new class. Let's add detection for when we need to allocate a new class by comparing the class name against the module name. If they match, there's no need to allocate a new calls as we don't have case of mixed platform data and dts data initialized modules for the same class. Let's also move the init of class data inside the spinlock. Cc: Paul Walmsley Cc: Tero Kristo Signed-off-by: Tony Lindgren --- arch/arm/mach-omap2/omap_hwmod.c | 18 ++++++++++-------- 1 file changed, 10 insertions(+), 8 deletions(-) diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c index b88cf32cf8a9..dc172fff9ced 100644 --- a/arch/arm/mach-omap2/omap_hwmod.c +++ b/arch/arm/mach-omap2/omap_hwmod.c @@ -3443,7 +3443,7 @@ static int omap_hwmod_allocate_module(struct device *dev, struct omap_hwmod *oh, u32 idlemodes) { struct omap_hwmod_class_sysconfig *sysc; - struct omap_hwmod_class *class; + struct omap_hwmod_class *class = NULL; void __iomem *regs = NULL; unsigned long flags; @@ -3467,19 +3467,21 @@ static int omap_hwmod_allocate_module(struct device *dev, struct omap_hwmod *oh, } /* - * We need new oh->class as the other devices in the same class + * We may need a new oh->class as the other devices in the same class * may not yet have ioremapped their registers. */ - class = kmemdup(oh->class, sizeof(*oh->class), GFP_KERNEL); - if (!class) - return -ENOMEM; - - class->sysc = sysc; + if (oh->class->name && strcmp(oh->class->name, data->name)) { + class = kmemdup(oh->class, sizeof(*oh->class), GFP_KERNEL); + if (!class) + return -ENOMEM; + } spin_lock_irqsave(&oh->_lock, flags); if (regs) oh->_mpu_rt_va = regs; - oh->class = class; + if (class) + oh->class = class; + oh->class->sysc = sysc; oh->_state = _HWMOD_STATE_INITIALIZED; _setup(oh, NULL); spin_unlock_irqrestore(&oh->_lock, flags); From 6d63b12d182ec9924a8236f7cd1db5966c3bcd20 Mon Sep 17 00:00:00 2001 From: Tony Lindgren Date: Thu, 21 Mar 2019 11:00:21 -0700 Subject: [PATCH 05/10] ARM: OMAP2+: Define _HWMOD_STATE_DEFAULT and use it For dynamically allocated struct hwmod entries probing with ti-sysc interconnect target module driver, we need to specify the initial default state the same way as we do for the platform data cases. Let's prepare for that by adding _HWMOD_STATE_DEFAULT that we can then use to set the initial default state without a need to add similar CONFIG_PM handling in multiple places. Cc: Paul Walmsley Cc: Tero Kristo Signed-off-by: Tony Lindgren --- arch/arm/mach-omap2/io.c | 7 +------ arch/arm/mach-omap2/omap_hwmod.h | 6 ++++++ 2 files changed, 7 insertions(+), 6 deletions(-) diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c index bb8e0bb7ef5d..5e69c8caa1db 100644 --- a/arch/arm/mach-omap2/io.c +++ b/arch/arm/mach-omap2/io.c @@ -411,14 +411,9 @@ static int _set_hwmod_postsetup_state(struct omap_hwmod *oh, void *data) static void __init __maybe_unused omap_hwmod_init_postsetup(void) { - u8 postsetup_state; + u8 postsetup_state = _HWMOD_STATE_DEFAULT; /* Set the default postsetup state for all hwmods */ -#ifdef CONFIG_PM - postsetup_state = _HWMOD_STATE_IDLE; -#else - postsetup_state = _HWMOD_STATE_ENABLED; -#endif omap_hwmod_for_each(_set_hwmod_postsetup_state, &postsetup_state); } diff --git a/arch/arm/mach-omap2/omap_hwmod.h b/arch/arm/mach-omap2/omap_hwmod.h index b70cdc21f8a2..51b4332eadf8 100644 --- a/arch/arm/mach-omap2/omap_hwmod.h +++ b/arch/arm/mach-omap2/omap_hwmod.h @@ -493,6 +493,12 @@ struct omap_hwmod_omap4_prcm { #define _HWMOD_STATE_IDLE 5 #define _HWMOD_STATE_DISABLED 6 +#ifdef CONFIG_PM +#define _HWMOD_STATE_DEFAULT _HWMOD_STATE_IDLE +#else +#define _HWMOD_STATE_DEFAULT _HWMOD_STATE_ENABLED +#endif + /** * struct omap_hwmod_class - the type of an IP block * @name: name of the hwmod_class From b57250fa5eb35cd805e7eee7f7b5a4b3b3cb4227 Mon Sep 17 00:00:00 2001 From: Tony Lindgren Date: Thu, 21 Mar 2019 11:00:21 -0700 Subject: [PATCH 06/10] ARM: OMAP2+: Allocate struct omap_hwmod based on dts data With ti-sysc interconnect target module, we can allocate struct omap_hwmod data based on the devicetree data. This allows dropping the static SoC specific data eventually so we will only boot with data we actually need. To allocate struct omap_hwmod dynamically, we need to add a mutex for modifying the list, and remove __init for few functions. Note that we are not initialized oh->_clk or the optional clocks and their related quirks. That can be directly handled by the interconnect target module driver. Cc: Paul Walmsley Cc: Tero Kristo Signed-off-by: Tony Lindgren --- arch/arm/mach-omap2/omap_hwmod.c | 82 ++++++++++++++++++++++++++++++-- 1 file changed, 78 insertions(+), 4 deletions(-) diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c index dc172fff9ced..ed3d503167f4 100644 --- a/arch/arm/mach-omap2/omap_hwmod.c +++ b/arch/arm/mach-omap2/omap_hwmod.c @@ -235,6 +235,7 @@ static struct omap_hwmod_soc_ops soc_ops; /* omap_hwmod_list contains all registered struct omap_hwmods */ static LIST_HEAD(omap_hwmod_list); +static DEFINE_MUTEX(list_lock); /* mpu_oh: used to add/remove MPU initiator from sleepdep list */ static struct omap_hwmod *mpu_oh; @@ -2624,7 +2625,7 @@ static int _setup(struct omap_hwmod *oh, void *data) * that the copy process would be relatively complex due to the large number * of substructures. */ -static int __init _register(struct omap_hwmod *oh) +static int _register(struct omap_hwmod *oh) { if (!oh || !oh->name || !oh->class || !oh->class->name || (oh->_state != _HWMOD_STATE_UNKNOWN)) @@ -2663,7 +2664,7 @@ static int __init _register(struct omap_hwmod *oh) * locking in this code. Changes to this assumption will require * additional locking. Returns 0. */ -static int __init _add_link(struct omap_hwmod_ocp_if *oi) +static int _add_link(struct omap_hwmod_ocp_if *oi) { pr_debug("omap_hwmod: %s -> %s: adding link\n", oi->master->name, oi->slave->name); @@ -3444,6 +3445,9 @@ static int omap_hwmod_allocate_module(struct device *dev, struct omap_hwmod *oh, { struct omap_hwmod_class_sysconfig *sysc; struct omap_hwmod_class *class = NULL; + struct omap_hwmod_ocp_if *oi = NULL; + struct clockdomain *clkdm = NULL; + struct clk *clk = NULL; void __iomem *regs = NULL; unsigned long flags; @@ -3476,13 +3480,62 @@ static int omap_hwmod_allocate_module(struct device *dev, struct omap_hwmod *oh, return -ENOMEM; } + if (list_empty(&oh->slave_ports)) { + oi = kcalloc(1, sizeof(*oi), GFP_KERNEL); + if (!oi) + return -ENOMEM; + + /* + * Note that we assume interconnect interface clocks will be + * managed by the interconnect driver for OCPIF_SWSUP_IDLE case + * on omap24xx and omap3. + */ + oi->slave = oh; + oi->user = OCP_USER_MPU | OCP_USER_SDMA; + } + + if (!oh->_clk) { + struct clk_hw_omap *hwclk; + + clk = of_clk_get_by_name(dev->of_node, "fck"); + if (!IS_ERR(clk)) + clk_prepare(clk); + else + clk = NULL; + + /* + * Populate clockdomain based on dts clock. It is needed for + * clkdm_deny_idle() and clkdm_allow_idle() until we have have + * interconnect driver and reset driver capable of blocking + * clockdomain idle during reset, enable and idle. + */ + if (clk) { + hwclk = to_clk_hw_omap(__clk_get_hw(clk)); + if (hwclk && hwclk->clkdm_name) + clkdm = clkdm_lookup(hwclk->clkdm_name); + } + + /* + * Note that we assume interconnect driver manages the clocks + * and do not need to populate oh->_clk for dynamically + * allocated modules. + */ + clk_unprepare(clk); + clk_put(clk); + } + spin_lock_irqsave(&oh->_lock, flags); if (regs) oh->_mpu_rt_va = regs; if (class) oh->class = class; oh->class->sysc = sysc; + if (oi) + _add_link(oi); + if (clkdm) + oh->clkdm = clkdm; oh->_state = _HWMOD_STATE_INITIALIZED; + oh->_postsetup_state = _HWMOD_STATE_DEFAULT; _setup(oh, NULL); spin_unlock_irqrestore(&oh->_lock, flags); @@ -3509,8 +3562,29 @@ int omap_hwmod_init_module(struct device *dev, return -EINVAL; oh = _lookup(data->name); - if (!oh) - return -ENODEV; + if (!oh) { + oh = kzalloc(sizeof(*oh), GFP_KERNEL); + if (!oh) + return -ENOMEM; + + oh->name = data->name; + oh->_state = _HWMOD_STATE_UNKNOWN; + lockdep_register_key(&oh->hwmod_key); + + /* Unused, can be handled by PRM driver handling resets */ + oh->prcm.omap4.flags = HWMOD_OMAP4_NO_CONTEXT_LOSS_BIT; + + oh->class = kzalloc(sizeof(*oh->class), GFP_KERNEL); + if (!oh->class) { + kfree(oh); + return -ENOMEM; + } + + oh->class->name = data->name; + mutex_lock(&list_lock); + error = _register(oh); + mutex_unlock(&list_lock); + } cookie->data = oh; From 70451127873fee41b966328e1617ccc04f6998e7 Mon Sep 17 00:00:00 2001 From: Tony Lindgren Date: Thu, 21 Mar 2019 11:00:21 -0700 Subject: [PATCH 07/10] ARM: OMAP2+: Remove hwmod .rev data and use local SoC checks instead We can just check for omap2 and 3 for i2c and smartreflex locally. The rest of the .rev data is already unused. Cc: Paul Walmsley Cc: Tero Kristo Signed-off-by: Tony Lindgren --- arch/arm/mach-omap2/i2c.c | 11 +++-------- arch/arm/mach-omap2/omap_hwmod.h | 2 -- arch/arm/mach-omap2/omap_hwmod_2420_data.c | 1 - arch/arm/mach-omap2/omap_hwmod_2430_data.c | 1 - arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c | 1 - .../mach-omap2/omap_hwmod_33xx_43xx_ipblock_data.c | 2 -- arch/arm/mach-omap2/omap_hwmod_3xxx_data.c | 4 ---- arch/arm/mach-omap2/omap_hwmod_44xx_data.c | 3 --- arch/arm/mach-omap2/omap_hwmod_54xx_data.c | 2 -- arch/arm/mach-omap2/omap_hwmod_7xx_data.c | 5 ----- arch/arm/mach-omap2/omap_hwmod_81xx_data.c | 1 - arch/arm/mach-omap2/sr_device.c | 5 ++++- 12 files changed, 7 insertions(+), 31 deletions(-) diff --git a/arch/arm/mach-omap2/i2c.c b/arch/arm/mach-omap2/i2c.c index 37ff25ee3d89..1d8efc303daf 100644 --- a/arch/arm/mach-omap2/i2c.c +++ b/arch/arm/mach-omap2/i2c.c @@ -53,15 +53,10 @@ int omap_i2c_reset(struct omap_hwmod *oh) u16 i2c_con; int c = 0; - if (oh->class->rev == OMAP_I2C_IP_VERSION_2) { - i2c_con = OMAP4_I2C_CON_OFFSET; - } else if (oh->class->rev == OMAP_I2C_IP_VERSION_1) { + if (soc_is_omap24xx() || soc_is_omap34xx() || soc_is_am35xx()) i2c_con = OMAP2_I2C_CON_OFFSET; - } else { - WARN(1, "Cannot reset I2C block %s: unsupported revision\n", - oh->name); - return -EINVAL; - } + else + i2c_con = OMAP4_I2C_CON_OFFSET; /* Disable I2C */ v = omap_hwmod_read(oh, i2c_con); diff --git a/arch/arm/mach-omap2/omap_hwmod.h b/arch/arm/mach-omap2/omap_hwmod.h index 51b4332eadf8..fca9e072154b 100644 --- a/arch/arm/mach-omap2/omap_hwmod.h +++ b/arch/arm/mach-omap2/omap_hwmod.h @@ -503,7 +503,6 @@ struct omap_hwmod_omap4_prcm { * struct omap_hwmod_class - the type of an IP block * @name: name of the hwmod_class * @sysc: device SYSCONFIG/SYSSTATUS register data - * @rev: revision of the IP class * @pre_shutdown: ptr to fn to be executed immediately prior to device shutdown * @reset: ptr to fn to be executed in place of the standard hwmod reset fn * @enable_preprogram: ptr to fn to be executed during device enable @@ -529,7 +528,6 @@ struct omap_hwmod_omap4_prcm { struct omap_hwmod_class { const char *name; struct omap_hwmod_class_sysconfig *sysc; - u32 rev; int (*pre_shutdown)(struct omap_hwmod *oh); int (*reset)(struct omap_hwmod *oh); int (*enable_preprogram)(struct omap_hwmod *oh); diff --git a/arch/arm/mach-omap2/omap_hwmod_2420_data.c b/arch/arm/mach-omap2/omap_hwmod_2420_data.c index d684fac8f592..8122c8d4b69a 100644 --- a/arch/arm/mach-omap2/omap_hwmod_2420_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_2420_data.c @@ -91,7 +91,6 @@ static struct omap_hwmod_class_sysconfig i2c_sysc = { static struct omap_hwmod_class i2c_class = { .name = "i2c", .sysc = &i2c_sysc, - .rev = OMAP_I2C_IP_VERSION_1, .reset = &omap_i2c_reset, }; diff --git a/arch/arm/mach-omap2/omap_hwmod_2430_data.c b/arch/arm/mach-omap2/omap_hwmod_2430_data.c index abef9f6f9bf5..f27cb60bde77 100644 --- a/arch/arm/mach-omap2/omap_hwmod_2430_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_2430_data.c @@ -68,7 +68,6 @@ static struct omap_hwmod_class_sysconfig i2c_sysc = { static struct omap_hwmod_class i2c_class = { .name = "i2c", .sysc = &i2c_sysc, - .rev = OMAP_I2C_IP_VERSION_1, .reset = &omap_i2c_reset, }; diff --git a/arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c b/arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c index 5345919a81f8..ed5f39d948de 100644 --- a/arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c @@ -96,7 +96,6 @@ static struct omap_hwmod_class_sysconfig omap2xxx_gpio_sysc = { struct omap_hwmod_class omap2xxx_gpio_hwmod_class = { .name = "gpio", .sysc = &omap2xxx_gpio_sysc, - .rev = 0, }; /* system dma */ diff --git a/arch/arm/mach-omap2/omap_hwmod_33xx_43xx_ipblock_data.c b/arch/arm/mach-omap2/omap_hwmod_33xx_43xx_ipblock_data.c index 9ded7bf972e7..ce2d5181349b 100644 --- a/arch/arm/mach-omap2/omap_hwmod_33xx_43xx_ipblock_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_33xx_43xx_ipblock_data.c @@ -534,7 +534,6 @@ static struct omap_hwmod_class_sysconfig am33xx_gpio_sysc = { struct omap_hwmod_class am33xx_gpio_hwmod_class = { .name = "gpio", .sysc = &am33xx_gpio_sysc, - .rev = 2, }; /* gpio1 */ @@ -643,7 +642,6 @@ static struct omap_hwmod_class_sysconfig am33xx_i2c_sysc = { static struct omap_hwmod_class i2c_class = { .name = "i2c", .sysc = &am33xx_i2c_sysc, - .rev = OMAP_I2C_IP_VERSION_2, .reset = &omap_i2c_reset, }; diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c index 23e6a41a18eb..edff39921bf8 100644 --- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c @@ -484,7 +484,6 @@ static struct omap_hwmod am35xx_uart4_hwmod = { static struct omap_hwmod_class i2c_class = { .name = "i2c", .sysc = &i2c_sysc, - .rev = OMAP_I2C_IP_VERSION_1, .reset = &omap_i2c_reset, }; @@ -707,7 +706,6 @@ static struct omap_hwmod_class_sysconfig omap3xxx_gpio_sysc = { static struct omap_hwmod_class omap3xxx_gpio_hwmod_class = { .name = "gpio", .sysc = &omap3xxx_gpio_sysc, - .rev = 1, }; /* gpio1 */ @@ -1029,7 +1027,6 @@ static struct omap_hwmod_class_sysconfig omap34xx_sr_sysc = { static struct omap_hwmod_class omap34xx_smartreflex_hwmod_class = { .name = "smartreflex", .sysc = &omap34xx_sr_sysc, - .rev = 1, }; static struct omap_hwmod_class_sysconfig omap36xx_sr_sysc = { @@ -1044,7 +1041,6 @@ static struct omap_hwmod_class_sysconfig omap36xx_sr_sysc = { static struct omap_hwmod_class omap36xx_smartreflex_hwmod_class = { .name = "smartreflex", .sysc = &omap36xx_sr_sysc, - .rev = 2, }; /* SR1 */ diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c index a95dbac57a81..8e66ce9b769b 100644 --- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c @@ -1075,7 +1075,6 @@ static struct omap_hwmod_class_sysconfig omap44xx_gpio_sysc = { static struct omap_hwmod_class omap44xx_gpio_hwmod_class = { .name = "gpio", .sysc = &omap44xx_gpio_sysc, - .rev = 2, }; /* gpio1 */ @@ -1374,7 +1373,6 @@ static struct omap_hwmod_class_sysconfig omap44xx_i2c_sysc = { static struct omap_hwmod_class omap44xx_i2c_hwmod_class = { .name = "i2c", .sysc = &omap44xx_i2c_sysc, - .rev = OMAP_I2C_IP_VERSION_2, .reset = &omap_i2c_reset, }; @@ -2367,7 +2365,6 @@ static struct omap_hwmod_class_sysconfig omap44xx_smartreflex_sysc = { static struct omap_hwmod_class omap44xx_smartreflex_hwmod_class = { .name = "smartreflex", .sysc = &omap44xx_smartreflex_sysc, - .rev = 2, }; /* smartreflex_core */ diff --git a/arch/arm/mach-omap2/omap_hwmod_54xx_data.c b/arch/arm/mach-omap2/omap_hwmod_54xx_data.c index 115473d441cd..26d5a37d4a40 100644 --- a/arch/arm/mach-omap2/omap_hwmod_54xx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_54xx_data.c @@ -620,7 +620,6 @@ static struct omap_hwmod_class_sysconfig omap54xx_gpio_sysc = { static struct omap_hwmod_class omap54xx_gpio_hwmod_class = { .name = "gpio", .sysc = &omap54xx_gpio_sysc, - .rev = 2, }; /* gpio1 */ @@ -819,7 +818,6 @@ static struct omap_hwmod_class omap54xx_i2c_hwmod_class = { .name = "i2c", .sysc = &omap54xx_i2c_sysc, .reset = &omap_i2c_reset, - .rev = OMAP_I2C_IP_VERSION_2, }; /* i2c1 */ diff --git a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c index e6c7061a8e73..87d1de79b032 100644 --- a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c @@ -693,7 +693,6 @@ static struct omap_hwmod_class_sysconfig dra7xx_aes_sysc = { static struct omap_hwmod_class dra7xx_aes_hwmod_class = { .name = "aes", .sysc = &dra7xx_aes_sysc, - .rev = 2, }; /* AES1 */ @@ -737,7 +736,6 @@ static struct omap_hwmod_class_sysconfig dra7xx_sha0_sysc = { static struct omap_hwmod_class dra7xx_sha0_hwmod_class = { .name = "sham", .sysc = &dra7xx_sha0_sysc, - .rev = 2, }; struct omap_hwmod dra7xx_sha0_hwmod = { @@ -811,7 +809,6 @@ static struct omap_hwmod_class_sysconfig dra7xx_gpio_sysc = { static struct omap_hwmod_class dra7xx_gpio_hwmod_class = { .name = "gpio", .sysc = &dra7xx_gpio_sysc, - .rev = 2, }; /* gpio1 */ @@ -1085,7 +1082,6 @@ static struct omap_hwmod_class dra7xx_i2c_hwmod_class = { .name = "i2c", .sysc = &dra7xx_i2c_sysc, .reset = &omap_i2c_reset, - .rev = OMAP_I2C_IP_VERSION_2, }; /* i2c1 */ @@ -2019,7 +2015,6 @@ static struct omap_hwmod_class_sysconfig dra7xx_smartreflex_sysc = { static struct omap_hwmod_class dra7xx_smartreflex_hwmod_class = { .name = "smartreflex", .sysc = &dra7xx_smartreflex_sysc, - .rev = 2, }; /* smartreflex_core */ diff --git a/arch/arm/mach-omap2/omap_hwmod_81xx_data.c b/arch/arm/mach-omap2/omap_hwmod_81xx_data.c index debcd88ab971..83230d9ce5ed 100644 --- a/arch/arm/mach-omap2/omap_hwmod_81xx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_81xx_data.c @@ -484,7 +484,6 @@ static struct omap_hwmod_class_sysconfig dm81xx_gpio_sysc = { static struct omap_hwmod_class dm81xx_gpio_hwmod_class = { .name = "gpio", .sysc = &dm81xx_gpio_sysc, - .rev = 2, }; static struct omap_hwmod_opt_clk gpio1_opt_clks[] = { diff --git a/arch/arm/mach-omap2/sr_device.c b/arch/arm/mach-omap2/sr_device.c index 0854ed9ff379..248f6d9a1bb3 100644 --- a/arch/arm/mach-omap2/sr_device.c +++ b/arch/arm/mach-omap2/sr_device.c @@ -119,7 +119,10 @@ static int __init sr_dev_init(struct omap_hwmod *oh, void *user) } sr_data->name = oh->name; - sr_data->ip_type = oh->class->rev; + if (cpu_is_omap343x()) + sr_data->ip_type = 1; + else + sr_data->ip_type = 2; sr_data->senn_mod = 0x1; sr_data->senp_mod = 0x1; From 8b30919a4e3c7aba32dd72e8208147a6496cb16c Mon Sep 17 00:00:00 2001 From: Tony Lindgren Date: Thu, 21 Mar 2019 11:00:21 -0700 Subject: [PATCH 08/10] ARM: OMAP2+: Handle reset quirks for dynamically allocated modules For dynamically allocated struct omap_hwmod data, we need to populate the device IP specific reset quirks. Cc: Paul Walmsley Cc: Tero Kristo Signed-off-by: Tony Lindgren --- arch/arm/mach-omap2/common.h | 9 +++ arch/arm/mach-omap2/mmc.h | 8 +++ arch/arm/mach-omap2/omap_hwmod.c | 70 +++++++++++++++++++++++ arch/arm/mach-omap2/omap_hwmod_7xx_data.c | 2 +- 4 files changed, 88 insertions(+), 1 deletion(-) diff --git a/arch/arm/mach-omap2/common.h b/arch/arm/mach-omap2/common.h index 129455e822e4..6316da3623b3 100644 --- a/arch/arm/mach-omap2/common.h +++ b/arch/arm/mach-omap2/common.h @@ -336,6 +336,15 @@ static inline void omap5_secondary_hyp_startup(void) } #endif +#ifdef CONFIG_SOC_DRA7XX +extern int dra7xx_pciess_reset(struct omap_hwmod *oh); +#else +static inline int dra7xx_pciess_reset(struct omap_hwmod *oh) +{ + return 0; +} +#endif + void pdata_quirks_init(const struct of_device_id *); void omap_auxdata_legacy_init(struct device *dev); void omap_pcs_legacy_init(int irq, void (*rearm)(void)); diff --git a/arch/arm/mach-omap2/mmc.h b/arch/arm/mach-omap2/mmc.h index 9145a6f720fc..7f4e053c3434 100644 --- a/arch/arm/mach-omap2/mmc.h +++ b/arch/arm/mach-omap2/mmc.h @@ -7,7 +7,15 @@ #define OMAP4_MMC_REG_OFFSET 0x100 struct omap_hwmod; + +#ifdef CONFIG_SOC_OMAP2420 int omap_msdi_reset(struct omap_hwmod *oh); +#else +static inline int omap_msdi_reset(struct omap_hwmod *oh) +{ + return 0; +} +#endif /* called from board-specific card detection service routine */ extern void omap_mmc_notify_cover_event(struct device *dev, int slot, diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c index ed3d503167f4..9170fbfb7c59 100644 --- a/arch/arm/mach-omap2/omap_hwmod.c +++ b/arch/arm/mach-omap2/omap_hwmod.c @@ -155,6 +155,8 @@ #include "soc.h" #include "common.h" #include "clockdomain.h" +#include "hdq1w.h" +#include "mmc.h" #include "powerdomain.h" #include "cm2xxx.h" #include "cm3xxx.h" @@ -165,6 +167,7 @@ #include "prm33xx.h" #include "prminst44xx.h" #include "pm.h" +#include "wd_timer.h" /* Name of the OMAP hwmod for the MPU */ #define MPU_INITIATOR_NAME "mpu" @@ -204,6 +207,20 @@ struct clkctrl_provider { static LIST_HEAD(clkctrl_providers); +/** + * struct omap_hwmod_reset - IP specific reset functions + * @match: string to match against the module name + * @len: number of characters to match + * @reset: IP specific reset function + * + * Used only in cases where struct omap_hwmod is dynamically allocated. + */ +struct omap_hwmod_reset { + const char *match; + int len; + int (*reset)(struct omap_hwmod *oh); +}; + /** * struct omap_hwmod_soc_ops - fn ptrs for some SoC-specific operations * @enable_module: function to enable a module (via MODULEMODE) @@ -3542,6 +3559,57 @@ static int omap_hwmod_allocate_module(struct device *dev, struct omap_hwmod *oh, return 0; } +static const struct omap_hwmod_reset omap24xx_reset_quirks[] = { + { .match = "msdi", .len = 4, .reset = omap_msdi_reset, }, +}; + +static const struct omap_hwmod_reset dra7_reset_quirks[] = { + { .match = "pcie", .len = 4, .reset = dra7xx_pciess_reset, }, +}; + +static const struct omap_hwmod_reset omap_reset_quirks[] = { + { .match = "dss", .len = 3, .reset = omap_dss_reset, }, + { .match = "hdq1w", .len = 5, .reset = omap_hdq1w_reset, }, + { .match = "i2c", .len = 3, .reset = omap_i2c_reset, }, + { .match = "wd_timer", .len = 8, .reset = omap2_wd_timer_reset, }, +}; + +static void +omap_hwmod_init_reset_quirk(struct device *dev, struct omap_hwmod *oh, + const struct ti_sysc_module_data *data, + const struct omap_hwmod_reset *quirks, + int quirks_sz) +{ + const struct omap_hwmod_reset *quirk; + int i; + + for (i = 0; i < quirks_sz; i++) { + quirk = &quirks[i]; + if (!strncmp(data->name, quirk->match, quirk->len)) { + oh->class->reset = quirk->reset; + + return; + } + } +} + +static void +omap_hwmod_init_reset_quirks(struct device *dev, struct omap_hwmod *oh, + const struct ti_sysc_module_data *data) +{ + if (soc_is_omap24xx()) + omap_hwmod_init_reset_quirk(dev, oh, data, + omap24xx_reset_quirks, + ARRAY_SIZE(omap24xx_reset_quirks)); + + if (soc_is_dra7xx()) + omap_hwmod_init_reset_quirk(dev, oh, data, dra7_reset_quirks, + ARRAY_SIZE(dra7_reset_quirks)); + + omap_hwmod_init_reset_quirk(dev, oh, data, omap_reset_quirks, + ARRAY_SIZE(omap_reset_quirks)); +} + /** * omap_hwmod_init_module - initialize new module * @dev: struct device @@ -3580,6 +3648,8 @@ int omap_hwmod_init_module(struct device *dev, return -ENOMEM; } + omap_hwmod_init_reset_quirks(dev, oh, data); + oh->class->name = data->name; mutex_lock(&list_lock); error = _register(oh); diff --git a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c index 87d1de79b032..7a800f428238 100644 --- a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c @@ -1828,7 +1828,7 @@ static struct omap_hwmod dra7xx_ocp2scp3_hwmod = { * We use a PCIeSS HWMOD class specific reset handler to deassert the hardreset * lines after asserting them. */ -static int dra7xx_pciess_reset(struct omap_hwmod *oh) +int dra7xx_pciess_reset(struct omap_hwmod *oh) { int i; From f8033678c6fe11a3e4cd31bca36b38e05c6ba9e5 Mon Sep 17 00:00:00 2001 From: "Andrew F. Davis" Date: Tue, 9 Apr 2019 08:05:16 -0700 Subject: [PATCH 09/10] ARM: OMAP2+: Wakeupgen: AM43xx HS devices should save context like non-HS Unlike some previous generation devices, AM43xx HS IRQ and Wakegen context is handled by the ROM for us, and no secure service call is needed or supported. Non-GP AM43xx devices should take the same path as GP. Signed-off-by: Andrew F. Davis Signed-off-by: Tony Lindgren --- arch/arm/mach-omap2/omap-wakeupgen.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm/mach-omap2/omap-wakeupgen.c b/arch/arm/mach-omap2/omap-wakeupgen.c index 17558be4bf0a..7dcbe1736f7e 100644 --- a/arch/arm/mach-omap2/omap-wakeupgen.c +++ b/arch/arm/mach-omap2/omap-wakeupgen.c @@ -436,13 +436,13 @@ static int irq_notifier(struct notifier_block *self, unsigned long cmd, void *v) { switch (cmd) { case CPU_CLUSTER_PM_ENTER: - if (omap_type() == OMAP2_DEVICE_TYPE_GP) + if (omap_type() == OMAP2_DEVICE_TYPE_GP || soc_is_am43xx()) irq_save_context(); else irq_save_secure_context(); break; case CPU_CLUSTER_PM_EXIT: - if (omap_type() == OMAP2_DEVICE_TYPE_GP) + if (omap_type() == OMAP2_DEVICE_TYPE_GP || soc_is_am43xx()) irq_restore_context(); break; } From 72aff4ecf1cb85a3c6e6b42ccbda0bc631b090b3 Mon Sep 17 00:00:00 2001 From: Kabir Sahane Date: Tue, 9 Apr 2019 08:05:17 -0700 Subject: [PATCH 10/10] ARM: OMAP2+: pm33xx-core: Do not Turn OFF CEFUSE as PPA may be using it This area is used to store keys by HSPPA in case of AM438x SOC. Leave it active. Signed-off-by: Kabir Sahane Signed-off-by: Andrew F. Davis Signed-off-by: Tony Lindgren --- arch/arm/mach-omap2/pm33xx-core.c | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-) diff --git a/arch/arm/mach-omap2/pm33xx-core.c b/arch/arm/mach-omap2/pm33xx-core.c index 724cf5774a6c..c93b6efd565f 100644 --- a/arch/arm/mach-omap2/pm33xx-core.c +++ b/arch/arm/mach-omap2/pm33xx-core.c @@ -51,10 +51,12 @@ static int amx3_common_init(void) /* CEFUSE domain can be turned off post bootup */ cefuse_pwrdm = pwrdm_lookup("cefuse_pwrdm"); - if (cefuse_pwrdm) - omap_set_pwrdm_state(cefuse_pwrdm, PWRDM_POWER_OFF); - else + if (!cefuse_pwrdm) pr_err("PM: Failed to get cefuse_pwrdm\n"); + else if (omap_type() != OMAP2_DEVICE_TYPE_GP) + pr_info("PM: Leaving EFUSE power domain active\n"); + else + omap_set_pwrdm_state(cefuse_pwrdm, PWRDM_POWER_OFF); return 0; }