diff --git a/arch/arm/boot/dts/rk312x.dtsi b/arch/arm/boot/dts/rk312x.dtsi
index 8f879eb79fe1..d18e74e6f1bf 100644
--- a/arch/arm/boot/dts/rk312x.dtsi
+++ b/arch/arm/boot/dts/rk312x.dtsi
@@ -670,12 +670,12 @@
 		compatible = "rockchip,rk3128-mipi-dsi";
 		reg = <0x10110000 0x4000>;
 		interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
-		clocks = <&cru PCLK_MIPI>, <&cru HCLK_VIO_H2P>, <&video_phy>;
-		clock-names = "pclk", "h2p", "hs_clk";
+		clocks = <&cru PCLK_MIPI>, <&cru HCLK_VIO_H2P>;
+		clock-names = "pclk", "hclk";
 		resets = <&cru SRST_VIO_MIPI_DSI>;
 		reset-names = "apb";
 		phys = <&video_phy>;
-		phy-names = "mipi_dphy";
+		phy-names = "dphy";
 		power-domains = <&power RK3128_PD_VIO>;
 		rockchip,grf = <&grf>;
 		#address-cells = <1>;
@@ -996,14 +996,15 @@
 	};
 
 	video_phy: video-phy@20038000 {
-		compatible = "rockchip,rk3128-video-phy";
+		compatible = "rockchip,rk3128-dsi-dphy", "rockchip,rk3128-video-phy";
 		reg = <0x20038000 0x4000>, <0x10110000 0x4000>;
+		reg-names = "phy", "host";
 		clocks = <&cru SCLK_MIPI_24M>, <&cru PCLK_MIPIPHY>,
 			 <&cru PCLK_MIPI>;
-		clock-names = "ref", "pclk_phy", "pclk_host";
+		clock-names = "ref", "pclk", "pclk_host";
 		#clock-cells = <0>;
 		resets = <&cru SRST_MIPIPHY_P>;
-		reset-names = "rst";
+		reset-names = "apb";
 		power-domains = <&power RK3128_PD_VIO>;
 		#phy-cells = <0>;
 		status = "disabled";