From 2b1b3a5b70306caa69ac1d4e13442fe52c12ac2a Mon Sep 17 00:00:00 2001 From: Sugar Zhang Date: Tue, 4 Dec 2018 15:05:41 +0800 Subject: [PATCH] clk: rockchip: px30: Export clk id for sclk_i2s0_tx/rx mux Change-Id: I697d20fb0c69f9dcd76aaf2d18d666db2241360d Signed-off-by: Sugar Zhang Signed-off-by: Elaine Zhang --- drivers/clk/rockchip/clk-px30.c | 4 ++-- include/dt-bindings/clock/px30-cru.h | 2 ++ 2 files changed, 4 insertions(+), 2 deletions(-) diff --git a/drivers/clk/rockchip/clk-px30.c b/drivers/clk/rockchip/clk-px30.c index fac1ef7ae797..55ee46bc50bb 100644 --- a/drivers/clk/rockchip/clk-px30.c +++ b/drivers/clk/rockchip/clk-px30.c @@ -212,11 +212,11 @@ static struct rockchip_clk_branch px30_pdm_fracmux __initdata = PX30_CLKSEL_CON(26), 15, 1, MFLAGS); static struct rockchip_clk_branch px30_i2s0_tx_fracmux __initdata = - MUX(0, "clk_i2s0_tx_mux", mux_i2s0_tx_p, CLK_SET_RATE_PARENT, + MUX(SCLK_I2S0_TX_MUX, "clk_i2s0_tx_mux", mux_i2s0_tx_p, CLK_SET_RATE_PARENT, PX30_CLKSEL_CON(28), 10, 2, MFLAGS); static struct rockchip_clk_branch px30_i2s0_rx_fracmux __initdata = - MUX(0, "clk_i2s0_rx_mux", mux_i2s0_rx_p, CLK_SET_RATE_PARENT, + MUX(SCLK_I2S0_RX_MUX, "clk_i2s0_rx_mux", mux_i2s0_rx_p, CLK_SET_RATE_PARENT, PX30_CLKSEL_CON(58), 10, 2, MFLAGS); static struct rockchip_clk_branch px30_i2s1_fracmux __initdata = diff --git a/include/dt-bindings/clock/px30-cru.h b/include/dt-bindings/clock/px30-cru.h index 5b1416fcde6f..33eac20e9ad4 100644 --- a/include/dt-bindings/clock/px30-cru.h +++ b/include/dt-bindings/clock/px30-cru.h @@ -87,6 +87,8 @@ #define SCLK_UART1_SRC 85 #define SCLK_SDMMC_DIV 86 #define SCLK_SDMMC_DIV50 87 +#define SCLK_I2S0_TX_MUX 88 +#define SCLK_I2S0_RX_MUX 89 /* dclk gates */ #define DCLK_VOPB 150