From 2cff4571e0af866cfd056df1d47fbd6f11ed498e Mon Sep 17 00:00:00 2001 From: Chen Jinsen Date: Tue, 31 Jul 2018 10:26:15 +0800 Subject: [PATCH] ARM: dts: rk3288-th804: bind dsi to vopb for panel The aclk_vop is limited by vio_limit_freq and RK3288_LIMIT_PLL_VIO1 set as 410MHZ. if bind dsi to vopl (the clk freq will be 272MHZ), it will be some scenarios with insufficient frame rates Change-Id: I2fe15d51c579dbc5fe666cfb320055f0e179d2fc Signed-off-by: Chen Jinsen --- arch/arm/boot/dts/rk3288-th804.dts | 24 +++++++++++++++++++++++- 1 file changed, 23 insertions(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/rk3288-th804.dts b/arch/arm/boot/dts/rk3288-th804.dts index b8a173f1c539..8e2610431381 100644 --- a/arch/arm/boot/dts/rk3288-th804.dts +++ b/arch/arm/boot/dts/rk3288-th804.dts @@ -575,10 +575,27 @@ status = "okay"; }; -&route_dsi0 { +&dsi0_in_vopl { + status = "disabled"; +}; + +&dsi0_in_vopb { status = "okay"; }; +&route_dsi0 { + connect = <&vopb_out_dsi0>; + status = "okay"; +}; + +&hdmi_in_vopl { + status = "okay"; +}; + +&hdmi_in_vopb { + status = "disabled"; +}; + &hdmi { #address-cells = <1>; #size-cells = <0>; @@ -586,6 +603,11 @@ status = "okay"; }; +&route_hdmi { + connect = <&vopl_out_hdmi>; + status = "okay"; +}; + &hdmi_analog_sound { status = "okay"; compatible = "rockchip,rk3288-hdmi-analog",