From 2de6a66ea8328c7218ef5b6edb74e23afcb2ce3a Mon Sep 17 00:00:00 2001
From: Yifeng Zhao <yifeng.zhao@rock-chips.com>
Date: Fri, 9 Oct 2020 14:38:08 +0800
Subject: [PATCH] arm64: dts: rockchip: add nandc node for RK356X

Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com>
Change-Id: I7fb512eb1c1a281c4d891f73380e05ae1ca73b5a
---
 arch/arm64/boot/dts/rockchip/rk3568.dtsi | 10 ++++++++++
 1 file changed, 10 insertions(+)

diff --git a/arch/arm64/boot/dts/rockchip/rk3568.dtsi b/arch/arm64/boot/dts/rockchip/rk3568.dtsi
index 1fc6dcba9b6d..c5489246d253 100644
--- a/arch/arm64/boot/dts/rockchip/rk3568.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3568.dtsi
@@ -447,6 +447,16 @@
 		reg = <0x0 0xfe1a8100 0x0 0x20>;
 	};
 
+	nandc0: nandc@fe330000 {
+		compatible = "rockchip,rk-nandc";
+		reg = <0x0 0xfe330000 0x0 0x4000>;
+		interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>;
+		nandc_id = <0>;
+		clocks = <&cru NCLK_NANDC>, <&cru HCLK_NANDC>;
+		clock-names = "clk_nandc", "hclk_nandc";
+		status = "disabled";
+	};
+
 	dmac0: dmac@fe530000 {
 		compatible = "arm,pl330", "arm,primecell";
 		reg = <0x0 0xfe530000 0x0 0x4000>;