From 2dfb3f09d35b918129d1b612ddcfc8ca816ba5a8 Mon Sep 17 00:00:00 2001 From: "ruixuan.li" Date: Tue, 2 Apr 2019 11:11:56 +0800 Subject: [PATCH] tm2: emmc run hs200 busmode [1/1] PD#SWPL-5658 Problem: emmc run high speed now Solution: modify dts Verify: passed on t962e2_ab319 Change-Id: Iedef30bed9547e7f57c883077462f1762c55fda3 Signed-off-by: ruixuan.li Conflicts: arch/arm/boot/dts/amlogic/tm2_t962e2_ab319.dts arch/arm64/boot/dts/amlogic/tm2_t962e2_ab311.dts arch/arm64/boot/dts/amlogic/tm2_t962e2_ab319.dts --- drivers/amlogic/clk/tl1/tl1_clk_sdemmc.c | 2 +- drivers/amlogic/mmc/aml_sd_emmc_v3.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/amlogic/clk/tl1/tl1_clk_sdemmc.c b/drivers/amlogic/clk/tl1/tl1_clk_sdemmc.c index b5479b615f49..8ee3df8cc4f2 100644 --- a/drivers/amlogic/clk/tl1/tl1_clk_sdemmc.c +++ b/drivers/amlogic/clk/tl1/tl1_clk_sdemmc.c @@ -27,7 +27,7 @@ #include "tl1.h" PNAME(sd_emmc_parent_names) = { "xtal", "fclk_div2", - "fclk_div3", "fclk_div5", "fclk_div7", "mpll2", "mpll3", "gp0_pll" }; + "fclk_div3", "fclk_div5", "fclk_div2p5", "mpll2", "mpll3", "gp0_pll" }; /*sd_emmc B*/ static MUX(sd_emmc_p0_mux_B, HHI_SD_EMMC_CLK_CNTL, 0x7, 25, sd_emmc_parent_names, CLK_GET_RATE_NOCACHE | CLK_IGNORE_UNUSED); diff --git a/drivers/amlogic/mmc/aml_sd_emmc_v3.c b/drivers/amlogic/mmc/aml_sd_emmc_v3.c index 0ce0801010a5..9c53c7464c56 100644 --- a/drivers/amlogic/mmc/aml_sd_emmc_v3.c +++ b/drivers/amlogic/mmc/aml_sd_emmc_v3.c @@ -247,7 +247,7 @@ static int meson_mmc_clk_set_rate_v3(struct mmc_host *mmc, host->mux_parent[0]); if (ret) pr_warn("set comp0 as mux_clk parent error\n"); - } else if (((host->data->chip_type == MMC_CHIP_TL1) + } else if (((host->data->chip_type >= MMC_CHIP_TL1) || (host->data->chip_type == MMC_CHIP_G12B)) && (clk_ios >= 166000000)) { src0_clk = devm_clk_get(host->dev, "clkin2");