From 2f6e7d9700991911e62a352f3718bd4db55bd77b Mon Sep 17 00:00:00 2001 From: William Wu Date: Tue, 26 Dec 2023 15:07:02 +0800 Subject: [PATCH] FROMLIST: usb: dwc2: Disable clock gating feature on Rockchip SoCs The DWC2 IP on the Rockchip SoCs doesn't support clock gating. When a clock gating is enabled, system hangs. Signed-off-by: William Wu Signed-off-by: Jianwei Zheng Link: https://lore.kernel.org/all/1703575199-23638-1-git-send-email-william.wu@rock-chips.com/ Change-Id: I8548b3c1f2e68fada7cbfc28a4d302607a22645e --- drivers/usb/dwc2/params.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/usb/dwc2/params.c b/drivers/usb/dwc2/params.c index a56184378d6f..659b7dff164a 100644 --- a/drivers/usb/dwc2/params.c +++ b/drivers/usb/dwc2/params.c @@ -118,6 +118,7 @@ static void dwc2_set_rk_params(struct dwc2_hsotg *hsotg) p->lpm_clock_gating = false; p->besl = false; p->hird_threshold_en = false; + p->no_clock_gating = true; } static void dwc2_set_ltq_params(struct dwc2_hsotg *hsotg)