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lcd: update tcon_pll lock setting for tl1 [1/1]
PD#SWPL-2983 Problem: tcon_pll lock is affected by VDDEE voltage Solution: change tcon_pll lock setting to avoid VDDEE effection Verify: x301 Change-Id: I2f9d4638274fe3acdf5d8954b3670e7c108782e1 Signed-off-by: Evoke Zhang <evoke.zhang@amlogic.com>
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@@ -518,88 +518,92 @@ static void lcd_set_pll_tl1(struct lcd_clk_config_s *cConf)
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switch (lcd_drv->lcd_config->lcd_basic.lcd_type) {
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case LCD_LVDS:
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lcd_hiu_write(HHI_TCON_PLL_CNTL0, 0x000704ad);
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mdelay(10);
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udelay(10);
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lcd_hiu_write(HHI_TCON_PLL_CNTL0, 0x200704ad);
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mdelay(10);
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udelay(10);
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lcd_hiu_write(HHI_TCON_PLL_CNTL0, 0x300704ad);
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mdelay(10);
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udelay(10);
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lcd_hiu_write(HHI_TCON_PLL_CNTL1, 0x10508000);
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mdelay(10);
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udelay(10);
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lcd_hiu_write(HHI_TCON_PLL_CNTL2, 0x00001108);
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mdelay(10);
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udelay(10);
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//lcd_hiu_write(HHI_TCON_PLL_CNTL3, 0x10058f30);
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lcd_hiu_write(HHI_TCON_PLL_CNTL3, 0x10051400);
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mdelay(10);
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udelay(10);
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lcd_hiu_write(HHI_TCON_PLL_CNTL4, 0x010100c0);
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mdelay(10);
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udelay(10);
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lcd_hiu_write(HHI_TCON_PLL_CNTL4, 0x038300c0);
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mdelay(10);
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udelay(10);
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lcd_hiu_write(HHI_TCON_PLL_CNTL0, 0x340704ad);
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mdelay(10);
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udelay(10);
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lcd_hiu_write(HHI_TCON_PLL_CNTL0, 0x142e04ad);
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mdelay(10);
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udelay(10);
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lcd_hiu_write(HHI_TCON_PLL_CNTL2, 0x00003008);
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mdelay(10);
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udelay(10);
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lcd_hiu_write(HHI_TCON_PLL_CNTL4, 0x0b8300c0);
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mdelay(10);
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udelay(10);
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break;
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case LCD_VBYONE:
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lcd_hiu_write(HHI_TCON_PLL_CNTL0, 0x000f04f7);
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mdelay(10);
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udelay(10);
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lcd_hiu_write(HHI_TCON_PLL_CNTL0, 0x200f04f7);
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mdelay(10);
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udelay(10);
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lcd_hiu_write(HHI_TCON_PLL_CNTL0, 0x300f04f7);
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mdelay(10);
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udelay(10);
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lcd_hiu_write(HHI_TCON_PLL_CNTL1, 0x10110000);
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mdelay(10);
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udelay(10);
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lcd_hiu_write(HHI_TCON_PLL_CNTL2, 0x00001108);
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mdelay(10);
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udelay(10);
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lcd_hiu_write(HHI_TCON_PLL_CNTL3, 0x10051400);
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mdelay(10);
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udelay(10);
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lcd_hiu_write(HHI_TCON_PLL_CNTL4, 0x010100c0);
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mdelay(10);
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udelay(10);
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lcd_hiu_write(HHI_TCON_PLL_CNTL4, 0x038300c0);
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mdelay(10);
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udelay(10);
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lcd_hiu_write(HHI_TCON_PLL_CNTL0, 0x340f04f7);
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mdelay(10);
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udelay(10);
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lcd_hiu_write(HHI_TCON_PLL_CNTL0, 0x140f04f7);
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mdelay(10);
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udelay(10);
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lcd_hiu_write(HHI_TCON_PLL_CNTL2, 0x00003008);
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mdelay(10);
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udelay(10);
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break;
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case LCD_P2P:
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lcd_hiu_write(HHI_TCON_PLL_CNTL0, 0x000f04e1);
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mdelay(10);
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udelay(10);
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lcd_hiu_write(HHI_TCON_PLL_CNTL0, 0x200604e1);
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mdelay(10);
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udelay(10);
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lcd_hiu_write(HHI_TCON_PLL_CNTL0, 0x300604e1);
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mdelay(10);
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udelay(10);
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lcd_hiu_write(HHI_TCON_PLL_CNTL1, 0x10208000);
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mdelay(10);
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udelay(10);
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lcd_hiu_write(HHI_TCON_PLL_CNTL2, 0x00001108);
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mdelay(10);
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udelay(10);
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lcd_hiu_write(HHI_TCON_PLL_CNTL3, 0x10058f30);
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mdelay(10);
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udelay(10);
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lcd_hiu_write(HHI_TCON_PLL_CNTL4, 0x010100c0);
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mdelay(10);
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udelay(10);
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lcd_hiu_write(HHI_TCON_PLL_CNTL4, 0x038300c0);
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mdelay(10);
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udelay(10);
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lcd_hiu_write(HHI_TCON_PLL_CNTL0, 0x340604e1);
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mdelay(10);
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udelay(10);
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lcd_hiu_write(HHI_TCON_PLL_CNTL0, 0x14af04e1);
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mdelay(10);
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udelay(10);
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lcd_hiu_write(HHI_TCON_PLL_CNTL2, 0x00003008);
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mdelay(10);
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udelay(10);
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lcd_hiu_write(HHI_TCON_PLL_CNTL4, 0x0b8300c0);
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mdelay(10);
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udelay(10);
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break;
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default:
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break;
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}
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#endif
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ret = lcd_pll_wait_lock(HHI_TCON_PLL_CNTL0, LCD_PLL_LOCK_TL1);
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if (ret)
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if (ret) {
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LCDERR("hpll lock failed\n");
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} else {
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udelay(100);
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lcd_hiu_setb(HHI_TCON_PLL_CNTL2, 1, 5, 1);
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}
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if (cConf->ss_level > 0)
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lcd_set_pll_ss_tl1(cConf->ss_level);
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