From 31546c56cbfd1df0580eb9f38bfec81fc373fb19 Mon Sep 17 00:00:00 2001 From: Damon Ding Date: Sun, 27 Apr 2025 16:51:25 +0800 Subject: [PATCH] pwm: rockchip: simplify to one wave_table configuration instead of duty_table and period_table For wave mode, the duty and period share memory to update, so it is sufficient to config &rockchip_pwm_wave_config.wave_table and set &rockchip_pwm_wave_config.duty_*/&rockchip_pwm_wave_config.period_* for the update of duty and period. Change-Id: Ide133377991a9a6c2c26c4de4cb91040f6a7eadd Signed-off-by: Damon Ding --- drivers/pwm/pwm-rockchip.c | 14 ++------------ include/linux/pwm-rockchip.h | 6 ++---- 2 files changed, 4 insertions(+), 16 deletions(-) diff --git a/drivers/pwm/pwm-rockchip.c b/drivers/pwm/pwm-rockchip.c index bb40b2d20da5..0037c4046efa 100644 --- a/drivers/pwm/pwm-rockchip.c +++ b/drivers/pwm/pwm-rockchip.c @@ -1676,18 +1676,8 @@ int rockchip_pwm_set_wave(struct pwm_device *pwm, struct rockchip_pwm_wave_confi } } - if (config->duty_table) { - ret = pc->data->funcs.set_wave_table(chip, pwm, config->duty_table, - config->width_mode); - if (ret) { - dev_err(chip->dev, "Failed to set wave duty table for PWM%d\n", - pc->channel_id); - goto err_disable_clk_osc; - } - } - - if (config->period_table) { - ret = pc->data->funcs.set_wave_table(chip, pwm, config->period_table, + if (config->wave_table) { + ret = pc->data->funcs.set_wave_table(chip, pwm, config->wave_table, config->width_mode); if (ret) { dev_err(chip->dev, "Failed to set wave period table for PWM%d\n", diff --git a/include/linux/pwm-rockchip.h b/include/linux/pwm-rockchip.h index 75c4f43abde7..33d08bd5cd64 100644 --- a/include/linux/pwm-rockchip.h +++ b/include/linux/pwm-rockchip.h @@ -99,8 +99,7 @@ enum rockchip_pwm_wave_update_mode { /** * struct rockchip_pwm_wave_config - wave generator config object - * @duty_table: the wave table config of duty - * @period_table: the wave table config of period + * @wave_table: the wave table config * @clk_src: the clk src selection in wave generator mode * @mem_clk_src: the memory clk src selection in wave generator mode * @width_mode: the width mode of wave table @@ -121,8 +120,7 @@ enum rockchip_pwm_wave_update_mode { * @middle_hold: the time to stop at middle address */ struct rockchip_pwm_wave_config { - struct rockchip_pwm_wave_table *duty_table; - struct rockchip_pwm_wave_table *period_table; + struct rockchip_pwm_wave_table *wave_table; enum rockchip_pwm_clk_src_sel clk_src; enum rockchip_pwm_clk_src_sel mem_clk_src; enum rockchip_pwm_wave_table_width_mode width_mode;