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vlock: vlock for tl1 [1/1]

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PD#SWPL-3129

Problem:
1.verify manual pll mode
2.modify vlock hiu register access api
3.add a new fsm for tl1 test
4.add chip match data

Solution:
add function for tl1

Verify:
verified on tl1

Change-Id: I75f8d2a40437056135f8dd0fb241016a9ea680df
Signed-off-by: Yong Qin <yong.qin@amlogic.com>
This commit is contained in:
Yong Qin
2018-12-19 14:56:40 +08:00
committed by Jianxin Pan
parent 82f55ee1d0
commit 315f6d3cda
8 changed files with 775 additions and 137 deletions
Download Patch File Download Diff File Expand all files Collapse all files

2
arch/arm/boot/dts/amlogic/tl1_t962x2_skt.dts
View File

@@ -460,7 +460,7 @@
};
amlvecm {
compatible = "amlogic, vecm";
compatible = "amlogic, vecm-tl1";
dev_name = "aml_vecm";
status = "okay";
gamma_en = <1>;/*1:enabel ;0:disable*/

2
arch/arm/boot/dts/amlogic/tl1_t962x2_x301.dts
View File

@@ -475,7 +475,7 @@
};
amlvecm {
compatible = "amlogic, vecm";
compatible = "amlogic, vecm-tl1";
dev_name = "aml_vecm";
status = "okay";
gamma_en = <1>;/*1:enabel ;0:disable*/

2
drivers/amlogic/clk/tl1/tl1.h
View File

@@ -125,11 +125,13 @@
#define HHI_SYS_PLL_CNTL5 0x308 /* 0xc2 offset in datasheet */
#define HHI_SYS_PLL_CNTL6 0x30c /* 0xc3 offset in datasheet */
#if 0/*tl1 no*/
#define HHI_HDMI_PLL_CNTL 0x320 /* 0xc8 offset in datasheet */
#define HHI_HDMI_PLL_CNTL2 0x324 /* 0xc9 offset in datasheet */
#define HHI_HDMI_PLL_CNTL3 0x328 /* 0xca offset in datasheet */
#define HHI_HDMI_PLL_CNTL4 0x32C /* 0xcb offset in datasheet */
#define HHI_HDMI_PLL_CNTL5 0x330 /* 0xcc offset in datasheet */
#endif
#define HHI_VID_LOCK_CLK_CNTL 0x3c8 /* 0xf2 offset in datasheet1 */
#define HHI_BT656_CLK_CNTL 0x3d4 /* 0xf5 offset in datasheet1 */
#define HHI_SPICC_CLK_CNTL 0x3dc /* 0xf7 offset in datasheet1 */

73
drivers/amlogic/media/enhancement/amvecm/amvecm.c
View File

@@ -31,6 +31,8 @@
#include <linux/stat.h>
#include <linux/errno.h>
#include <linux/uaccess.h>
#include <linux/of.h>
#include <linux/of_device.h>
/* #include <linux/amlogic/aml_common.h> */
#include <linux/ctype.h>/* for parse_para_pq */
#include <linux/vmalloc.h>
@@ -128,7 +130,7 @@ static struct hdr_metadata_info_s vpp_hdr_metadata_s;
static int vdj_mode_flg;
struct am_vdj_mode_s vdj_mode_s;
void __iomem *amvecm_hiu_reg_base;/* = *ioremap(0xc883c000, 0x2000); */
/*void __iomem *amvecm_hiu_reg_base;*//* = *ioremap(0xc883c000, 0x2000); */
static int debug_amvecm;
module_param(debug_amvecm, int, 0664);
@@ -721,6 +723,7 @@ static ssize_t amvecm_vlock_store(struct class *cla,
sel = VLOCK_SUPPORT;
} else if (!strncmp(parm[0], "enable", 6)) {
vecm_latch_flag |= FLAG_VLOCK_EN;
vlock_set_en(true);
} else if (!strncmp(parm[0], "disable", 7)) {
vecm_latch_flag |= FLAG_VLOCK_DIS;
} else if (!strncmp(parm[0], "status", 6)) {
@@ -5988,11 +5991,40 @@ static const struct file_operations amvecm_fops = {
#endif
.poll = amvecm_poll,
};
static const struct vecm_match_data_s vecm_dt_xxx = {
.vlk_support = true,
.vlk_new_fsm = 0,
.vlk_hwver = vlock_hw_org,
.vlk_phlock_en = false,
};
static const struct vecm_match_data_s vecm_dt_tl1 = {
.vlk_support = true,
.vlk_new_fsm = 1,
.vlk_hwver = vlock_hw_ver2,
.vlk_phlock_en = true,
};
static const struct of_device_id aml_vecm_dt_match[] = {
{
.compatible = "amlogic, vecm",
.data = &vecm_dt_xxx,
},
{
.compatible = "amlogic, vecm-tl1",
.data = &vecm_dt_tl1,
},
{},
};
static void aml_vecm_dt_parse(struct platform_device *pdev)
{
struct device_node *node;
unsigned int val;
int ret;
const struct of_device_id *of_id;
struct vecm_match_data_s *matchdata;
node = pdev->dev.of_node;
/* get integer value */
@@ -6031,6 +6063,18 @@ static void aml_vecm_dt_parse(struct platform_device *pdev)
pr_info("Can't find tx_op_color_primary.\n");
else
tx_op_color_primary = val;
/*get compatible matched device, to get chip related data*/
of_id = of_match_device(aml_vecm_dt_match, &pdev->dev);
if (of_id != NULL) {
pr_info("%s", of_id->compatible);
matchdata = (struct vecm_match_data_s *)of_id->data;
} else {
matchdata = (struct vecm_match_data_s *)&vecm_dt_xxx;
pr_info("unable to get matched device\n");
}
vlock_dt_match_init(matchdata);
/*vlock param config*/
vlock_param_config(node);
}
@@ -6158,16 +6202,7 @@ static int aml_vecm_probe(struct platform_device *pdev)
if (is_meson_g12a_cpu() || is_meson_g12b_cpu())
sdr_mode = 2;
/*config vlock mode*/
/*todo:txlx & g9tv support auto pll,*/
/*but support not good,need vlsi support optimize*/
vlock_mode = VLOCK_MODE_MANUAL_PLL;
if (is_meson_gxtvbb_cpu() ||
is_meson_txl_cpu() || is_meson_txlx_cpu()
|| is_meson_txhd_cpu())
vlock_en = 1;
else
vlock_en = 0;
vlock_status_init();
hdr_init(&amvecm_dev.hdr_d);
aml_vecm_dt_parse(pdev);
@@ -6259,13 +6294,6 @@ static void amvecm_shutdown(struct platform_device *pdev)
lc_free();
}
static const struct of_device_id aml_vecm_dt_match[] = {
{
.compatible = "amlogic, vecm",
},
{},
};
static struct platform_driver aml_vecm_driver = {
.driver = {
.name = "aml_vecm",
@@ -6284,16 +6312,19 @@ static struct platform_driver aml_vecm_driver = {
static int __init aml_vecm_init(void)
{
unsigned int hiu_reg_base;
/*unsigned int hiu_reg_base;*/
pr_info("%s:module init\n", __func__);
#if 0
/* remap the hiu bus */
if (is_meson_txlx_cpu() || is_meson_txhd_cpu() ||
is_meson_g12a_cpu() || is_meson_g12b_cpu())
is_meson_g12a_cpu() || is_meson_g12b_cpu()
|| is_meson_tl1_cpu())
hiu_reg_base = 0xff63c000;
else
hiu_reg_base = 0xc883c000;
amvecm_hiu_reg_base = ioremap(hiu_reg_base, 0x2000);
#endif
if (platform_driver_register(&aml_vecm_driver)) {
pr_err("failed to register bl driver module\n");
return -ENODEV;
@@ -6305,7 +6336,7 @@ static int __init aml_vecm_init(void)
static void __exit aml_vecm_exit(void)
{
pr_info("%s:module exit\n", __func__);
iounmap(amvecm_hiu_reg_base);
/*iounmap(amvecm_hiu_reg_base);*/
platform_driver_unregister(&aml_vecm_driver);
}

23
drivers/amlogic/media/enhancement/amvecm/arch/vpp_regs.h
View File

@@ -529,11 +529,19 @@
/*ve dither*/
#define VPP_VE_DITHER_CTRL 0x3120
/* TL1 */
/*offset 0x1000*/
#define HHI_TCON_PLL_CNTL0 0x20
#define HHI_TCON_PLL_CNTL1 0x21
#define HHI_HDMI_PLL_VLOCK_CNTL 0xd1
/* for pll bug */
#define HHI_HDMI_PLL_CNTL 0x10c8
#define HHI_HDMI_PLL_CNTL2 0x10c9
#define HHI_VID_LOCK_CLK_CNTL 0x10f2
#define HHI_HDMI_PLL_CNTL6 0x10cd
#define HHI_HDMI_PLL_CNTL 0xc8
#define HHI_HDMI_PLL_CNTL2 0xc9
#define HHI_VID_LOCK_CLK_CNTL 0xf2
#define HHI_HDMI_PLL_CNTL6 0xcd
/* for vlock enc mode adjust begin */
#define ENCL_VIDEO_MAX_LNCNT 0x1cbb
#define ENCL_VIDEO_MAX_PXCNT 0x1cb0
@@ -552,13 +560,12 @@
#define ENCT_MAX_LINE_SWITCH_POINT 0x1c88
/* for vlock enc mode adjust end */
#define HHI_VID_LOCK_CLK_CNTL 0x10f2
#define VDIN_MEAS_VS_COUNT_LO 0x125c
/*for vlock*/
/*after GXL new add CNTL1,same with CNTL2 on G9TV/GXTVBB*/
#define HHI_HDMI_PLL_CNTL1 0x10c9
#define HHI_HDMI_PLL_CNTL1 0xc9
/*after GXL CNTL5[bit3] is same with CNTL6[bit20] on G9TV/GXTVBB*/
#define HHI_HDMI_PLL_CNTL5 0x10cd
#define HHI_HDMI_PLL_CNTL5 0xcd
/* #define VI_HIST_CTRL 0x2e00 */

745
drivers/amlogic/media/enhancement/amvecm/vlock.c
View File

File diff suppressed because it is too large Load Diff

42
drivers/amlogic/media/enhancement/amvecm/vlock.h
View File

@@ -23,7 +23,7 @@
#include <linux/amlogic/media/vfm/vframe.h>
#include "linux/amlogic/media/amvecm/ve.h"
#define VLOCK_VER "Ref.2018/11/07a"
#define VLOCK_VER "Ref.2018/12/24"
#define VLOCK_REG_NUM 33
@@ -59,6 +59,18 @@ enum vlock_param_e {
VLOCK_PARAM_MAX,
};
struct stvlock_sig_sts {
u32 fsm_sts;
u32 fsm_prests;
u32 vf_sts;
u32 vmd_chg;
u32 frame_cnt_in;
u32 frame_cnt_no;
u32 input_hz;
u32 output_hz;
bool md_support;
struct vecm_match_data_s *dtdata;
};
extern void amve_vlock_process(struct vframe_s *vf);
extern void amve_vlock_resume(void);
extern void vlock_param_set(unsigned int val, enum vlock_param_e sel);
@@ -84,6 +96,29 @@ extern void vlock_log_print(void);
#define VLOCK_MODE_MANUAL_SOFT_ENC (1 << 4)
#define VLOCK_MODE_MANUAL_MIX_PLL_ENC (1 << 5)
#define IS_MANUAL_MODE(md) (md & \
(VLOCK_MODE_MANUAL_PLL | \
VLOCK_MODE_MANUAL_ENC | \
VLOCK_MODE_MANUAL_SOFT_ENC))
#define IS_PLL_MODE(md) (md & \
(VLOCK_MODE_MANUAL_PLL | \
VLOCK_MODE_AUTO_PLL))
#define IS_AUTO_PLL_MODE(md) (md & \
VLOCK_MODE_AUTO_PLL)
#define IS_MANUAL_ENC_MODE(md) (md & \
VLOCK_MODE_MANUAL_ENC)
#define IS_MANUAL_PLL_MODE(md) (md & \
VLOCK_MODE_MANUAL_PLL)
#define IS_MANUAL_SOFTENC_MODE(md) (md & \
VLOCK_MODE_MANUAL_SOFT_ENC)
#define XTAL_VLOCK_CLOCK 24000000/*vlock use xtal clock*/
#define VLOCK_SUPPORT_HDMI (1 << 0)
@@ -106,7 +141,7 @@ extern void vlock_log_print(void);
extern unsigned int vlock_mode;
extern unsigned int vlock_en;
extern unsigned int vecm_latch_flag;
extern void __iomem *amvecm_hiu_reg_base;
/*extern void __iomem *amvecm_hiu_reg_base;*/
extern unsigned int probe_ok;
extern void lcd_ss_enable(bool flag);
@@ -123,4 +158,7 @@ extern void vlock_lcd_param_work(struct work_struct *p_work);
extern int vlock_notify_callback(struct notifier_block *block,
unsigned long cmd, void *para);
#endif
extern void vlock_status_init(void);
extern void vlock_dt_match_init(struct vecm_match_data_s *pdata);
extern void vlock_set_en(bool en);

23
include/linux/amlogic/media/amvecm/amvecm.h
View File

@@ -300,6 +300,29 @@ enum ve_pq_timing_e {
TIMING_MAX,
};
enum vlock_hw_ver_e {
/*gxtvbb*/
vlock_hw_org,
/*
*txl
*txlx
*/
vlock_hw_ver1,
/* tl1 later
* fix bug:i problem
* fix bug:affect ss function
* add: phase lock
*/
vlock_hw_ver2,
};
struct vecm_match_data_s {
u32 vlk_support;
u32 vlk_new_fsm;
enum vlock_hw_ver_e vlk_hwver;
u32 vlk_phlock_en;
};
/*overscan:
*length 0~31bit :number of crop;
*src_timing: bit31: on: load/save all crop