From 316631f87d3a6dd17fa31a792b1e53580cfcd2af Mon Sep 17 00:00:00 2001 From: Algea Cao Date: Tue, 21 Dec 2021 16:53:14 +0800 Subject: [PATCH] arm64: dts: rockchip: rk3588: Support hdmi phy pll as dclk source Signed-off-by: Algea Cao Change-Id: I33ee7bff8a7e2994bf963b2c747e348a30e61237 --- arch/arm64/boot/dts/rockchip/rk3588.dtsi | 3 +++ arch/arm64/boot/dts/rockchip/rk3588s.dtsi | 1 + 2 files changed, 4 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3588.dtsi b/arch/arm64/boot/dts/rockchip/rk3588.dtsi index f8a812087026..177fb073451b 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3588.dtsi @@ -19,6 +19,8 @@ ethernet0 = &gmac0; hdptx0 = &hdptxphy0; hdptx1 = &hdptxphy1; + hdptxhdmi0 = &hdptxphy_hdmi0; + hdptxhdmi1 = &hdptxphy_hdmi1; hdmi0 = &hdmi0; hdmi1 = &hdmi1; rkcif_mipi_lvds4= &rkcif_mipi_lvds4; @@ -716,6 +718,7 @@ "lcpll"; rockchip,grf = <&hdptxphy1_grf>; #phy-cells = <0>; + #clock-cells = <0>; status = "disabled"; }; diff --git a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi index 6fa68f58f607..7120d00d024f 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi @@ -4812,6 +4812,7 @@ "lcpll"; rockchip,grf = <&hdptxphy0_grf>; #phy-cells = <0>; + #clock-cells = <0>; status = "disabled"; };