From 34a5779682b569c0b4d18ed3d7311d82009bf550 Mon Sep 17 00:00:00 2001 From: Elaine Zhang Date: Sun, 7 Oct 2018 10:46:49 +0800 Subject: [PATCH] clk: rockchip: rk1808: fix up the uart0 register description error Change-Id: I4f11f5d0a0b46557e47346064416a9ad85cdcfbd Signed-off-by: Elaine Zhang --- drivers/clk/rockchip/clk-rk1808.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/clk/rockchip/clk-rk1808.c b/drivers/clk/rockchip/clk-rk1808.c index 2911b95d3572..5c13de1869ea 100644 --- a/drivers/clk/rockchip/clk-rk1808.c +++ b/drivers/clk/rockchip/clk-rk1808.c @@ -1084,8 +1084,8 @@ static struct rockchip_clk_branch rk1808_clk_branches[] __initdata = { RK1808_PMU_CLKSEL_CON(3), 14, 2, MFLAGS, 0, 7, DFLAGS, RK1808_PMU_CLKGATE_CON(1), 0, GFLAGS), COMPOSITE_NOMUX_HALFDIV(0, "clk_uart0_np5", "clk_uart0_pmu_src", 0, - RK1808_CLKSEL_CON(4), 0, 7, DFLAGS, - RK1808_CLKGATE_CON(1), 1, GFLAGS), + RK1808_PMU_CLKSEL_CON(4), 0, 7, DFLAGS, + RK1808_PMU_CLKGATE_CON(1), 1, GFLAGS), COMPOSITE_FRACMUX(0, "clk_uart0_frac", "clk_uart0_pmu_src", CLK_SET_RATE_PARENT, RK1808_PMU_CLKSEL_CON(5), 0, RK1808_PMU_CLKGATE_CON(1), 2, GFLAGS,