From 351c78def9511744f199ae7cd238d4ff30df7947 Mon Sep 17 00:00:00 2001 From: "long.yu" Date: Thu, 13 Aug 2020 15:25:12 +0800 Subject: [PATCH] emmc: save clock reg after cali failure [1/1] PD#SWPL-30974 Problem: don't need to save the value of the Clock register after a calibration failure Solution: save clock register Verify: txl Change-Id: I79799967ee3417600df960492a94f868427effb2 Signed-off-by: long.yu --- drivers/amlogic/mmc/aml_sd_emmc.c | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) diff --git a/drivers/amlogic/mmc/aml_sd_emmc.c b/drivers/amlogic/mmc/aml_sd_emmc.c index 5d0190c7c4d0..9a121ed578f1 100644 --- a/drivers/amlogic/mmc/aml_sd_emmc.c +++ b/drivers/amlogic/mmc/aml_sd_emmc.c @@ -526,6 +526,15 @@ _cali_retry: } else { pr_err("%s: calibration failed, use default\n", mmc_hostname(host->mmc)); +#ifdef SD_EMMC_CLK_CTRL + vclk = readl(host->base + SD_EMMC_CLOCK); + clkc->div = clk_div_tmp; + writel(vclk, host->base + SD_EMMC_CLOCK); +#else + clk_set_rate(host->cfg_div_clk, clk_tmp); + vclk = readl(host->base + SD_EMMC_CLOCK); +#endif + pdata->clkc = vclk; return -1; } } @@ -539,6 +548,15 @@ _cali_retry: } else { pr_err("%s: calibration failed, use default\n", mmc_hostname(host->mmc)); +#ifdef SD_EMMC_CLK_CTRL + vclk = readl(host->base + SD_EMMC_CLOCK); + clkc->div = clk_div_tmp; + writel(vclk, host->base + SD_EMMC_CLOCK); +#else + clk_set_rate(host->cfg_div_clk, clk_tmp); + vclk = readl(host->base + SD_EMMC_CLOCK); +#endif + pdata->clkc = vclk; return -1; } }