From b542ca741a8aa312467b6c6edf52645c32955649 Mon Sep 17 00:00:00 2001 From: Shengfei Xu Date: Wed, 18 Jun 2025 11:32:40 +0800 Subject: [PATCH 01/18] mfd: rk806: Solve the problem of directly accessing the bus before it's fully restored The RK806 features wake-up functionality. The current patch ensures that device interrupts are processed only after the device has been awakened, without compromising the wake-up functionality. Change-Id: I478717af3e6ce297ce7d2bb43781e53d9393aae6 Signed-off-by: Shengfei Xu --- drivers/mfd/rk806-core.c | 22 ++++++++++++++++++++++ drivers/mfd/rk806-i2c.c | 3 +++ drivers/mfd/rk806-spi.c | 3 +++ include/linux/mfd/rk806.h | 2 ++ 4 files changed, 30 insertions(+) diff --git a/drivers/mfd/rk806-core.c b/drivers/mfd/rk806-core.c index b0e9eb16fc00..d6b1af88289e 100644 --- a/drivers/mfd/rk806-core.c +++ b/drivers/mfd/rk806-core.c @@ -966,6 +966,28 @@ int rk806_device_init(struct rk806 *rk806) } EXPORT_SYMBOL_GPL(rk806_device_init); +int rk806_core_suspend(struct device *dev) +{ + struct rk806 *rk806 = dev_get_drvdata(dev); + + disable_irq(rk806->irq); + enable_irq_wake(rk806->irq); + + return 0; +} +EXPORT_SYMBOL_GPL(rk806_core_suspend); + +int rk806_core_resume(struct device *dev) +{ + struct rk806 *rk806 = dev_get_drvdata(dev); + + enable_irq(rk806->irq); + disable_irq_wake(rk806->irq); + + return 0; +} +EXPORT_SYMBOL_GPL(rk806_core_resume); + int rk806_device_exit(struct rk806 *rk806) { struct device_node *np = rk806->dev->of_node; diff --git a/drivers/mfd/rk806-i2c.c b/drivers/mfd/rk806-i2c.c index 3627af87a4eb..e800a601fa29 100644 --- a/drivers/mfd/rk806-i2c.c +++ b/drivers/mfd/rk806-i2c.c @@ -45,10 +45,13 @@ static void rk806_remove(struct i2c_client *client) rk806_device_exit(rk806); } +static DEFINE_SIMPLE_DEV_PM_OPS(rk806_i2c_pm_ops, rk806_core_suspend, rk806_core_resume); + static struct i2c_driver rk806_i2c_driver = { .driver = { .name = "rk806", .of_match_table = of_match_ptr(rk806_of_match), + .pm = pm_sleep_ptr(&rk806_i2c_pm_ops), }, .probe = rk806_i2c_probe, .remove = rk806_remove, diff --git a/drivers/mfd/rk806-spi.c b/drivers/mfd/rk806-spi.c index c1053078558a..071493b3c8ce 100644 --- a/drivers/mfd/rk806-spi.c +++ b/drivers/mfd/rk806-spi.c @@ -111,6 +111,8 @@ static void rk806_spi_remove(struct spi_device *spi) rk806_device_exit(rk806); } +static DEFINE_SIMPLE_DEV_PM_OPS(rk806_spi_pm_ops, rk806_core_suspend, rk806_core_resume); + static const struct spi_device_id rk806_spi_id_table[] = { { "rk806", 0 }, { /* sentinel */ } @@ -122,6 +124,7 @@ static struct spi_driver rk806_spi_driver = { .name = "rk806", .owner = THIS_MODULE, .of_match_table = of_match_ptr(rk806_of_match), + .pm = pm_sleep_ptr(&rk806_spi_pm_ops), }, .probe = rk806_spi_probe, .remove = rk806_spi_remove, diff --git a/include/linux/mfd/rk806.h b/include/linux/mfd/rk806.h index e0d608480ce5..40721029c084 100644 --- a/include/linux/mfd/rk806.h +++ b/include/linux/mfd/rk806.h @@ -541,6 +541,8 @@ extern const struct regmap_config rk806_regmap_config; extern const struct of_device_id rk806_of_match[]; int rk806_device_init(struct rk806 *rk806); int rk806_device_exit(struct rk806 *rk806); +int rk806_core_suspend(struct device *dev); +int rk806_core_resume(struct device *dev); int rk806_field_write(struct rk806 *rk806, enum rk806_fields field_id, unsigned int val); From c9ecffc1c5cef8c80defeae9116314788641b9a3 Mon Sep 17 00:00:00 2001 From: Weiwen Chen Date: Fri, 20 Jun 2025 11:20:32 +0800 Subject: [PATCH 02/18] arm64: dts: rockchip: rv1126bp-evb-v14 enable rkfec and rkavsp Signed-off-by: Weiwen Chen Change-Id: I7467ffecaadc514e36052d24144d126999d3375b --- .../boot/dts/rockchip/rv1126bp-evb-v14.dtsi | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rv1126bp-evb-v14.dtsi b/arch/arm64/boot/dts/rockchip/rv1126bp-evb-v14.dtsi index 6a5cff8a769f..ac666ae9e19c 100644 --- a/arch/arm64/boot/dts/rockchip/rv1126bp-evb-v14.dtsi +++ b/arch/arm64/boot/dts/rockchip/rv1126bp-evb-v14.dtsi @@ -486,6 +486,22 @@ status = "okay"; }; +&rkavsp { + status = "okay"; +}; + +&rkavsp_mmu { + status = "okay"; +}; + +&rkfec { + status = "okay"; +}; + +&rkfec_mmu { + status = "okay"; +}; + &rknpu { rknpu-supply = <&vdd_npu>; }; From 2189ef08841ce7f924fa606593bae8191c5027cf Mon Sep 17 00:00:00 2001 From: Yuefu Su Date: Fri, 20 Jun 2025 15:39:05 +0800 Subject: [PATCH 03/18] ARM: configs: rv1126b-tb: Build in RKNPU Signed-off-by: Yuefu Su Change-Id: Ib7916cb9b705cb1f64e5194aac2b723e25975926 --- arch/arm/configs/rv1126b-tb.config | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/arch/arm/configs/rv1126b-tb.config b/arch/arm/configs/rv1126b-tb.config index 8672c83a7b26..7a542462da2b 100644 --- a/arch/arm/configs/rv1126b-tb.config +++ b/arch/arm/configs/rv1126b-tb.config @@ -20,6 +20,7 @@ CONFIG_ROCKCHIP_HW_DECOMPRESS=y CONFIG_ROCKCHIP_MULTI_RGA=y CONFIG_ROCKCHIP_RAMDISK=y CONFIG_ROCKCHIP_RGA_PROC_FS=y +CONFIG_ROCKCHIP_RKNPU=y CONFIG_ROCKCHIP_THUNDER_BOOT=y CONFIG_ROCKCHIP_THUNDER_BOOT_DEFER_FREE_MEMBLOCK=y CONFIG_ROCKCHIP_VENDOR_STORAGE=y @@ -293,6 +294,8 @@ CONFIG_MMC_QUEUE_DEPTH=1 # CONFIG_MMC_SPI is not set # CONFIG_MMC_TEST is not set # CONFIG_MMC_USDHI6ROL0 is not set +# CONFIG_MMC_USHC is not set +# CONFIG_MMC_VUB300 is not set # CONFIG_MOXTET is not set # CONFIG_MPL115_SPI is not set CONFIG_MTD_BLKDEVS=y @@ -450,6 +453,8 @@ CONFIG_SPI_ROCKCHIP_SFC=y # CONFIG_TI_DAC7612 is not set # CONFIG_TI_TLC4541 is not set # CONFIG_TI_TSC2046 is not set +# CONFIG_USB_MAX3420_UDC is not set +# CONFIG_USB_MAX3421_HCD is not set # CONFIG_VIDEO_GS1662 is not set # CONFIG_VIDEO_ROCKCHIP_PREISP is not set CONFIG_VIDEO_ROCKCHIP_THUNDER_BOOT_ISP=y From 2eb903302f0f1273efec9b2e3bf267b84bc678a7 Mon Sep 17 00:00:00 2001 From: Zefa Chen Date: Wed, 4 Jun 2025 09:23:02 +0800 Subject: [PATCH 04/18] arm64: dts: rockchip: rv1126b-evb-dual-cam-csi0: fixes error of compilation Change-Id: Ie09f5b45f2a9a772137fbe7b051bbf45081ae65b Signed-off-by: Zefa Chen --- arch/arm64/boot/dts/rockchip/rv1126b-evb-dual-cam-csi0.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/rockchip/rv1126b-evb-dual-cam-csi0.dtsi b/arch/arm64/boot/dts/rockchip/rv1126b-evb-dual-cam-csi0.dtsi index 05b2481e7b83..36c5927695fc 100644 --- a/arch/arm64/boot/dts/rockchip/rv1126b-evb-dual-cam-csi0.dtsi +++ b/arch/arm64/boot/dts/rockchip/rv1126b-evb-dual-cam-csi0.dtsi @@ -258,7 +258,7 @@ &rkisp_vir0_sditf { status = "okay"; -} +}; &rkisp_vir1 { status = "okay"; From f4d69d1d689f62cfca35886f52359c1672c8109f Mon Sep 17 00:00:00 2001 From: Zefa Chen Date: Wed, 4 Jun 2025 10:38:54 +0800 Subject: [PATCH 05/18] media: i2c: sc450ai support sync mode Change-Id: Ic9e64e0efe6b7e9e658b36631f32a3cbb6a4e0d1 Signed-off-by: Zefa Chen --- drivers/media/i2c/sc450ai.c | 76 ++++++++++++++++++++++++++++++++++--- 1 file changed, 71 insertions(+), 5 deletions(-) diff --git a/drivers/media/i2c/sc450ai.c b/drivers/media/i2c/sc450ai.c index 443ebbbbeb14..e2fbce66d7be 100644 --- a/drivers/media/i2c/sc450ai.c +++ b/drivers/media/i2c/sc450ai.c @@ -197,6 +197,7 @@ struct sc450ai { struct preisp_hdrae_exp_s init_hdrae_exp; struct cam_sw_info *cam_sw_inf; struct v4l2_fwnode_endpoint bus_cfg; + enum rkmodule_sync_mode sync_mode; }; #define to_sc450ai(sd) container_of(sd, struct sc450ai, subdev) @@ -1205,6 +1206,23 @@ static const struct regval sc450ai_hdr2_10_2688x1520_30fps_4lane_regs[] = { {REG_NULL, 0x00}, }; +static __maybe_unused const struct regval sc450ai_interal_sync_master_start_regs[] = { + {0x300a, 0x24}, //bit[2]=1 fsync_oen + {0x3032, 0xa0},////bit[7]=1 vsync_tc_en + {REG_NULL, 0x00}, +}; + +static __maybe_unused const struct regval sc450ai_interal_sync_slaver_start_regs[] = { + {0x300a, 0x22}, + {0x3222, 0x01}, //Bit[0]: Slave mode en + {0x3224, 0x92}, //fsync trigger + {0x3230, 0x00}, + {0x3231, 0x04}, + {0x322e, 0x00}, + {0x322f, 0x02}, + {REG_NULL, 0x00}, +}; + static const struct sc450ai_mode supported_modes_2lane[] = { { .width = 2688, @@ -1926,6 +1944,7 @@ static long sc450ai_ioctl(struct v4l2_subdev *sd, unsigned int cmd, void *arg) int cur_best_fit = -1; int cur_best_fit_dist = -1; int cur_dist, cur_fps, dst_fps; + u32 *sync_mode = NULL; switch (cmd) { case RKMODULE_GET_MODULE_INFO: @@ -2103,7 +2122,14 @@ static long sc450ai_ioctl(struct v4l2_subdev *sd, unsigned int cmd, void *arg) setting = (struct rk_sensor_setting *)arg; ret = sc450ai_set_setting(sc450ai, setting); break; - + case RKMODULE_GET_SYNC_MODE: + sync_mode = (u32 *)arg; + *sync_mode = sc450ai->sync_mode; + break; + case RKMODULE_SET_SYNC_MODE: + sync_mode = (u32 *)arg; + sc450ai->sync_mode = *sync_mode; + break; default: ret = -ENOIOCTLCMD; break; @@ -2123,6 +2149,7 @@ static long sc450ai_compat_ioctl32(struct v4l2_subdev *sd, struct rk_sensor_setting *setting; long ret; u32 stream = 0; + u32 *sync_mode = NULL; switch (cmd) { case RKMODULE_GET_MODULE_INFO: @@ -2202,7 +2229,21 @@ static long sc450ai_compat_ioctl32(struct v4l2_subdev *sd, ret = -EFAULT; kfree(setting); break; - + case RKMODULE_GET_SYNC_MODE: + ret = sc450ai_ioctl(sd, cmd, &sync_mode); + if (!ret) { + ret = copy_to_user(up, &sync_mode, sizeof(u32)); + if (ret) + ret = -EFAULT; + } + break; + case RKMODULE_SET_SYNC_MODE: + ret = copy_from_user(&sync_mode, up, sizeof(u32)); + if (!ret) + ret = sc450ai_ioctl(sd, cmd, &sync_mode); + else + ret = -EFAULT; + break; default: ret = -ENOIOCTLCMD; break; @@ -2214,7 +2255,7 @@ static long sc450ai_compat_ioctl32(struct v4l2_subdev *sd, static int __sc450ai_start_stream(struct sc450ai *sc450ai) { - int ret; + int ret = 0; if (!sc450ai->is_thunderboot) { ret = sc450ai_write_array(sc450ai->client, sc450ai->cur_mode->reg_list); @@ -2234,8 +2275,15 @@ static int __sc450ai_start_stream(struct sc450ai *sc450ai) } } } - ret = sc450ai_write_reg(sc450ai->client, SC450AI_REG_CTRL_MODE, - SC450AI_REG_VALUE_08BIT, SC450AI_MODE_STREAMING); + if (sc450ai->sync_mode == INTERNAL_MASTER_MODE) + ret |= sc450ai_write_array(sc450ai->client, + sc450ai_interal_sync_master_start_regs); + else if (sc450ai->sync_mode == EXTERNAL_MASTER_MODE) + ret |= sc450ai_write_array(sc450ai->client, + sc450ai_interal_sync_slaver_start_regs); + else if (sc450ai->sync_mode == NO_SYNC_MODE) + ret |= sc450ai_write_reg(sc450ai->client, SC450AI_REG_CTRL_MODE, + SC450AI_REG_VALUE_08BIT, SC450AI_MODE_STREAMING); return ret; } @@ -2822,6 +2870,7 @@ static int sc450ai_probe(struct i2c_client *client, int ret; int i, hdr_mode = 0; struct device_node *endpoint; + const char *sync_mode_name = NULL; dev_info(dev, "driver version: %02x.%02x.%02x", DRIVER_VERSION >> 16, @@ -2849,6 +2898,23 @@ static int sc450ai_probe(struct i2c_client *client, of_property_read_u32(node, RKMODULE_CAMERA_STANDBY_HW, &sc450ai->standby_hw); dev_info(dev, "sc450ai->standby_hw = %d\n", sc450ai->standby_hw); + ret = of_property_read_string(node, RKMODULE_CAMERA_SYNC_MODE, + &sync_mode_name); + if (ret) { + sc450ai->sync_mode = NO_SYNC_MODE; + dev_err(dev, "could not get sync mode!\n"); + } else { + if (strcmp(sync_mode_name, RKMODULE_EXTERNAL_MASTER_MODE) == 0) { + sc450ai->sync_mode = EXTERNAL_MASTER_MODE; + dev_info(dev, "external master mode\n"); + } else if (strcmp(sync_mode_name, RKMODULE_INTERNAL_MASTER_MODE) == 0) { + sc450ai->sync_mode = INTERNAL_MASTER_MODE; + dev_info(dev, "internal master mode\n"); + } else if (strcmp(sync_mode_name, RKMODULE_SOFT_SYNC_MODE) == 0) { + sc450ai->sync_mode = SOFT_SYNC_MODE; + dev_info(dev, "soft sync mode\n"); + } + } sc450ai->is_thunderboot = IS_ENABLED(CONFIG_VIDEO_ROCKCHIP_THUNDER_BOOT_ISP); dev_err(dev, "========= is_thunderboot %d\n", sc450ai->is_thunderboot); From 9ae0cc05fad99e7cb6cc87c4052ef3df1810f77c Mon Sep 17 00:00:00 2001 From: Zefa Chen Date: Wed, 4 Jun 2025 10:41:40 +0800 Subject: [PATCH 06/18] arm64: dts: rockchip: rv1126b-evb-dual-cam-csi0: sc450ai support sync mode Change-Id: I5a4e7b8364646c9a2cf604f19762e12854d7341b Signed-off-by: Zefa Chen --- arch/arm64/boot/dts/rockchip/rv1126b-evb-dual-cam-csi0.dtsi | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rv1126b-evb-dual-cam-csi0.dtsi b/arch/arm64/boot/dts/rockchip/rv1126b-evb-dual-cam-csi0.dtsi index 36c5927695fc..6b726e14c01a 100644 --- a/arch/arm64/boot/dts/rockchip/rv1126b-evb-dual-cam-csi0.dtsi +++ b/arch/arm64/boot/dts/rockchip/rv1126b-evb-dual-cam-csi0.dtsi @@ -92,6 +92,7 @@ rockchip,camera-module-facing = "back"; rockchip,camera-module-name = "default"; rockchip,camera-module-lens-name = "default"; + rockchip,camera-module-sync-mode = "internal_master"; port { sc450ai_1_out: endpoint { remote-endpoint = <&csi_dphy2_input0>; @@ -114,6 +115,7 @@ rockchip,camera-module-facing = "back"; rockchip,camera-module-name = "default"; rockchip,camera-module-lens-name = "default"; + rockchip,camera-module-sync-mode = "external_master"; port { sc450ai_2_out: endpoint { remote-endpoint = <&csi_dphy1_input0>; From 6a37cd10c6e99902e7531e2df22c40b5e5d1fcad Mon Sep 17 00:00:00 2001 From: Zefa Chen Date: Tue, 24 Sep 2024 18:05:07 +0800 Subject: [PATCH 07/18] media: rockchip: vicap fixes error of destroy dummy buffer Signed-off-by: Zefa Chen Change-Id: I25180eaeedb72c5b75c348ac65810e0d93c49c5e --- drivers/media/platform/rockchip/cif/capture.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/media/platform/rockchip/cif/capture.c b/drivers/media/platform/rockchip/cif/capture.c index ca3db74adb8e..d0a360bed40e 100644 --- a/drivers/media/platform/rockchip/cif/capture.c +++ b/drivers/media/platform/rockchip/cif/capture.c @@ -6916,6 +6916,8 @@ void rkcif_do_stop_stream(struct rkcif_stream *stream, break; } } + if (can_reset && hw_dev->dummy_buf.vaddr) + rkcif_destroy_dummy_buf(stream); mutex_unlock(&hw_dev->dev_lock); if (dev->can_be_reset && dev->chip_id >= CHIP_RK3588_CIF) { rkcif_do_soft_reset(dev); @@ -6938,8 +6940,6 @@ void rkcif_do_stop_stream(struct rkcif_stream *stream, } if (atomic_read(&dev->pipe.stream_cnt) == 0) atomic_set(&stream->sub_stream_buf_cnt, 0); - if (can_reset && hw_dev->dummy_buf.vaddr) - rkcif_destroy_dummy_buf(stream); stream->rounding_bit = 0; if (stream->id == RKCIF_STREAM_MIPI_ID0 && dev->is_support_get_exp) { kfifo_free(&stream->exp_kfifo); From b38fd22b7fe346f28bfe12528770ddee812a458f Mon Sep 17 00:00:00 2001 From: Zefa Chen Date: Mon, 16 Jun 2025 16:08:51 +0800 Subject: [PATCH 08/18] media: i2c: os12d40 support 2256x1256@30fps Change-Id: I60f32208f1ebce130a225666b785bab80862b08c Signed-off-by: Zefa Chen --- drivers/media/i2c/os12d40.c | 851 +++++++++++++++++++++++++++++++++++- 1 file changed, 837 insertions(+), 14 deletions(-) diff --git a/drivers/media/i2c/os12d40.c b/drivers/media/i2c/os12d40.c index bbd898ada12e..72ae0c02be5d 100644 --- a/drivers/media/i2c/os12d40.c +++ b/drivers/media/i2c/os12d40.c @@ -98,7 +98,6 @@ #define OF_CAMERA_PINCTRL_STATE_SLEEP "rockchip,camera_sleep" #define OS12D40_NAME "os12d40" -#define OS12D40_MEDIA_BUS_FMT MEDIA_BUS_FMT_SBGGR10_1X10 #define USE_4_CELL (1) @@ -127,6 +126,7 @@ struct regval { }; struct os12d40_mode { + u32 bus_fmt; u32 width; u32 height; struct v4l2_fract max_fps; @@ -1129,9 +1129,823 @@ static const struct regval os12d40_4512x2512_regs_4lane[] = { {REG_NULL, 0x00}, }; +static const struct regval os12d40_2256x1256_regs_4lane[] = { + // Sysclk 90Mhz, MIPI4_996Mbps/Lane, 30Fps. + //Line_length =1080, Frame_length =2776 + {0x0103, 0x01}, + {0x0301, 0x80}, + {0x0302, 0x01}, + {0x0304, 0x01}, + {0x0305, 0xf0}, + {0x0306, 0x04}, + {0x0307, 0x01}, + {0x0309, 0x00}, + {0x0320, 0x20}, + {0x0324, 0x01}, + {0x0325, 0xc2}, + {0x0326, 0xd3}, + {0x032b, 0x06}, + {0x0344, 0x01}, + {0x0345, 0xb8}, + {0x0346, 0xcb}, + {0x0350, 0x02}, + {0x0360, 0x09}, + {0x3002, 0x80}, + {0x300d, 0x11}, + {0x300e, 0x11}, + {0x3012, 0x41}, + {0x3016, 0xf0}, + {0x3017, 0xd0}, + {0x3018, 0xf0}, + {0x3019, 0xc2}, + {0x301a, 0xf0}, + {0x301b, 0x34}, + {0x301c, 0x91}, + {0x301d, 0x02}, + {0x301e, 0x98}, + {0x301f, 0x21}, + {0x3022, 0xf0}, + {0x3027, 0x2e}, + {0x302c, 0x01}, + {0x302d, 0x00}, + {0x302e, 0x00}, + {0x302f, 0x00}, + {0x3030, 0x03}, + {0x3044, 0xc2}, + {0x304b, 0x00}, + {0x30d4, 0x00}, + {0x3209, 0x00}, + {0x320a, 0x00}, + {0x320b, 0x00}, + {0x320c, 0x00}, + {0x320d, 0x01}, + {0x3216, 0x01}, + {0x3218, 0x80}, + {0x33c0, 0x00}, + {0x33c3, 0x00}, + {0x33c4, 0x00}, + {0x3400, 0x04}, + {0x3408, 0x05}, + {0x340c, 0x10}, + {0x340e, 0x30}, + {0x3421, 0x08}, + {0x3422, 0x00}, + {0x3423, 0x15}, + {0x3424, 0x40}, + {0x3425, 0x10}, + {0x3426, 0x20}, + {0x3500, 0x00}, + {0x3501, 0x05}, + {0x3502, 0x60}, + {0x3504, 0x08}, + {0x3508, 0x01}, + {0x3509, 0x00}, + {0x350a, 0x01}, + {0x350b, 0x00}, + {0x350c, 0x00}, + {0x350e, 0x00}, + {0x3510, 0x01}, + {0x3511, 0x00}, + {0x3512, 0x00}, + {0x3513, 0x01}, + {0x3514, 0x00}, + {0x3515, 0x00}, + {0x3516, 0x01}, + {0x3517, 0x00}, + {0x3518, 0x00}, + {0x352d, 0x00}, + {0x352e, 0x00}, + {0x352f, 0x00}, + {0x3541, 0x00}, + {0x3542, 0x40}, + {0x3548, 0x01}, + {0x3549, 0x00}, + {0x354a, 0x01}, + {0x354b, 0x00}, + {0x354c, 0x00}, + {0x354e, 0x00}, + {0x3550, 0x01}, + {0x3551, 0x00}, + {0x3552, 0x00}, + {0x3581, 0x00}, + {0x3582, 0x40}, + {0x3588, 0x01}, + {0x3589, 0x00}, + {0x358a, 0x01}, + {0x358b, 0x00}, + {0x358c, 0x00}, + {0x3590, 0x01}, + {0x3591, 0x00}, + {0x3592, 0x00}, + {0x3610, 0x80}, + {0x3615, 0x27}, + {0x3617, 0x5a}, + {0x3624, 0x88}, + {0x3628, 0x77}, + {0x3644, 0x20}, + {0x3652, 0x00}, + {0x3653, 0x00}, + {0x3663, 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0x00}, + {0x5857, 0xca}, + {0x5858, 0x12}, + {0x5859, 0x10}, + {0x585a, 0x0a}, + {0x585b, 0x30}, + {0x585e, 0x00}, + {0x585f, 0x18}, + {0x5860, 0x00}, + {0x5861, 0x00}, + {0x5862, 0x00}, + {0x5863, 0x08}, + {0x5864, 0x12}, + {0x5865, 0x10}, + {0x5866, 0x0a}, + {0x5867, 0x30}, + {0x5868, 0x00}, + {0x5869, 0x00}, + {0x586a, 0x00}, + {0x586b, 0x00}, + {0x586c, 0x12}, + {0x586d, 0x10}, + {0x586e, 0x0a}, + {0x586f, 0x30}, + {0x587c, 0x06}, + {0x587d, 0x06}, + {0x587e, 0x02}, + {0x587f, 0x02}, + {0x5880, 0x02}, + {0x5881, 0x06}, + {0x5882, 0x0a}, + {0x5883, 0x0e}, + {0x5f06, 0x10}, + {0x5f07, 0x20}, + {0x5f08, 0x0c}, + {0x5f09, 0x0c}, + {0x5f0a, 0x04}, + {0x5f0b, 0x04}, + {0x5f0c, 0x04}, + {0x5f0d, 0x0c}, + {0x5f0e, 0x14}, + {0x5f0f, 0x1c}, + {0x5f10, 0x01}, + {0x5f11, 0x01}, + {0x5f18, 0x12}, + {0x5f19, 0x20}, + {0x5f1a, 0x0a}, + {0x5f1b, 0x40}, + {0x5f1d, 0x10}, + {0x5f1f, 0x00}, + {0x5f20, 0x12}, + {0x5f21, 0x00}, + {0x5f22, 0x0a}, + {0x5f23, 0x40}, + {0x5f25, 0x09}, + {0x5f2a, 0x00}, + {0x5f2b, 0x18}, + {0x6600, 0x00}, + {0x6601, 0x00}, + {0x6602, 0x00}, + {0x6603, 0x83}, + {0x6960, 0x0f}, + {0x69a2, 0x09}, + {0x69a3, 0x00}, + {0x69a6, 0x05}, + {0x69a7, 0x10}, + {0x69aa, 0x09}, + {0x69ab, 0x00}, + {0x69ae, 0x05}, + {0x69af, 0x10}, + {0x69b2, 0x09}, + {0x69b3, 0x00}, + {0x69b6, 0x05}, + {0x69b7, 0x10}, + {0x69ba, 0x09}, + {0x69bb, 0x00}, + {0x69be, 0x05}, + {0x69bf, 0x10}, + {0x6a24, 0x09}, + {0x6a25, 0x00}, + {0x6a2a, 0x05}, + {0x6a2b, 0x10}, + {0x6a61, 0x40}, + {0x6a64, 0x09}, + {0x6a65, 0x00}, + {0x6a6a, 0x05}, + {0x6a6b, 0x10}, + {0x6a23, 0x00}, + {0x6a27, 0x00}, + {0x6a63, 0x00}, + {0x6a67, 0x00}, + {0x69a1, 0x00}, + {0x69a5, 0x00}, + {0x69a9, 0x00}, + {0x69ad, 0x00}, + {0x69b1, 0x00}, + {0x69b5, 0x00}, + {0x69b9, 0x00}, + {0x69bd, 0x00}, + {0xfff4, 0x01}, + {0xfff6, 0x00}, + {0x0361, 0x07}, + {0x3644, 0x20}, + {0x5000, 0x2b}, + {0x5001, 0x0b}, + {0x50d4, 0x00}, + {0x5171, 0xbe}, + {0x3222, 0x03}, + {0x3208, 0x06}, + {0x3938, 0x41}, + {0x393b, 0x41}, + {0x3208, 0x16}, + {0x3208, 0x07}, + {0x3938, 0x43}, + {0x393b, 0x44}, + {0x3208, 0x17}, + {0x3208, 0x08}, + {0x3938, 0x45}, + {0x393b, 0x46}, + {0x3208, 0x18}, + {0x3208, 0x09}, + {0x3938, 0x4b}, + {0x393b, 0x4b}, + {0x3208, 0x19}, + {0x5000, 0x29}, + {0x5001, 0x01}, + {REG_NULL, 0x00}, +}; static const struct os12d40_mode supported_modes_4lane[] = { { + .bus_fmt = MEDIA_BUS_FMT_SGBRG10_1X10, + .width = 2256, + .height = 1256, + .max_fps = { + .numerator = 10000, + .denominator = 300000, + }, + .exp_def = 0x0500, + .hts_def = 0x438 * 8, + .vts_def = 0x0ad8, + .reg_list = os12d40_2256x1256_regs_4lane, + .hdr_mode = NO_HDR, + }, + { + .bus_fmt = MEDIA_BUS_FMT_SBGGR10_1X10, .width = 4512, .height = 2512, .max_fps = { @@ -1321,7 +2135,7 @@ static int os12d40_set_fmt(struct v4l2_subdev *sd, mutex_lock(&os12d40->mutex); mode = os12d40_find_best_fit(os12d40, fmt); - fmt->format.code = OS12D40_MEDIA_BUS_FMT; + fmt->format.code = mode->bus_fmt; fmt->format.width = mode->width; fmt->format.height = mode->height; fmt->format.field = V4L2_FIELD_NONE; @@ -1366,7 +2180,7 @@ static int os12d40_get_fmt(struct v4l2_subdev *sd, } else { fmt->format.width = mode->width; fmt->format.height = mode->height; - fmt->format.code = OS12D40_MEDIA_BUS_FMT; + fmt->format.code = mode->bus_fmt; fmt->format.field = V4L2_FIELD_NONE; } mutex_unlock(&os12d40->mutex); @@ -1378,9 +2192,11 @@ static int os12d40_enum_mbus_code(struct v4l2_subdev *sd, struct v4l2_subdev_state *sd_state, struct v4l2_subdev_mbus_code_enum *code) { + struct os12d40 *os12d40 = to_os12d40(sd); + if (code->index != 0) return -EINVAL; - code->code = OS12D40_MEDIA_BUS_FMT; + code->code = os12d40->cur_mode->bus_fmt; return 0; } @@ -1394,9 +2210,6 @@ static int os12d40_enum_frame_sizes(struct v4l2_subdev *sd, if (fse->index >= os12d40->cfg_num) return -EINVAL; - if (fse->code != OS12D40_MEDIA_BUS_FMT) - return -EINVAL; - fse->min_width = supported_modes[fse->index].width; fse->max_width = supported_modes[fse->index].width; fse->max_height = supported_modes[fse->index].height; @@ -1487,7 +2300,10 @@ static long os12d40_ioctl(struct v4l2_subdev *sd, unsigned int cmd, void *arg) case RKMODULE_GET_BAYER_MODE: bayer_mode = (u32 *)arg; #ifdef USE_4_CELL - *bayer_mode = RKMODULE_QUARD_BAYER; + if (os12d40->cur_mode->width == 4512) + *bayer_mode = RKMODULE_QUARD_BAYER; + else + *bayer_mode = RKMODULE_NORMAL_BAYER; #else *bayer_mode = RKMODULE_NORMAL_BAYER; #endif @@ -1845,7 +2661,7 @@ static int os12d40_open(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh) /* Initialize try_fmt */ try_fmt->width = def_mode->width; try_fmt->height = def_mode->height; - try_fmt->code = OS12D40_MEDIA_BUS_FMT; + try_fmt->code = def_mode->bus_fmt; try_fmt->field = V4L2_FIELD_NONE; mutex_unlock(&os12d40->mutex); @@ -1864,7 +2680,7 @@ static int os12d40_enum_frame_interval(struct v4l2_subdev *sd, if (fie->index >= os12d40->cfg_num) return -EINVAL; - fie->code = OS12D40_MEDIA_BUS_FMT; + fie->code = supported_modes[fie->index].bus_fmt; fie->width = supported_modes[fie->index].width; fie->height = supported_modes[fie->index].height; fie->interval = supported_modes[fie->index].max_fps; @@ -1892,10 +2708,17 @@ static int os12d40_get_selection(struct v4l2_subdev *sd, struct os12d40 *os12d40 = to_os12d40(sd); if (sel->target == V4L2_SEL_TGT_CROP_BOUNDS) { - sel->r.left = CROP_START(os12d40->cur_mode->width, DST_WIDTH); - sel->r.width = DST_WIDTH; - sel->r.top = CROP_START(os12d40->cur_mode->height, DST_HEIGHT); - sel->r.height = DST_HEIGHT; + if (os12d40->cur_mode->width == 4512) { + sel->r.left = CROP_START(os12d40->cur_mode->width, DST_WIDTH); + sel->r.width = DST_WIDTH; + sel->r.top = CROP_START(os12d40->cur_mode->height, DST_HEIGHT); + sel->r.height = DST_HEIGHT; + } else { + sel->r.left = 0; + sel->r.width = os12d40->cur_mode->width; + sel->r.top = 0; + sel->r.height = os12d40->cur_mode->height; + } return 0; } return -EINVAL; From ef4c973c422d3529039c90b3fb0536325bc5d31f Mon Sep 17 00:00:00 2001 From: Zefa Chen Date: Fri, 16 May 2025 09:13:53 +0800 Subject: [PATCH 09/18] media: i2c: ox03c10 support linear raw10 Change-Id: Ia55493433605c65cd6d4dd06ee2bf8d7a88441be Signed-off-by: Zefa Chen --- drivers/media/i2c/ox03c10.c | 1214 +++++++++++++++++++++++++++++++++-- 1 file changed, 1144 insertions(+), 70 deletions(-) diff --git a/drivers/media/i2c/ox03c10.c b/drivers/media/i2c/ox03c10.c index e03cdef88380..18833906a28e 100644 --- a/drivers/media/i2c/ox03c10.c +++ b/drivers/media/i2c/ox03c10.c @@ -33,7 +33,7 @@ #endif #define OX03C10_LANES 4 -#define OX03C10_BITS_PER_SAMPLE 12 +#define OX03C10_BITS_PER_SAMPLE 10 #define OX03C10_LINK_FREQ_300MHZ 300000000 #define OX03C10_LINK_FREQ_480MHZ 480000000 /* pixel rate = link frequency * 2 * lanes / BITS_PER_SAMPLE */ @@ -57,7 +57,7 @@ #define OX03C10_GAIN_MIN 0x10 #define OX03C10_GAIN_MAX 0xf7f #define OX03C10_GAIN_STEP 0x01 -#define OX03C10_GAIN_DEFAULT 0x10 +#define OX03C10_GAIN_DEFAULT 0x30 // exposure ctrl reg for DCG #define OX03C10_EXPOSURE_HCG_MIN 4 #define OX03C10_EXPOSURE_HCG_STEP 1 @@ -478,15 +478,15 @@ static const struct regval ox03c10_1920x1080_30fps_HDR3_SPD_PWL12_mipi600[] = { {0x3b41, 0x40}, {0x3b42, 0x00}, {0x3b43, 0x90}, - {0x3b44, 0x00}, - {0x3b45, 0x20}, - {0x3b46, 0x00}, - {0x3b47, 0x20}, + {0x3b44, 0x02}, + {0x3b45, 0x00}, + {0x3b46, 0x02}, + {0x3b47, 0x00}, {0x3b48, 0x19}, {0x3b49, 0x12}, {0x3b4a, 0x16}, {0x3b4b, 0x2e}, - {0x3b4c, 0x00}, + {0x3b4c, 0x03}, {0x3b4d, 0x00}, {0x3b86, 0x00}, {0x3b87, 0x34}, @@ -529,7 +529,7 @@ static const struct regval ox03c10_1920x1080_30fps_HDR3_SPD_PWL12_mipi600[] = { {0x4310, 0x95}, {0x4311, 0x16}, {0x4316, 0x00}, - {0x4317, 0x08}, + {0x4317, 0x38}, {0x4319, 0x03}, {0x431a, 0x00}, {0x431b, 0x00}, @@ -560,8 +560,8 @@ static const struct regval ox03c10_1920x1080_30fps_HDR3_SPD_PWL12_mipi600[] = { {0x4598, 0x40}, {0x4599, 0x0e}, {0x459a, 0x0e}, - {0x459b, 0xfb}, - {0x459c, 0xf3}, + {0x459b, 0xf5}, + {0x459c, 0xf1}, {0x4602, 0x00}, {0x4603, 0x13}, {0x4604, 0x00}, @@ -988,18 +988,6 @@ static const struct regval ox03c10_1920x1080_30fps_HDR3_SPD_PWL12_mipi600[] = { {0x4649, 0x03}, {0x4d09, 0xff}, {0x4d09, 0xdf}, - {0x5019, 0x00}, - {0x501a, 0xff}, - {0x501b, 0xff}, - {0x501d, 0x00}, - {0x501e, 0x23}, - {0x501f, 0x8e}, - {0x5021, 0x00}, - {0x5022, 0x00}, - {0x5023, 0x50}, - {0x5025, 0x00}, - {0x5026, 0x23}, - {0x5027, 0x8e}, {0x5b80, 0x01}, {0x5c00, 0x08}, {0x5c80, 0x00}, @@ -1485,8 +1473,6 @@ static const struct regval ox03c10_1920x1080_30fps_HDR3_SPD_PWL12_mipi600[] = { {0x5886, 0x07}, {0x5887, 0x3f}, {0x4221, 0x13}, - {0x380e, 0x03}, - {0x380f, 0x37}, {0x3501, 0x01}, {0x3502, 0xc8}, {0x3541, 0x01}, @@ -1505,7 +1491,6 @@ static const struct regval ox03c10_1920x1080_30fps_HDR3_SPD_PWL12_mipi600[] = { {0x4f02, 0x80}, {0x4f03, 0x2c}, {0x4f04, 0xf8}, - {0x0100, 0x01}, {REG_NULL, 0x00}, }; @@ -1756,15 +1741,15 @@ static const struct regval ox03c10_1920x1080_30fps_HDR3_VS_PWL12_mipi600[] = { {0x3b41, 0x40}, {0x3b42, 0x00}, {0x3b43, 0x90}, - {0x3b44, 0x00}, - {0x3b45, 0x20}, - {0x3b46, 0x00}, - {0x3b47, 0x20}, + {0x3b44, 0x02}, + {0x3b45, 0x00}, + {0x3b46, 0x02}, + {0x3b47, 0x00}, {0x3b48, 0x19}, {0x3b49, 0x12}, {0x3b4a, 0x16}, {0x3b4b, 0x2e}, - {0x3b4c, 0x00}, + {0x3b4c, 0x03}, {0x3b4d, 0x00}, {0x3b86, 0x00}, {0x3b87, 0x34}, @@ -1807,7 +1792,7 @@ static const struct regval ox03c10_1920x1080_30fps_HDR3_VS_PWL12_mipi600[] = { {0x4310, 0x95}, {0x4311, 0x16}, {0x4316, 0x00}, - {0x4317, 0x08}, + {0x4317, 0x38}, {0x4319, 0x01}, {0x431a, 0x00}, {0x431b, 0x00}, @@ -1838,8 +1823,8 @@ static const struct regval ox03c10_1920x1080_30fps_HDR3_VS_PWL12_mipi600[] = { {0x4598, 0x40}, {0x4599, 0x0e}, {0x459a, 0x0e}, - {0x459b, 0xfb}, - {0x459c, 0xf3}, + {0x459b, 0xf5}, + {0x459c, 0xf1}, {0x4602, 0x00}, {0x4603, 0x13}, {0x4604, 0x00}, @@ -2266,18 +2251,6 @@ static const struct regval ox03c10_1920x1080_30fps_HDR3_VS_PWL12_mipi600[] = { {0x4649, 0x03}, {0x4d09, 0xff}, {0x4d09, 0xdf}, - {0x5019, 0x00}, - {0x501a, 0xff}, - {0x501b, 0xff}, - {0x501d, 0x00}, - {0x501e, 0x23}, - {0x501f, 0x8e}, - {0x5021, 0x00}, - {0x5022, 0x00}, - {0x5023, 0x50}, - {0x5025, 0x00}, - {0x5026, 0x23}, - {0x5027, 0x8e}, {0x5b80, 0x08}, {0x5c00, 0x08}, {0x5c80, 0x00}, @@ -2763,8 +2736,6 @@ static const struct regval ox03c10_1920x1080_30fps_HDR3_VS_PWL12_mipi600[] = { {0x5886, 0x07}, {0x5887, 0x3f}, {0x4221, 0x13}, - {0x380e, 0x03}, - {0x380f, 0x37}, {0x3501, 0x01}, {0x3502, 0xc8}, {0x3541, 0x01}, @@ -2782,7 +2753,6 @@ static const struct regval ox03c10_1920x1080_30fps_HDR3_VS_PWL12_mipi600[] = { {0x4f02, 0x80}, {0x4f03, 0x2c}, {0x4f04, 0xf8}, - {0x0100, 0x01}, {REG_NULL, 0xff}, }; @@ -3855,7 +3825,1091 @@ static const struct regval ox03c10_1920x1080_30fps_HDR3_LFM_PWL16_mipi996[] = { {0x040c, 0x2e}, {0x040d, 0x44}, {0x040e, 0x0c}, - {0x0100, 0x01}, + {REG_NULL, 0xff}, +}; + +static const struct regval ox03c10_1920x1080_30fps_linear_raw10_mipi996[] = { + {0x0103, 0x01}, + {0x0107, 0x01}, + {0x4d5a, 0x1c}, + {0x4d09, 0xff}, + {0x4d09, 0xdf}, + {0x3208, 0x04}, + {0x4620, 0x04}, + {0x3208, 0x14}, + {0x3208, 0x05}, + {0x4620, 0x04}, + {0x3208, 0x15}, + {0x3208, 0x02}, + {0x3507, 0x00}, + {0x3208, 0x12}, + {0x3208, 0xa2}, + {0x0301, 0xc8}, + {0x0303, 0x01}, + {0x0304, 0x01}, + {0x0305, 0x2c}, + {0x0306, 0x04}, + {0x0307, 0x01}, + {0x0316, 0x00}, + {0x0317, 0x00}, + {0x0318, 0x00}, + {0x0323, 0x05}, + {0x0324, 0x01}, + {0x0325, 0x2c}, + {0x0400, 0xe0}, + {0x0401, 0x80}, + {0x0403, 0xde}, + {0x0404, 0x34}, + {0x0405, 0x3b}, + {0x0406, 0xde}, + {0x0407, 0x08}, + {0x0408, 0xe0}, + {0x0409, 0x7f}, + {0x040a, 0xde}, + {0x040b, 0x34}, + {0x040c, 0x47}, + {0x040d, 0xd8}, + {0x040e, 0x08}, + {0x2803, 0xfe}, + {0x280b, 0x00}, + {0x280c, 0x79}, + {0x3001, 0x03}, + {0x3002, 0xf8}, + {0x3005, 0x80}, + {0x3007, 0x01}, + {0x3008, 0x80}, + {0x3012, 0x41}, + {0x3020, 0x05}, + {0x3700, 0x28}, + {0x3701, 0x15}, + {0x3702, 0x19}, + {0x3703, 0x23}, + {0x3704, 0x0a}, + {0x3705, 0x00}, + {0x3706, 0x3e}, + {0x3707, 0x0d}, + {0x3708, 0x50}, + {0x3709, 0x5a}, + {0x370a, 0x00}, + {0x370b, 0x96}, + {0x3711, 0x11}, + {0x3712, 0x13}, + {0x3717, 0x02}, + {0x3718, 0x73}, + {0x372c, 0x40}, + {0x3733, 0x01}, + {0x3738, 0x36}, + {0x3739, 0x36}, + {0x373a, 0x25}, + {0x373b, 0x25}, + {0x373f, 0x21}, + {0x3740, 0x21}, + {0x3741, 0x21}, + {0x3742, 0x21}, + {0x3747, 0x28}, + {0x3748, 0x28}, + {0x3749, 0x19}, + {0x3755, 0x1a}, + {0x3756, 0x0a}, + {0x3757, 0x1c}, + {0x3765, 0x19}, + {0x3766, 0x05}, + {0x3767, 0x05}, + {0x3768, 0x13}, + {0x376c, 0x07}, + {0x3778, 0x20}, + {0x377c, 0xc8}, + {0x3781, 0x02}, + {0x3783, 0x02}, + {0x379c, 0x58}, + {0x379e, 0x00}, + {0x379f, 0x00}, + {0x37a0, 0x00}, + {0x37bc, 0x22}, + {0x37c0, 0x01}, + {0x37c4, 0x3e}, + {0x37c5, 0x3e}, + {0x37c6, 0x2a}, + {0x37c7, 0x28}, + {0x37c8, 0x02}, + {0x37c9, 0x12}, + {0x37cb, 0x29}, + {0x37cd, 0x29}, + {0x37d2, 0x00}, + {0x37d3, 0x73}, + {0x37d6, 0x00}, + {0x37d7, 0x6b}, + {0x37dc, 0x00}, + {0x37df, 0x54}, + {0x37e2, 0x00}, + {0x37e3, 0x00}, + {0x37f8, 0x00}, + {0x37f9, 0x01}, + {0x37fa, 0x00}, + {0x37fb, 0x19}, + {0x3c03, 0x01}, + {0x3c04, 0x01}, + {0x3c06, 0x21}, + {0x3c08, 0x01}, + {0x3c09, 0x01}, + {0x3c0a, 0x01}, + {0x3c0b, 0x21}, + {0x3c13, 0x21}, + {0x3c14, 0x82}, + {0x3c16, 0x13}, + {0x3c21, 0x00}, + {0x3c22, 0xf3}, + {0x3c37, 0x12}, + {0x3c38, 0x31}, + {0x3c3c, 0x00}, + {0x3c3d, 0x03}, + {0x3c44, 0x16}, + {0x3c5c, 0x8a}, + {0x3c5f, 0x03}, + {0x3c61, 0x80}, + {0x3c6f, 0x2b}, + {0x3c70, 0x5f}, + {0x3c71, 0x2c}, + {0x3c72, 0x2c}, + {0x3c73, 0x2c}, + {0x3c76, 0x12}, + {0x3182, 0x12}, + {0x320e, 0x00}, + {0x320f, 0x00}, + {0x3211, 0x61}, + {0x3215, 0xcd}, + {0x3219, 0x08}, + {0x3506, 0x30}, + {0x350a, 0x01}, + {0x350b, 0x00}, + {0x350c, 0x00}, + {0x3586, 0x60}, + {0x358a, 0x01}, + {0x358b, 0x00}, + {0x358c, 0x00}, + {0x3541, 0x00}, + {0x3542, 0x04}, + {0x3548, 0x04}, + {0x3549, 0x40}, + {0x354a, 0x01}, + {0x354b, 0x00}, + {0x354c, 0x00}, + {0x35c1, 0x00}, + {0x35c2, 0x02}, + {0x35c6, 0xa0}, + {0x3600, 0x8f}, + {0x3605, 0x16}, + {0x3609, 0xf0}, + {0x360a, 0x01}, + {0x360e, 0x1d}, + {0x360f, 0x10}, + {0x3610, 0x70}, + {0x3611, 0x3a}, + {0x3612, 0x28}, + {0x361a, 0x29}, + {0x361b, 0x6c}, + {0x361c, 0x0b}, + {0x361d, 0x00}, + {0x361e, 0xfc}, + {0x362a, 0x00}, + {0x364d, 0x0f}, + {0x364e, 0x18}, + {0x364f, 0x12}, + {0x3653, 0x1c}, + {0x3654, 0x00}, + {0x3655, 0x1f}, + {0x3656, 0x1f}, + {0x3657, 0x0c}, + {0x3658, 0x0a}, + {0x3659, 0x14}, + {0x365a, 0x18}, + {0x365b, 0x14}, + {0x365c, 0x10}, + {0x365e, 0x12}, + {0x3674, 0x08}, + {0x3677, 0x3a}, + {0x3678, 0x3a}, + {0x3679, 0x19}, + {0x3802, 0x00}, + {0x3803, 0x04}, + {0x3806, 0x05}, + {0x3807, 0x0b}, + {0x3808, 0x07}, + {0x3809, 0x80}, + {0x380a, 0x05}, + {0x380b, 0x00}, + {0x380c, 0x04}, + {0x380d, 0xd3}, + {0x380e, 0x02}, + {0x380f, 0xae}, + {0x3810, 0x00}, + {0x3811, 0x08}, + {0x3812, 0x00}, + {0x3813, 0x04}, + {0x3816, 0x01}, + {0x3817, 0x01}, + {0x381c, 0x18}, + {0x381e, 0x01}, + {0x381f, 0x01}, + {0x3820, 0x00}, + {0x3821, 0x19}, + {0x3832, 0x00}, + {0x3834, 0x00}, + {0x384c, 0x02}, + {0x384d, 0x53}, + {0x3850, 0x00}, + {0x3851, 0x42}, + {0x3852, 0x00}, + {0x3853, 0x40}, + {0x3858, 0x04}, + {0x388c, 0x02}, + {0x388d, 0x71}, + {0x3b40, 0x05}, + {0x3b41, 0x40}, + {0x3b42, 0x00}, + {0x3b43, 0x90}, + {0x3b44, 0x00}, + {0x3b45, 0x20}, + {0x3b46, 0x00}, + {0x3b47, 0x20}, + {0x3b48, 0x19}, + {0x3b49, 0x12}, + {0x3b4a, 0x16}, + {0x3b4b, 0x2e}, + {0x3b4c, 0x00}, + {0x3b4d, 0x00}, + {0x3b86, 0x00}, + {0x3b87, 0x34}, + {0x3b88, 0x00}, + {0x3b89, 0x08}, + {0x3b8a, 0x05}, + {0x3b8b, 0x00}, + {0x3b8c, 0x07}, + {0x3b8d, 0x80}, + {0x3b8e, 0x00}, + {0x3b8f, 0x00}, + {0x3b92, 0x05}, + {0x3b93, 0x00}, + {0x3b94, 0x07}, + {0x3b95, 0x80}, + {0x3b9e, 0x09}, + {0x3d82, 0x73}, + {0x3d85, 0x05}, + {0x3d8a, 0x03}, + {0x3d8b, 0xff}, + {0x3d99, 0x00}, + {0x3d9a, 0x9f}, + {0x3d9b, 0x00}, + {0x3d9c, 0xa0}, + {0x3da4, 0x00}, + {0x3da7, 0x50}, + {0x420e, 0xff}, + {0x420f, 0xff}, + {0x4210, 0xff}, + {0x4211, 0xff}, + {0x421e, 0x02}, + {0x421f, 0x45}, + {0x4220, 0xe1}, + {0x4221, 0x05}, + {0x4301, 0x0f}, + {0x4307, 0x03}, + {0x4308, 0x13}, + {0x430a, 0x53}, + {0x430d, 0x93}, + {0x430f, 0x57}, + {0x4310, 0x95}, + {0x4311, 0x16}, + {0x4316, 0x00}, + {0x4317, 0x08}, + {0x4319, 0x09}, + {0x431a, 0x00}, + {0x431b, 0x22}, + {0x431d, 0x2a}, + {0x431e, 0x11}, + {0x431f, 0x30}, + {0x4320, 0x59}, + {0x4323, 0x80}, + {0x4324, 0x00}, + {0x4503, 0x4e}, + {0x4505, 0x00}, + {0x4509, 0x00}, + {0x450a, 0x00}, + {0x4580, 0xf8}, + {0x4583, 0x07}, + {0x4584, 0x6a}, + {0x4585, 0x08}, + {0x4586, 0x05}, + {0x4587, 0x04}, + {0x4588, 0x73}, + {0x4589, 0x05}, + {0x458a, 0x1f}, + {0x458b, 0x02}, + {0x458c, 0xdc}, + {0x458d, 0x03}, + {0x458e, 0x02}, + {0x4597, 0x07}, + {0x4598, 0x40}, + {0x4599, 0x0e}, + {0x459a, 0x0e}, + {0x459b, 0xfb}, + {0x459c, 0xf3}, + {0x4602, 0x00}, + {0x4603, 0x13}, + {0x4604, 0x00}, + {0x4609, 0x0a}, + {0x460a, 0x00}, + {0x4610, 0x00}, + {0x4611, 0x70}, + {0x4612, 0x00}, + {0x4613, 0x0c}, + {0x4614, 0x00}, + {0x4615, 0x70}, + {0x4616, 0x00}, + {0x4617, 0x0c}, + {0x4800, 0x04}, + {0x480a, 0x22}, + {0x4813, 0xe4}, + {0x4814, 0x2a}, + {0x4837, 0x0d}, + {0x484b, 0x47}, + {0x484f, 0x40}, + {0x4887, 0x51}, + {0x4d00, 0x4a}, + {0x4d01, 0x18}, + {0x4d05, 0xff}, + {0x4d06, 0x88}, + {0x4d08, 0x63}, + {0x4d09, 0xdf}, + {0x4d15, 0x7d}, + {0x4d1a, 0x20}, + {0x4d30, 0x0a}, + {0x4d31, 0x00}, + {0x4d34, 0x7d}, + {0x4d3c, 0x7d}, + {0x4f00, 0x3f}, + {0x4f01, 0xff}, + {0x4f02, 0xff}, + {0x4f03, 0x2c}, + {0x4f04, 0xe0}, + {0x6a00, 0x00}, + {0x6a01, 0x20}, + {0x6a02, 0x00}, + {0x6a03, 0x20}, + {0x6a04, 0x02}, + {0x6a05, 0x80}, + {0x6a06, 0x01}, + {0x6a07, 0xe0}, + {0x6a08, 0xcf}, + {0x6a09, 0x01}, + {0x6a0a, 0x40}, + {0x6a20, 0x00}, + {0x6a21, 0x02}, + {0x6a22, 0x00}, + {0x6a23, 0x00}, + {0x6a24, 0x00}, + {0x6a25, 0xf0}, + {0x6a26, 0x00}, + {0x6a27, 0x00}, + {0x6a28, 0x00}, + {0x5000, 0x8f}, + {0x5001, 0x65}, + {0x5002, 0x7f}, + {0x5003, 0x6a}, + {0x5004, 0x3e}, + {0x5005, 0x1e}, + {0x5006, 0x1e}, + {0x5007, 0x1e}, + {0x5008, 0x00}, + {0x500c, 0x00}, + {0x502c, 0x00}, + {0x502e, 0x00}, + {0x502f, 0x00}, + {0x504b, 0x00}, + {0x5053, 0x00}, + {0x505b, 0x00}, + {0x5063, 0x00}, + {0x5070, 0x00}, + {0x5074, 0x04}, + {0x507a, 0x00}, + {0x507b, 0x00}, + {0x5500, 0x02}, + {0x5700, 0x02}, + {0x5900, 0x02}, + {0x6007, 0x04}, + {0x6008, 0x05}, + {0x6009, 0x02}, + {0x600b, 0x08}, + {0x600c, 0x07}, + {0x600d, 0x88}, + {0x6016, 0x00}, + {0x6027, 0x04}, + {0x6028, 0x05}, + {0x6029, 0x02}, + {0x602b, 0x08}, + {0x602c, 0x07}, + {0x602d, 0x88}, + {0x6047, 0x04}, + {0x6048, 0x05}, + {0x6049, 0x02}, + {0x604b, 0x08}, + {0x604c, 0x07}, + {0x604d, 0x88}, + {0x6067, 0x04}, + {0x6068, 0x05}, + {0x6069, 0x02}, + {0x606b, 0x08}, + {0x606c, 0x07}, + {0x606d, 0x88}, + {0x6087, 0x04}, + {0x6088, 0x05}, + {0x6089, 0x02}, + {0x608b, 0x08}, + {0x608c, 0x07}, + {0x608d, 0x88}, + {0x5e00, 0x02}, + {0x5e01, 0x0b}, + {0x5e02, 0x00}, + {0x5e03, 0x00}, + {0x5e04, 0x00}, + {0x5e05, 0x0b}, + {0x5e06, 0x0c}, + {0x5e07, 0x0c}, + {0x5e08, 0x0c}, + {0x5e09, 0x0c}, + {0x5e0a, 0x0c}, + {0x5e0b, 0x0d}, + {0x5e0c, 0x0d}, + {0x5e0d, 0x0d}, + {0x5e0e, 0x0d}, + {0x5e0f, 0x0d}, + {0x5e10, 0x0d}, + {0x5e11, 0x0d}, + {0x5e12, 0x0e}, + {0x5e13, 0x0e}, + {0x5e14, 0x0e}, + {0x5e15, 0x0e}, + {0x5e16, 0x0e}, + {0x5e17, 0x0e}, + {0x5e18, 0x0e}, + {0x5e19, 0x10}, + {0x5e1a, 0x11}, + {0x5e1b, 0x11}, + {0x5e1c, 0x12}, + {0x5e1d, 0x12}, + {0x5e1e, 0x14}, + {0x5e1f, 0x15}, + {0x5e20, 0x16}, + {0x5e21, 0x17}, + {0x5e22, 0x00}, + {0x5e23, 0x08}, + {0x5e26, 0x00}, + {0x5e27, 0x00}, + {0x5e29, 0x00}, + {0x5e2a, 0x00}, + {0x5e2c, 0x00}, + {0x5e2d, 0x00}, + {0x5e2f, 0x03}, + {0x5e30, 0xff}, + {0x5e32, 0x04}, + {0x5e33, 0x00}, + {0x5e34, 0x00}, + {0x5e35, 0x04}, + {0x5e36, 0x00}, + {0x5e37, 0x00}, + {0x5e38, 0x04}, + {0x5e39, 0x00}, + {0x5e3a, 0x00}, + {0x5e3b, 0x04}, + {0x5e3c, 0x00}, + {0x5e3d, 0x00}, + {0x5e3e, 0x04}, + {0x5e3f, 0x00}, + {0x5e40, 0x00}, + {0x5e41, 0x06}, + {0x5e42, 0x00}, + {0x5e43, 0x00}, + {0x5e44, 0x06}, + {0x5e45, 0x00}, + {0x5e46, 0x00}, + {0x5e47, 0x06}, + {0x5e48, 0x00}, + {0x5e49, 0x00}, + {0x5e4a, 0x06}, + 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{0x0408, 0x78}, + {0x0409, 0x00}, + {0x040a, 0xd1}, + {0x040b, 0x1e}, + {0x040c, 0x2e}, + {0x040d, 0x44}, + {0x040e, 0x0c}, + + {0x4221, 0x05}, + {0x5002, 0x3f}, + {0x5003, 0x2a}, + {0x502c, 0x0f}, + {0x504b, 0x04}, + {0x5053, 0x03}, + {0x505b, 0x02}, + {0x5063, 0x01}, + {0x5074, 0x59}, + {0x4319, 0x43}, + {0x431a, 0x01}, + {REG_NULL, 0xff}, }; @@ -3890,6 +4944,25 @@ static struct rkmodule_hdr_compr ox03c10_hdr_compr_16 = { }; static const struct ox03c10_mode supported_modes[] = { + { + .bus_fmt = MEDIA_BUS_FMT_SBGGR10_1X10, + .width = 1920, + .height = 1080, + .max_fps = { + .numerator = 10000, + .denominator = 300000, + }, + .exp_def = 0x0200, + .hts_def = 0x10fe, + .vts_def = 0x02ae * 2, + .reg_list = ox03c10_1920x1080_30fps_linear_raw10_mipi996, + .hdr_mode = NO_HDR, + .hdr_compr = NULL, + .bpp = 10, + .mipi_freq_idx = 1, + .vc[PAD0] = 0, + .exp_mode = EXP_NORMAL, + }, { .bus_fmt = MEDIA_BUS_FMT_SBGGR12_1X12, .width = 1920, @@ -3898,9 +4971,9 @@ static const struct ox03c10_mode supported_modes[] = { .numerator = 10000, .denominator = 300000, }, - .exp_def = 0x0038, + .exp_def = 0x0200, .hts_def = 0x10fe, - .vts_def = 0x0337 * 2, + .vts_def = 0x02ae * 2, .reg_list = ox03c10_1920x1080_30fps_HDR3_VS_PWL12_mipi600, .hdr_mode = HDR_COMPR, .hdr_compr = &ox03c10_hdr_compr_12, @@ -3918,7 +4991,7 @@ static const struct ox03c10_mode supported_modes[] = { .numerator = 10000, .denominator = 300000, }, - .exp_def = 0x0038, + .exp_def = 0x0200, .hts_def = 0x10FE, .vts_def = 0x02AE * 2, .reg_list = ox03c10_1920x1080_30fps_HDR3_LFM_PWL16_mipi996, @@ -3928,7 +5001,10 @@ static const struct ox03c10_mode supported_modes[] = { .mipi_freq_idx = 1, .hdr_operating_mode = OX03C10_HDR3_DCG_VS_LFM_16BIT, .vc[PAD0] = 0, - .exp_mode = EXP_HDR3_DCG_SPD, + .vc[PAD1] = 1, + .vc[PAD2] = 2, + .vc[PAD3] = 3, + .exp_mode = EXP_HDR3_DCG_VS, }, { .bus_fmt = MEDIA_BUS_FMT_SBGGR12_1X12, @@ -3938,16 +5014,17 @@ static const struct ox03c10_mode supported_modes[] = { .numerator = 10000, .denominator = 300000, }, - .exp_def = 0x0038, + .exp_def = 0x0200, .hts_def = 0x10fe, - .vts_def = 0x0337, + .vts_def = 0x02ae * 2, .reg_list = ox03c10_1920x1080_30fps_HDR3_SPD_PWL12_mipi600, .hdr_mode = NO_HDR, .hdr_compr = &ox03c10_hdr_compr_12, .bpp = 12, - .mipi_freq_idx = 5, + .mipi_freq_idx = 0, .hdr_operating_mode = OX03C10_HDR3_DCG_SPD_12BIT, .vc[PAD0] = 0, + .exp_mode = EXP_HDR3_DCG_SPD, }, }; @@ -4117,9 +5194,9 @@ static int ox03c10_set_fmt(struct v4l2_subdev *sd, h_blank = mode->hts_def - mode->width; __v4l2_ctrl_modify_range(ox03c10->hblank, h_blank, h_blank, 1, h_blank); - vblank_def = mode->vts_def - mode->height / 2; - __v4l2_ctrl_modify_range(ox03c10->vblank, 46, - mode->height, + vblank_def = mode->vts_def - mode->height; + __v4l2_ctrl_modify_range(ox03c10->vblank, vblank_def, + OX03C10_VTS_MAX - ox03c10->cur_mode->height, 1, vblank_def); } @@ -4182,9 +5259,6 @@ static int ox03c10_enum_frame_sizes(struct v4l2_subdev *sd, if (fse->index >= ARRAY_SIZE(supported_modes)) return -EINVAL; - if (fse->code != MEDIA_BUS_FMT_SBGGR12_1X12) - return -EINVAL; - fse->min_width = supported_modes[fse->index].width; fse->max_width = supported_modes[fse->index].width; fse->max_height = supported_modes[fse->index].height; @@ -4581,7 +5655,7 @@ static int ox03c10_select_exp_mode(struct ox03c10 *ox03c10, u32 exp_mode) supported_modes[i].exp_mode == exp_mode) { ox03c10->cur_mode = &supported_modes[i]; w = ox03c10->cur_mode->hts_def - ox03c10->cur_mode->width; - h = ox03c10->cur_mode->vts_def - ox03c10->cur_mode->height / 2; + h = ox03c10->cur_mode->vts_def - ox03c10->cur_mode->height; __v4l2_ctrl_modify_range(ox03c10->hblank, w, w, 1, w); __v4l2_ctrl_modify_range(ox03c10->vblank, h, OX03C10_VTS_MAX - ox03c10->cur_mode->height, 1, h); @@ -4637,7 +5711,7 @@ static long ox03c10_ioctl(struct v4l2_subdev *sd, unsigned int cmd, void *arg) ret = -EINVAL; } else { w = ox03c10->cur_mode->hts_def - ox03c10->cur_mode->width; - h = ox03c10->cur_mode->vts_def - ox03c10->cur_mode->height / 2; + h = ox03c10->cur_mode->vts_def - ox03c10->cur_mode->height; __v4l2_ctrl_modify_range(ox03c10->hblank, w, w, 1, w); __v4l2_ctrl_modify_range(ox03c10->vblank, h, OX03C10_VTS_MAX - ox03c10->cur_mode->height, 1, h); @@ -5169,7 +6243,7 @@ static int ox03c10_set_ctrl(struct v4l2_ctrl *ctrl) switch (ctrl->id) { case V4L2_CID_VBLANK: /* Update max exposure while meeting expected vblanking */ - exposure_max = ox03c10->cur_mode->height + ctrl->val - 12; + exposure_max = (ox03c10->cur_mode->height + ctrl->val) / 2 - 12; __v4l2_ctrl_modify_range(ox03c10->exposure, ox03c10->exposure->minimum, exposure_max, ox03c10->exposure->step, @@ -5211,14 +6285,14 @@ static int ox03c10_set_ctrl(struct v4l2_ctrl *ctrl) OX03C10_REG_VALUE_08BIT, OX03C10_GROUP1_UPDATE_START_DATA); - // hcg real gain + // lcg real gain ret |= ox03c10_write_reg(ox03c10->client, - OX03C10_REG_AGAIN_HCG_H, + OX03C10_REG_AGAIN_LCG_H, OX03C10_REG_VALUE_16BIT, (again << 4) & 0xff0); - // hcg digital gain + // lcg digital gain ret |= ox03c10_write_reg(ox03c10->client, - OX03C10_REG_DGAIN_HCG_H, + OX03C10_REG_DGAIN_LCG_H, OX03C10_REG_VALUE_24BIT, (dgain << 6) & 0xfffc0); @@ -5323,7 +6397,7 @@ static int ox03c10_initialize_controls(struct ox03c10 *ox03c10) OX03C10_VTS_MAX, 1, vblank_def); - exposure_max = mode->vts_def - 12; + exposure_max = mode->vts_def / 2 - 12; ox03c10->exposure = v4l2_ctrl_new_std(handler, &ox03c10_ctrl_ops, V4L2_CID_EXPOSURE, OX03C10_EXPOSURE_HCG_MIN, exposure_max, OX03C10_EXPOSURE_HCG_STEP, From a5aa772ab68a63e51050af7d9a16cc9325bb237d Mon Sep 17 00:00:00 2001 From: Zefa Chen Date: Mon, 26 May 2025 18:12:55 +0800 Subject: [PATCH 10/18] media: i2c: ox03c10 modify gain range Change-Id: I2892302a808573cf720f9e698c4d9ae61c5873de Signed-off-by: Zefa Chen --- drivers/media/i2c/ox03c10.c | 98 ++++++++++++++++++++++++++++++------- 1 file changed, 80 insertions(+), 18 deletions(-) diff --git a/drivers/media/i2c/ox03c10.c b/drivers/media/i2c/ox03c10.c index 18833906a28e..9c3984fd1c20 100644 --- a/drivers/media/i2c/ox03c10.c +++ b/drivers/media/i2c/ox03c10.c @@ -5339,21 +5339,63 @@ static int ox03c10_set_hdrae(struct ox03c10 *ox03c10, l_exp = 4; if (s_exp < 1) s_exp = 1; - if (s_exp > 35) + if (s_exp > 35 && ox03c10->cur_mode->exp_mode == EXP_HDR3_DCG_VS) s_exp = 35; - if (l_again > 248) { - l_dgain = l_again * 1024 / 248; + if (l_again < 16) { + l_again = 16; + } else if (l_again <= 31) { + } else if (l_again <= 47) { + l_again = (l_again - 16) << 1; + } else if (l_again <= 63) { + l_again = (l_again - 32) << 2; + } else if (l_again <= 95) { + l_again = (l_again - 48) << 3; + } else if (l_again >= 248) { + l_dgain = div_u64(l_again * 1024, 248); l_again = 248; + } else { + dev_err(&ox03c10->client->dev, "%s set l_gain val:0x%x not support", + __func__, l_again); + return -EINVAL; } - if (m_again > 248) { - m_dgain = m_again * 1024 / 248; + if (m_again < 16) { + m_again = 16; + } else if (m_again <= 31) { + } else if (m_again <= 47) { + m_again = (m_again - 16) << 1; + } else if (m_again <= 63) { + m_again = (m_again - 32) << 2; + } else if (m_again <= 95) { + m_again = (m_again - 48) << 3; + } else if (m_again >= 248) { + m_dgain = div_u64(m_again * 1024, 248); m_again = 248; + } else { + dev_err(&ox03c10->client->dev, "%s set m_gain val:0x%x not support", + __func__, m_again); + return -EINVAL; } - if (s_again > 248) { - s_dgain = s_again * 1024 / 248; + if (s_again < 16) { + s_again = 16; + } else if (s_again <= 31) { + } else if (s_again <= 47) { + s_again = (s_again - 16) << 1; + } else if (s_again <= 63) { + s_again = (s_again - 32) << 2; + } else if (s_again <= 95) { + s_again = (s_again - 48) << 3; + } else if (s_again >= 248) { + s_dgain = div_u64(s_again * 1024, 248); s_again = 248; + } else { + dev_err(&ox03c10->client->dev, "%s set s_gain val:0x%x not support", + __func__, s_again); + return -EINVAL; } + dev_dbg(&ox03c10->client->dev, + "l_again 0x%x l_dgain 0x%x, m_again 0x%x m_dgain 0x%x, s_again 0x%x s_dgain 0x%x\n", + l_again, l_dgain, m_again, m_dgain, s_again, s_dgain); ret |= ox03c10_write_reg(ox03c10->client, OX03C10_GROUP_UPDATE_ADDRESS, OX03C10_REG_VALUE_08BIT, OX03C10_GROUP_UPDATE_START_DATA); @@ -5378,7 +5420,7 @@ static int ox03c10_set_hdrae(struct ox03c10 *ox03c10, ret |= ox03c10_write_reg(ox03c10->client, OX03C10_REG_DGAIN_HCG_M, OX03C10_REG_VALUE_08BIT, - (l_dgain >> 8) & 0xff); + (l_dgain >> 2) & 0xff); ret |= ox03c10_write_reg(ox03c10->client, OX03C10_REG_DGAIN_HCG_L, OX03C10_REG_VALUE_08BIT, @@ -5400,7 +5442,7 @@ static int ox03c10_set_hdrae(struct ox03c10 *ox03c10, ret |= ox03c10_write_reg(ox03c10->client, OX03C10_REG_DGAIN_LCG_M, OX03C10_REG_VALUE_08BIT, - (m_dgain >> 8) & 0xff); + (m_dgain >> 2) & 0xff); ret |= ox03c10_write_reg(ox03c10->client, OX03C10_REG_DGAIN_LCG_L, OX03C10_REG_VALUE_08BIT, @@ -5428,7 +5470,7 @@ static int ox03c10_set_hdrae(struct ox03c10 *ox03c10, ret |= ox03c10_write_reg(ox03c10->client, OX03C10_REG_DGAIN_VS_M, OX03C10_REG_VALUE_08BIT, - (s_dgain >> 8) & 0xff); + (s_dgain >> 2) & 0xff); ret |= ox03c10_write_reg(ox03c10->client, OX03C10_REG_DGAIN_VS_L, OX03C10_REG_VALUE_08BIT, @@ -5455,7 +5497,7 @@ static int ox03c10_set_hdrae(struct ox03c10 *ox03c10, ret |= ox03c10_write_reg(ox03c10->client, OX03C10_REG_DGAIN_SPD_M, OX03C10_REG_VALUE_08BIT, - (s_dgain >> 8) & 0xff); + (s_dgain >> 2) & 0xff); ret |= ox03c10_write_reg(ox03c10->client, OX03C10_REG_DGAIN_SPD_L, OX03C10_REG_VALUE_08BIT, @@ -5491,8 +5533,8 @@ static int ox03c10_get_dcg_and_spd_ratio(struct ox03c10 *ox03c10) dev_err(dev, "get dcg ratio fail, ret %d, dcg ratio %d, %d\n", ret, ox03c10->dcg_ratio.integer, ox03c10->dcg_ratio.decimal); else - dev_info(dev, "get dcg ratio reg val %d, %d\n", - ox03c10->dcg_ratio.integer, ox03c10->dcg_ratio.decimal); + dev_info(dev, "get dcg ratio reg val integer %d, dec 0x%x, div 0x%x\n", + ox03c10->dcg_ratio.integer, ox03c10->dcg_ratio.decimal, ox03c10->dcg_ratio.div_coeff); ox03c10->spd_ratio.integer = 0; ox03c10->spd_ratio.decimal = val & 0x1ffff; @@ -5503,8 +5545,8 @@ static int ox03c10_get_dcg_and_spd_ratio(struct ox03c10 *ox03c10) dev_err(dev, "get spd ratio fail, ret %d, spd ratio %d, %d\n", ret, ox03c10->spd_ratio.integer, ox03c10->spd_ratio.decimal); else - dev_info(dev, "get spd ratio reg val %d, %d\n", - ox03c10->spd_ratio.integer, ox03c10->spd_ratio.decimal); + dev_info(dev, "get spd ratio reg val integer %d, dec 0x%x div 0x%x\n", + ox03c10->spd_ratio.integer, ox03c10->spd_ratio.decimal, ox03c10->spd_ratio.div_coeff); ox03c10_write_reg(ox03c10->client, OX03C10_REG_CTRL_MODE, OX03C10_REG_VALUE_08BIT, OX03C10_MODE_SW_STANDBY); @@ -6275,11 +6317,31 @@ static int ox03c10_set_ctrl(struct v4l2_ctrl *ctrl) case V4L2_CID_ANALOGUE_GAIN: if (ox03c10->cur_mode->hdr_mode != NO_HDR) break; + /* + *[1, 1.9375, 16, 0, 1, 16, 31, + * 2, 3.875, 8, -16, 1, 32, 47, + * 4, 7.75, 4, -32, 1, 48, 63, + * 8, 15.5, 2,-48, 1, 64, 95, + * 15.5, 247.9375, 16, 0, 1, 248, 3967] + */ // hcg real gain - again = ctrl->val; - if (again > 248) { - dgain = again * 1024 / 248; + if (ctrl->val < 16) { + again = 16; + } else if (ctrl->val <= 31) { + again = ctrl->val; + } else if (ctrl->val <= 47) { + again = (ctrl->val - 16) << 1; + } else if (ctrl->val <= 63) { + again = (ctrl->val - 32) << 2; + } else if (ctrl->val <= 95) { + again = (ctrl->val - 48) << 3; + } else if (ctrl->val >= 248) { + dgain = div_u64(ctrl->val * 1024, 248); again = 248; + } else { + dev_err(&client->dev, "%s set gain val:0x%x not support", + __func__, ctrl->val); + break; } ret |= ox03c10_write_reg(ox03c10->client, OX03C10_GROUP_UPDATE_ADDRESS, OX03C10_REG_VALUE_08BIT, From 46cc26e4fc4820b01ba2404106402bf860a2e28e Mon Sep 17 00:00:00 2001 From: Zefa Chen Date: Tue, 27 May 2025 11:06:23 +0800 Subject: [PATCH 11/18] include: uapi: rk-camera-module.h add RKMODULE_GET_WB_GAIN_INFO/RKMODULE_GET_BLC_INFO Change-Id: Ib82ea1b0225ace149c984eece9d4b8dc525ab875 Signed-off-by: Zefa Chen --- include/uapi/linux/rk-camera-module.h | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) diff --git a/include/uapi/linux/rk-camera-module.h b/include/uapi/linux/rk-camera-module.h index dd44f8afdfd8..cd0f956eb29c 100644 --- a/include/uapi/linux/rk-camera-module.h +++ b/include/uapi/linux/rk-camera-module.h @@ -222,6 +222,12 @@ #define RKMODULE_GET_BAYER_MODE \ _IOR('V', BASE_VIDIOC_PRIVATE + 52, __u32) +#define RKMODULE_GET_WB_GAIN_INFO \ + _IOR('V', BASE_VIDIOC_PRIVATE + 53, struct rkmodule_wb_gain_info) + +#define RKMODULE_GET_BLC_INFO \ + _IOR('V', BASE_VIDIOC_PRIVATE + 54, struct rkmodule_blc_info) + struct rkmodule_i2cdev_info { __u8 slave_addr; } __attribute__ ((packed)); @@ -964,4 +970,15 @@ enum rkmodule_bayer_mode { RKMODULE_QUARD_BAYER, }; +struct rkmodule_wb_gain_info { + __u32 coarse_bit; + __u32 fine_bit; + __u32 reserved[8]; +}; + +struct rkmodule_blc_info { + __u32 bit_width; + __u32 reserved[8]; +}; + #endif /* _UAPI_RKMODULE_CAMERA_H */ From bb803da76bacf7788453af4e878cc49b4da0f97e Mon Sep 17 00:00:00 2001 From: Zefa Chen Date: Tue, 27 May 2025 11:59:41 +0800 Subject: [PATCH 12/18] media: i2c: ox03c10 support get wbgain/blc info Change-Id: I020ee7e162d963f10c357be7e1844fbec5660d55 Signed-off-by: Zefa Chen --- drivers/media/i2c/ox03c10.c | 46 +++++++++++++++++++++++++++++++++++++ 1 file changed, 46 insertions(+) diff --git a/drivers/media/i2c/ox03c10.c b/drivers/media/i2c/ox03c10.c index 9c3984fd1c20..07713efd7f9b 100644 --- a/drivers/media/i2c/ox03c10.c +++ b/drivers/media/i2c/ox03c10.c @@ -5341,6 +5341,7 @@ static int ox03c10_set_hdrae(struct ox03c10 *ox03c10, s_exp = 1; if (s_exp > 35 && ox03c10->cur_mode->exp_mode == EXP_HDR3_DCG_VS) s_exp = 35; + if (l_again < 16) { l_again = 16; } else if (l_again <= 31) { @@ -5720,6 +5721,8 @@ static long ox03c10_ioctl(struct v4l2_subdev *sd, unsigned int cmd, void *arg) long ret = 0; u32 stream = 0; u32 *exp_mode; + struct rkmodule_wb_gain_info *wb_gain_info; + struct rkmodule_blc_info *blc_info; switch (cmd) { case RKMODULE_GET_MODULE_INFO: @@ -5800,6 +5803,15 @@ static long ox03c10_ioctl(struct v4l2_subdev *sd, unsigned int cmd, void *arg) case RKMODULE_SET_EXP_MODE: ret = ox03c10_select_exp_mode(ox03c10, *(u32 *)arg); break; + case RKMODULE_GET_WB_GAIN_INFO: + wb_gain_info = (struct rkmodule_wb_gain_info *)arg; + wb_gain_info->coarse_bit = 5; + wb_gain_info->fine_bit = 10; + break; + case RKMODULE_GET_BLC_INFO: + blc_info = (struct rkmodule_blc_info *)arg; + blc_info->bit_width = 10; + break; default: ret = -ENOIOCTLCMD; break; @@ -5824,6 +5836,8 @@ static long ox03c10_compat_ioctl32(struct v4l2_subdev *sd, long ret; u32 stream = 0; u32 exp_mode; + struct rkmodule_wb_gain_info *wb_gain_info; + struct rkmodule_blc_info *blc_info; switch (cmd) { case RKMODULE_GET_MODULE_INFO: @@ -5993,6 +6007,38 @@ static long ox03c10_compat_ioctl32(struct v4l2_subdev *sd, return -EFAULT; ret = ox03c10_ioctl(sd, cmd, &exp_mode); break; + case RKMODULE_GET_WB_GAIN_INFO: + wb_gain_info = kzalloc(sizeof(*wb_gain_info), GFP_KERNEL); + if (!wb_gain_info) { + ret = -ENOMEM; + return ret; + } + + ret = ox03c10_ioctl(sd, cmd, wb_gain_info); + if (!ret) { + if (copy_to_user(up, wb_gain_info, sizeof(*wb_gain_info))) { + kfree(wb_gain_info); + return -EFAULT; + } + } + kfree(wb_gain_info); + break; + case RKMODULE_GET_BLC_INFO: + blc_info = kzalloc(sizeof(*blc_info), GFP_KERNEL); + if (!blc_info) { + ret = -ENOMEM; + return ret; + } + + ret = ox03c10_ioctl(sd, cmd, blc_info); + if (!ret) { + if (copy_to_user(up, blc_info, sizeof(*blc_info))) { + kfree(blc_info); + return -EFAULT; + } + } + kfree(blc_info); + break; default: ret = -ENOIOCTLCMD; break; From ff534bafc9e3696bc55a5021200a810b54c0b8f9 Mon Sep 17 00:00:00 2001 From: Zefa Chen Date: Thu, 19 Jun 2025 11:24:51 +0800 Subject: [PATCH 13/18] media: i2c: ox03c10 support record wbgain before streaming Change-Id: I564a33db0c8999f662ba9b6bc09f92ac550e77dc Signed-off-by: Zefa Chen --- drivers/media/i2c/ox03c10.c | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) diff --git a/drivers/media/i2c/ox03c10.c b/drivers/media/i2c/ox03c10.c index 07713efd7f9b..1f1582ef7168 100644 --- a/drivers/media/i2c/ox03c10.c +++ b/drivers/media/i2c/ox03c10.c @@ -224,7 +224,9 @@ struct ox03c10 { const char *module_name; const char *len_name; bool has_init_exp; + bool has_init_wbgain; struct preisp_hdrae_exp_s init_hdrae_exp; + struct rkmodule_wb_gain_group init_wbgain; struct rkmodule_dcg_ratio dcg_ratio; struct rkmodule_dcg_ratio spd_ratio; }; @@ -5565,6 +5567,12 @@ static int ox03c10_set_wb_gain(struct ox03c10 *ox03c10, u32 bgain, gbgain, grgain, rgain; #endif + if (!ox03c10->has_init_wbgain && !ox03c10->streaming) { + ox03c10->init_wbgain = *wb_gain_group; + ox03c10->has_init_wbgain = true; + dev_dbg(&ox03c10->client->dev, "ox03c10 don't stream, record wbgain!\n"); + return ret; + } for (i = 0; i < wb_gain_group->group_num; i++) { switch (wb_gain_group->wb_gain_type[i]) { case RKMODULE_HCG_WB_GAIN: @@ -6070,6 +6078,16 @@ static int __ox03c10_start_stream(struct ox03c10 *ox03c10) return ret; } } + if (ox03c10->has_init_wbgain) { + ret = ox03c10_ioctl(&ox03c10->subdev, + RKMODULE_SET_WB_GAIN, + &ox03c10->init_wbgain); + if (ret) { + dev_err(&ox03c10->client->dev, + "init wbgain fail\n"); + return ret; + } + } return ox03c10_write_reg(ox03c10->client, OX03C10_REG_CTRL_MODE, OX03C10_REG_VALUE_08BIT, OX03C10_MODE_STREAMING); @@ -6078,6 +6096,7 @@ static int __ox03c10_start_stream(struct ox03c10 *ox03c10) static int __ox03c10_stop_stream(struct ox03c10 *ox03c10) { ox03c10->has_init_exp = false; + ox03c10->has_init_wbgain = false; return ox03c10_write_reg(ox03c10->client, OX03C10_REG_CTRL_MODE, OX03C10_REG_VALUE_08BIT, OX03C10_MODE_SW_STANDBY); } @@ -6534,6 +6553,7 @@ static int ox03c10_initialize_controls(struct ox03c10 *ox03c10) ox03c10->subdev.ctrl_handler = handler; ox03c10->has_init_exp = false; + ox03c10->has_init_wbgain = false; return 0; From 1f80fbfaaf16ecc200f5286995d6f3321eb1961b Mon Sep 17 00:00:00 2001 From: Zefa Chen Date: Thu, 19 Jun 2025 14:19:58 +0800 Subject: [PATCH 14/18] include: uapi: rk-camera-module.h add RKMODULE_SET_CMPS_MODE Change-Id: I73e5af5fda20a19ccb77748fb2468d73f3cc2f3b Signed-off-by: Zefa Chen --- include/uapi/linux/rk-camera-module.h | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/include/uapi/linux/rk-camera-module.h b/include/uapi/linux/rk-camera-module.h index cd0f956eb29c..32f72f09314a 100644 --- a/include/uapi/linux/rk-camera-module.h +++ b/include/uapi/linux/rk-camera-module.h @@ -228,6 +228,9 @@ #define RKMODULE_GET_BLC_INFO \ _IOR('V', BASE_VIDIOC_PRIVATE + 54, struct rkmodule_blc_info) +#define RKMODULE_SET_CMPS_MODE \ + _IOW('V', BASE_VIDIOC_PRIVATE + 55, __u32) + struct rkmodule_i2cdev_info { __u8 slave_addr; } __attribute__ ((packed)); @@ -981,4 +984,9 @@ struct rkmodule_blc_info { __u32 reserved[8]; }; +enum rkmodule_cmps_mode { + CMPS_LOW_BIT_WIDTH_MODE, + CMPS_HIGH_BIT_WIDTH_MODE, +}; + #endif /* _UAPI_RKMODULE_CAMERA_H */ From d2b4477a1df699e6639e83837c7dc45ea1d1d73f Mon Sep 17 00:00:00 2001 From: Zefa Chen Date: Thu, 19 Jun 2025 14:40:44 +0800 Subject: [PATCH 15/18] media: i2c: ox03c10 support set cmps mode Change-Id: Ic8833240c4ec25d6e8483c2421e6b3a99dbcac9b Signed-off-by: Zefa Chen --- drivers/media/i2c/ox03c10.c | 56 +++++++++++++++++++++++++++++++++++++ 1 file changed, 56 insertions(+) diff --git a/drivers/media/i2c/ox03c10.c b/drivers/media/i2c/ox03c10.c index 1f1582ef7168..22068f144e43 100644 --- a/drivers/media/i2c/ox03c10.c +++ b/drivers/media/i2c/ox03c10.c @@ -5717,6 +5717,53 @@ static int ox03c10_select_exp_mode(struct ox03c10 *ox03c10, u32 exp_mode) return ret; } +static int ox03c10_select_cmps_mode(struct ox03c10 *ox03c10, u32 cmps_mode) +{ + int ret = -EINVAL; + u32 i, h, w, hdr_mode, exp_mode; + int best_fit = -1; + int bit_width = 0; + + w = ox03c10->cur_mode->width; + h = ox03c10->cur_mode->height; + hdr_mode = ox03c10->cur_mode->hdr_mode; + exp_mode = ox03c10->cur_mode->exp_mode; + for (i = 0; i < ARRAY_SIZE(supported_modes); i++) { + if (w == supported_modes[i].width && + h == supported_modes[i].height && + supported_modes[i].hdr_mode == hdr_mode && + supported_modes[i].exp_mode == exp_mode) { + if (cmps_mode == CMPS_LOW_BIT_WIDTH_MODE) { + if (bit_width == 0) { + bit_width = supported_modes[i].bpp; + best_fit = i; + } else if (supported_modes[i].bpp < bit_width) { + bit_width = supported_modes[i].bpp; + best_fit = i; + } + } else { + if (bit_width == 0) { + bit_width = supported_modes[i].bpp; + best_fit = i; + } else if (supported_modes[i].bpp > bit_width) { + bit_width = supported_modes[i].bpp; + best_fit = i; + } + } + } + } + if (best_fit >= 0) { + ox03c10->cur_mode = &supported_modes[i]; + w = ox03c10->cur_mode->hts_def - ox03c10->cur_mode->width; + h = ox03c10->cur_mode->vts_def - ox03c10->cur_mode->height; + __v4l2_ctrl_modify_range(ox03c10->hblank, w, w, 1, w); + __v4l2_ctrl_modify_range(ox03c10->vblank, h, + OX03C10_VTS_MAX - ox03c10->cur_mode->height, 1, h); + ret = 0; + } + return ret; +} + static long ox03c10_ioctl(struct v4l2_subdev *sd, unsigned int cmd, void *arg) { struct ox03c10 *ox03c10 = to_ox03c10(sd); @@ -5820,6 +5867,9 @@ static long ox03c10_ioctl(struct v4l2_subdev *sd, unsigned int cmd, void *arg) blc_info = (struct rkmodule_blc_info *)arg; blc_info->bit_width = 10; break; + case RKMODULE_SET_CMPS_MODE: + ret = ox03c10_select_cmps_mode(ox03c10, *(u32 *)arg); + break; default: ret = -ENOIOCTLCMD; break; @@ -5846,6 +5896,7 @@ static long ox03c10_compat_ioctl32(struct v4l2_subdev *sd, u32 exp_mode; struct rkmodule_wb_gain_info *wb_gain_info; struct rkmodule_blc_info *blc_info; + u32 cmps_mode; switch (cmd) { case RKMODULE_GET_MODULE_INFO: @@ -6047,6 +6098,11 @@ static long ox03c10_compat_ioctl32(struct v4l2_subdev *sd, } kfree(blc_info); break; + case RKMODULE_SET_CMPS_MODE: + if (copy_from_user(&cmps_mode, up, sizeof(u32))) + return -EFAULT; + ret = ox03c10_ioctl(sd, cmd, &cmps_mode); + break; default: ret = -ENOIOCTLCMD; break; From 83f72daaaed9d0e58d68b69961cac5cc85ea8bca Mon Sep 17 00:00:00 2001 From: Zefa Chen Date: Fri, 20 Jun 2025 15:34:43 +0800 Subject: [PATCH 16/18] media: rockchip: vicap fixes sof not increase after loss frame Change-Id: I0f7f90fd6206b414ff5c24a6ffd282606498e527 Signed-off-by: Zefa Chen --- drivers/media/platform/rockchip/cif/capture.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/media/platform/rockchip/cif/capture.c b/drivers/media/platform/rockchip/cif/capture.c index d0a360bed40e..f7168e5e87db 100644 --- a/drivers/media/platform/rockchip/cif/capture.c +++ b/drivers/media/platform/rockchip/cif/capture.c @@ -13946,7 +13946,8 @@ static void rkcif_deal_sof(struct rkcif_device *cif_dev) detect_stream->fs_cnt_in_single_frame++; if ((!cif_dev->sditf[0] || cif_dev->sditf[0]->mode.rdbk_mode >= RKISP_VICAP_RDBK_AIQ) && - detect_stream->fs_cnt_in_single_frame > 1) + detect_stream->fs_cnt_in_single_frame > 1 && + cif_dev->chip_id < CHIP_RK3588_CIF) return; spin_lock_irqsave(&detect_stream->fps_lock, flags); From 26c623e2097f55e0d7d760e40c4c20ad5a4ab787 Mon Sep 17 00:00:00 2001 From: William Wu Date: Fri, 20 Jun 2025 18:13:44 +0800 Subject: [PATCH 17/18] arm64: dts: rockchip: rv1126bp: Add usb2 drd node Change-Id: I865ad093bed2fba3c73ff9d317ef18bc862bc8bd Signed-off-by: William Wu --- arch/arm64/boot/dts/rockchip/rv1126bp.dtsi | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rv1126bp.dtsi b/arch/arm64/boot/dts/rockchip/rv1126bp.dtsi index f4e57e04e3d8..33ff56800815 100644 --- a/arch/arm64/boot/dts/rockchip/rv1126bp.dtsi +++ b/arch/arm64/boot/dts/rockchip/rv1126bp.dtsi @@ -7,3 +7,12 @@ / { }; + +&usb_drd_dwc3 { + phys = <&usb2phy_otg>; + phy-names = "usb2-phy"; + maximum-speed = "high-speed"; + snps,dis_u2_susphy_quirk; + snps,usb2-lpm-disable; + snps,usb2-gadget-lpm-disable; +}; From e57205222fd61a41a8c45da3e43083d4f55756ee Mon Sep 17 00:00:00 2001 From: Zefa Chen Date: Wed, 16 Apr 2025 14:18:00 +0800 Subject: [PATCH 18/18] media: rockchip: vicap used yuv packet fmt to capture rgb888 Change-Id: I9b089434aa8c69e80dfa6fa8e43c574c4288989b Signed-off-by: Zefa Chen --- drivers/media/platform/rockchip/cif/capture.c | 18 ++++++++++++------ 1 file changed, 12 insertions(+), 6 deletions(-) diff --git a/drivers/media/platform/rockchip/cif/capture.c b/drivers/media/platform/rockchip/cif/capture.c index f7168e5e87db..86036783021b 100644 --- a/drivers/media/platform/rockchip/cif/capture.c +++ b/drivers/media/platform/rockchip/cif/capture.c @@ -3953,9 +3953,10 @@ static unsigned char get_csi_fmt_val(struct rkcif_stream *stream, csi_fmt_val = CSI_WRDDR_TYPE_RAW12; break; } - } else if (cif_fmt_in->csi_fmt_val == CSI_WRDDR_TYPE_RGB565 || - (stream->cifdev->chip_id < CHIP_RK3576_CIF && - cif_fmt_in->csi_fmt_val == CSI_WRDDR_TYPE_RGB888)) { + } else if (stream->cifdev->chip_id < CHIP_RK3576_CIF && + cif_fmt_in->csi_fmt_val == CSI_WRDDR_TYPE_RGB888) { + csi_fmt_val = CSI_WRDDR_TYPE_YUV422; + } else if (cif_fmt_in->csi_fmt_val == CSI_WRDDR_TYPE_RGB565) { csi_fmt_val = CSI_WRDDR_TYPE_RAW8; } else { csi_fmt_val = cif_fmt_in->csi_fmt_val; @@ -3985,7 +3986,7 @@ static int rkcif_csi_channel_init(struct rkcif_stream *stream, channel->crop_en = 1; if (channel->fmt_val == CSI_WRDDR_TYPE_RGB888 && dev->chip_id < CHIP_RK3576_CIF) - channel->crop_st_x = 3 * stream->crop[CROP_SRC_ACT].left; + channel->crop_st_x = 3 * stream->crop[CROP_SRC_ACT].left / 2; else if (channel->fmt_val == CSI_WRDDR_TYPE_RGB565) channel->crop_st_x = 2 * stream->crop[CROP_SRC_ACT].left; else @@ -4056,6 +4057,9 @@ static int rkcif_csi_channel_init(struct rkcif_stream *stream, if ((channel->fmt_val == CSI_WRDDR_TYPE_RGB888 && dev->chip_id < CHIP_RK3576_CIF) || channel->fmt_val == CSI_WRDDR_TYPE_RGB565) channel->width = channel->width * fmt->bpp[0] / 8; + + if (channel->fmt_val == CSI_WRDDR_TYPE_RGB888) + channel->width /= 2; /* * rk cif don't support output yuyv fmt data * if user request yuyv fmt, the input mode must be RAW8 @@ -4372,6 +4376,8 @@ static int rkcif_csi_get_output_type_mask(struct rkcif_stream *stream) break; case V4L2_PIX_FMT_RGB24: case V4L2_PIX_FMT_BGR24: + mask = CSI_WRDDR_TYPE_YUV_PACKET | CSI_YUV_OUTPUT_ORDER_UYVY; + break; case V4L2_PIX_FMT_RGB565: case V4L2_PIX_FMT_BGR666: mask = CSI_WRDDR_TYPE_RAW_COMPACT; @@ -4974,7 +4980,7 @@ static int rkcif_csi_channel_set_v1(struct rkcif_stream *stream, channel->vc << 8 | channel->data_type << 10; if (dev->chip_id >= CHIP_RK3588_CIF) { if (channel->csi_fmt_val == CSI_WRDDR_TYPE_RGB888) - val |= CSI_WRDDR_TYPE_RAW8; + val |= CSI_WRDDR_TYPE_YUV422; else if (channel->csi_fmt_val == CSI_WRDDR_TYPE_RAW14_RK3588) val |= channel->csi_fmt_val << 1; else @@ -11213,7 +11219,7 @@ static void rkcif_dynamic_crop(struct rkcif_stream *stream) struct csi_channel_info *channel = &cif_dev->channels[stream->id]; if (channel->fmt_val == CSI_WRDDR_TYPE_RGB888) - crop_x = 3 * stream->crop[CROP_SRC_ACT].left; + crop_x = 3 * stream->crop[CROP_SRC_ACT].left / 2; else if (channel->fmt_val == CSI_WRDDR_TYPE_RGB565) crop_x = 2 * stream->crop[CROP_SRC_ACT].left; else