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media: rockchip: vpss: offline support rkfbcd input
Signed-off-by: Mingwei Yan <mingwei.yan@rock-chips.com> Change-Id: Id537c4426f1251c620d2a5795728c44d0aa6f70b
This commit is contained in:
@@ -1142,6 +1142,8 @@
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#define RKVPSS_MI_RD_BURST4_LEN 0
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#define RKVPSS_MI_RD_BURST8_LEN BIT(20)
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#define RKVPSS_MI_RD_BURST16_LEN (BIT(20) | BIT(21))
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#define RKVPSS_MI_RD_FBCD_YUV444_EN BIT(26)
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#define RKVPSS_MI_RD_FBCD_OPT_DIS BIT(27)
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#define RKVPSS_MI_RD_R2Y_BYPASS BIT(28)
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#define RKVPSS_MI_RD_OLD BIT(30)
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#define RKVPSS_MI_RD_NEW_BURST_DIS BIT(31)
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@@ -9,6 +9,7 @@
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#include <media/videobuf2-v4l2.h>
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#include <linux/pm_runtime.h>
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#include <linux/rk-vpss-config.h>
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#include <linux/rk-video-format.h>
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#include "dev.h"
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#include "hw.h"
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@@ -642,6 +643,27 @@ static int rkvpss_ofl_run(struct file *file, struct rkvpss_frame_cfg *cfg)
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in_size = cfg->input.stride * cfg->input.height;
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in_ctrl |= RKVPSS_MI_RD_INPUT_ABGR888 | RKVPSS_MI_RD_RB_SWAP;
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break;
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case V4L2_PIX_FMT_FBC0:
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if (cfg->input.stride < ALIGN(cfg->input.width, 16))
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cfg->input.stride = ALIGN(cfg->input.width, 16);
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in_c_offs = 0;
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in_size = cfg->input.stride * cfg->input.height * 3 / 2;
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in_ctrl |= RKVPSS_MI_RD_INPUT_420SP;
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break;
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case V4L2_PIX_FMT_FBC2:
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if (cfg->input.stride < ALIGN(cfg->input.width, 16))
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cfg->input.stride = ALIGN(cfg->input.width, 16);
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in_c_offs = 0;
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in_size = cfg->input.stride * cfg->input.height * 2;
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in_ctrl |= RKVPSS_MI_RD_INPUT_422SP;
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break;
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case V4L2_PIX_FMT_FBC4:
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if (cfg->input.stride < ALIGN(cfg->input.width, 16))
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cfg->input.stride = ALIGN(cfg->input.width, 16);
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in_c_offs = 0;
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in_size = cfg->input.stride * cfg->input.height * 3;
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in_ctrl |= RKVPSS_MI_RD_INPUT_422SP | RKVPSS_MI_RD_FBCD_YUV444_EN;
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break;
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default:
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v4l2_err(&ofl->v4l2_dev, "dev_id:%d no support input format:%c%c%c%c\n",
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cfg->dev_id, cfg->input.format, cfg->input.format >> 8,
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@@ -784,8 +806,16 @@ static int rkvpss_ofl_run(struct file *file, struct rkvpss_frame_cfg *cfg)
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rkvpss_hw_write(hw, RKVPSS_MI_RD_Y_WIDTH, val);
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val = cfg->input.height;
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rkvpss_hw_write(hw, RKVPSS_MI_RD_Y_HEIGHT, val);
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val = cfg->input.stride;
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rkvpss_hw_write(hw, RKVPSS_MI_RD_Y_STRIDE, val);
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if (cfg->input.format == V4L2_PIX_FMT_FBC0 ||
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cfg->input.format == V4L2_PIX_FMT_FBC2 ||
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cfg->input.format == V4L2_PIX_FMT_FBC4) {
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in_ctrl |= RKVPSS_MI_RD_MODE(2) | RKVPSS_MI_RD_FBCD_OPT_DIS;
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rkvpss_hw_write(hw, RKVPSS_MI_RD_Y_STRIDE, 0);
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} else {
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val = cfg->input.stride;
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rkvpss_hw_write(hw, RKVPSS_MI_RD_Y_STRIDE, val);
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}
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mask = RKVPSS_MI_RD_GROUP_MODE(3) | RKVPSS_MI_RD_BURST16_LEN;
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rkvpss_hw_set_bits(hw, RKVPSS_MI_RD_CTRL, ~mask, in_ctrl);
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@@ -16,6 +16,8 @@
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#define V4L2_PIX_FMT_FBC2 v4l2_fourcc('F', 'B', 'C', '2')
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/* Rockchip yuv420sp frame buffer compression encoder */
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#define V4L2_PIX_FMT_FBC0 v4l2_fourcc('F', 'B', 'C', '0')
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/* Rockchip yuv444p frame buffer compression encoder */
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#define V4L2_PIX_FMT_FBC4 v4l2_fourcc('F', 'B', 'C', '4')
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#define V4L2_PIX_FMT_FBCG v4l2_fourcc('F', 'B', 'C', 'G')
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/* embedded data 8-bit */
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#define V4l2_PIX_FMT_EBD8 v4l2_fourcc('E', 'B', 'D', '8')
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@@ -181,6 +181,7 @@ struct rkvpss_module_sel {
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* height: height of input image, range: 32~3504
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* stride: virtual width of input image, 16 align. auto calculate according to width and format if 0.
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* format: V4L2_PIX_FMT_NV12/V4L2_PIX_FMT_NV16/V4L2_PIX_FMT_RGB565/V4L2_PIX_FMT_RGB24/V4L2_PIX_FMT_XBGR32
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* V4L2_PIX_FMT_FBC0/V4L2_PIX_FMT_FBC2/V4L2_PIX_FMT_FBC4 for rkfbcd
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* buf_fd: dmabuf fd of input image buf
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*/
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struct rkvpss_input_cfg {
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