From 35b202eb29b2d3985221728d57dc82ca372ce2a0 Mon Sep 17 00:00:00 2001 From: Sugar Zhang Date: Mon, 20 Feb 2023 10:09:07 +0800 Subject: [PATCH] clk: rockchip: rk3562: Fix mclkin_saix clk name Should be explicit direction for mclkin, such as "mclk_sai0_from_io" instead of "mclk_sai0_io". Signed-off-by: Sugar Zhang Change-Id: I6a4a3ecad527c610cc1577faca169588545f0765 --- drivers/clk/rockchip/clk-rk3562.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/clk/rockchip/clk-rk3562.c b/drivers/clk/rockchip/clk-rk3562.c index d88791d4d529..582b213fa94a 100644 --- a/drivers/clk/rockchip/clk-rk3562.c +++ b/drivers/clk/rockchip/clk-rk3562.c @@ -169,11 +169,11 @@ PNAME(mux_125m_xin24m_p) = { "clk_matrix_125m_src", "xin24m" }; PNAME(mux_200m_xin24m_32k_p) = { "clk_200m_pmu", "xin24m", "clk_rtc_32k" }; PNAME(mux_200m_100m_p) = { "clk_matrix_200m_src", "clk_matrix_100m_src" }; PNAME(mux_200m_100m_50m_xin24m_p) = { "clk_matrix_200m_src", "clk_matrix_100m_src", "clk_matrix_50m_src", "xin24m" }; -PNAME(clk_sai0_p) = { "clk_sai0_src", "clk_sai0_frac", "xin_osc0_half", "mclk_sai0_io" }; +PNAME(clk_sai0_p) = { "clk_sai0_src", "clk_sai0_frac", "xin_osc0_half", "mclk_sai0_from_io" }; PNAME(mclk_sai0_out2io_p) = { "mclk_sai0", "xin_osc0_half" }; -PNAME(clk_sai1_p) = { "clk_sai1_src", "clk_sai1_frac", "xin_osc0_half", "mclk_sai1_io" }; +PNAME(clk_sai1_p) = { "clk_sai1_src", "clk_sai1_frac", "xin_osc0_half", "mclk_sai1_from_io" }; PNAME(mclk_sai1_out2io_p) = { "mclk_sai1", "xin_osc0_half" }; -PNAME(clk_sai2_p) = { "clk_sai2_src", "clk_sai2_frac", "xin_osc0_half", "mclk_sai2_io" }; +PNAME(clk_sai2_p) = { "clk_sai2_src", "clk_sai2_frac", "xin_osc0_half", "mclk_sai2_from_io" }; PNAME(mclk_sai2_out2io_p) = { "mclk_sai2", "xin_osc0_half" }; PNAME(clk_spdif_p) = { "clk_spdif_src", "clk_spdif_frac", "xin_osc0_half" }; PNAME(clk_uart1_p) = { "clk_uart1_src", "clk_uart1_frac", "xin24m" };