From 35dbd1aea50505f30950d120d8b7710c035da015 Mon Sep 17 00:00:00 2001 From: Frank Chen Date: Tue, 21 Mar 2017 16:53:00 +0800 Subject: [PATCH] dts: add p401 dts PD#138714: add p401 dts p401 is A112 development board with SLC Nand Change-Id: Ia4590b0c1995ffbd6c282f71a3d9db88b1912604 Signed-off-by: Frank Chen --- MAINTAINERS | 5 +- arch/arm64/boot/dts/amlogic/gxl_p401_2g.dts | 588 ++++++++++++++++++++ 2 files changed, 591 insertions(+), 2 deletions(-) create mode 100644 arch/arm64/boot/dts/amlogic/gxl_p401_2g.dts diff --git a/MAINTAINERS b/MAINTAINERS index c3c4b6af2a71..c05d1c6fd85e 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -13659,9 +13659,10 @@ F: drivers/amlogic/mmc/emmc_key.c F: drivers/amlogic/mmc/emmc_key.h F: include/linux/amlogic/key_manage.h -AMLOGIC P400 BSP -M: Nan Li +AMLOGIC P400/P401 BSP +M: Frank Chen F: arch/arm64/boot/dts/amlogic/gxl_p400_2g.dts +F: arch/arm64/boot/dts/amlogic/gxl_p401_2g.dts ANDROID LOGGER Driver M: Frank Chen diff --git a/arch/arm64/boot/dts/amlogic/gxl_p401_2g.dts b/arch/arm64/boot/dts/amlogic/gxl_p401_2g.dts new file mode 100644 index 000000000000..e8a1bfc235da --- /dev/null +++ b/arch/arm64/boot/dts/amlogic/gxl_p401_2g.dts @@ -0,0 +1,588 @@ +/* + * arch/arm64/boot/dts/amlogic/gxl_p401_2g.dts + * + * Copyright (C) 2017 Amlogic, Inc. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + */ + +/dts-v1/; + +#include +#include "mesongxl.dtsi" +/ { + model = "Amlogic"; + amlogic-dt-id = "gxl_p401_2g"; + compatible = "amlogic, Gxl"; + interrupt-parent = <&gic>; + #address-cells = <2>; + #size-cells = <2>; + + aliases { + serial0 = &uart_AO; + }; + + ion_dev { + compatible = "amlogic, ion_dev"; + memory-region = <&ion_reserved>; + }; + + memory@00000000 { + device_type = "memory"; + linux,usable-memory = <0x0 0x0100000 0x0 0x7ff00000>; + }; + + reserved-memory { + #address-cells = <2>; + #size-cells = <2>; + ranges; + /* global autoconfigured region for contiguous allocations */ + secmon_reserved:linux,secmon { + compatible = "amlogic, aml_secmon_memory"; + reg = <0x0 0x10000000 0x0 0x200000>; + no-map; + }; + secos_reserved:linux,secos { + status = "disable"; + compatible = "amlogic, aml_secos_memory"; + reg = <0x0 0x05300000 0x0 0x2000000>; + no-map; + }; + pstore:aml_pstore { + compatible = "amlogic, pstore"; + reg = <0x0 0x07300000 0x0 0x100000>; + no-map; + }; + fb_reserved:linux,meson-fb { + compatible = "amlogic, fb-memory"; + size = <0x0 0x2000000>; + no-map; + }; + + di_reserved:linux,di { + compatible = "amlogic, di-mem"; + size = <0x0 0x1e00000>; //10x1920x1088x3/2=30M + //no-map; + }; + + ion_reserved:linux,ion-dev { + compatible = "amlogic, idev-mem"; + size = <0x0 0x2000000>; + }; + + /* POST PROCESS MANAGER */ + ppmgr_reserved:linux,ppmgr { + compatible = "shared-dma-pool"; + size = <0x0 0x0>; + }; + + codec_mm_cma:linux,codec_mm_cma { + compatible = "shared-dma-pool"; + reusable; + size = <0x0 0xc000000>; + alignment = <0x0 0x400000>; + linux,contiguous-region; + }; + picdec_cma_reserved:linux,picdec { + compatible = "shared-dma-pool"; + reusable; + size = <0x0 0x0>; + alignment = <0x0 0x0>; + linux,contiguous-region; + }; + /* codec shared reserved */ + codec_mm_reserved:linux,codec_mm_reserved { + compatible = "amlogic, codec-mm-reserved"; + size = <0x0 0x4100000>; + alignment = <0x0 0x100000>; + //no-map; + }; + }; + + sd_emmc_c: emmc@d0074000 { + status = "okay"; + compatible = "amlogic, meson-aml-mmc"; + reg = <0x0 0xd0074000 0x0 0x2000>; + interrupts = <0 218 1>; + pinctrl-names = "emmc_clk_cmd_pins", "emmc_all_pins"; + pinctrl-0 = <&emmc_clk_cmd_pins>; + pinctrl-1 = <&emmc_conf_pull_up &emmc_conf_pull_done>; + clocks = <&clkc CLKID_SD_EMMC_C>, + <&clkc CLKID_SD_EMMC_C_P0_COMP>, + <&clkc CLKID_FCLK_DIV2>; + clock-names = "core", "clkin0", "clkin1"; + + bus-width = <8>; + cap-sd-highspeed; + cap-mmc-highspeed; + mmc-ddr-1_8v; + mmc-hs200-1_8v; + + max-frequency = <200000000>; + non-removable; + disable-wp; + emmc { + status = "disabled"; + pinname = "emmc"; + ocr_avail = <0x200080>; /**VDD voltage 3.3 ~ 3.4 */ + caps = "MMC_CAP_8_BIT_DATA", + "MMC_CAP_MMC_HIGHSPEED", + "MMC_CAP_SD_HIGHSPEED", + "MMC_CAP_NONREMOVABLE", + "MMC_CAP_1_8V_DDR", + "MMC_CAP_HW_RESET", + "MMC_CAP_ERASE", + "MMC_CAP_CMD23"; + caps2 = "MMC_CAP2_HS200", "MMC_CAP2_HS400"; + f_min = <300000>; + f_max = <100000000>; + max_req_size = <0x20000>; /**128KB*/ + hw_reset = <&gpio BOOT_9 GPIO_ACTIVE_HIGH>; + card_type = <1>; + /* 1:mmc card(include eMMC), + * 2:sd card(include tSD) + */ + }; + }; + + sd_emmc_b:sd@d0072000 { + status = "okay"; + compatible = "amlogic, meson-aml-mmc"; + reg = <0x0 0xd0072000 0x0 0x2000>; + interrupts = <0 217 1>; + pinctrl-names = "sd_all_pins", + "sd_clk_cmd_pins", + "sd_clk_cmd_uart_pins", + "sd_to_ao_uart_pins", + "ao_to_sd_uart_pins"; + pinctrl-0 = <&sd_all_pins>; + pinctrl-1 = <&sd_clk_cmd_pins>; + pinctrl-2 = <&sd_clk_cmd_pins &ao_to_sd_uart_pins>; + pinctrl-3 = <&sd_to_ao_uart_pins>; + pinctrl-4 = <&ao_to_sd_uart_pins>; + clocks = <&clkc CLKID_SD_EMMC_B>, + <&clkc CLKID_SD_EMMC_B_P0_COMP>, + <&clkc CLKID_FCLK_DIV2>; + clock-names = "core", "clkin0", "clkin1"; + + bus-width = <4>; + cap-sd-highspeed; + max-frequency = <100000000>; + disable-wp; + sd { + status = "disabled"; + pinname = "sd"; + ocr_avail = <0x200080>; /**VDD voltage 3.3 ~ 3.4 */ + caps = "MMC_CAP_4_BIT_DATA", + "MMC_CAP_MMC_HIGHSPEED", + "MMC_CAP_SD_HIGHSPEED"; + /* "MMC_CAP_UHS_SDR12", + * "MMC_CAP_UHS_SDR25", + * "MMC_CAP_UHS_SDR50", + * "MMC_CAP_UHS_SDR104"; + */ + f_min = <400000>; + f_max = <100000000>; + max_req_size = <0x20000>; /**128KB*/ + gpio_dat3 = <&gpio CARD_4 GPIO_ACTIVE_HIGH>; + jtag_pin = <&gpio CARD_0 GPIO_ACTIVE_HIGH>; + gpio_cd = <&gpio CARD_6 GPIO_ACTIVE_HIGH>; + card_type = <5>; + /* 0:unknown, + * 1:mmc card(include eMMC), + * 2:sd card(include tSD), + * 3:sdio device(ie:sdio-wifi), + * 4:SD combo (IO+mem) card, + * 5:NON sdio device(means sd/mmc card), + * other:reserved + */ + }; + }; + + sd_emmc_a:sdio@d0070000 { + status = "okay"; + compatible = "amlogic, meson-aml-mmc"; + reg = <0x0 0xd0070000 0x0 0x2000>; + interrupts = <0 216 4>; + pinctrl-names = "sdio_clk_cmd_pins", "sdio_all_pins"; + pinctrl-0 = <&sdio_clk_cmd_pins>; + pinctrl-1 = <&sdio_all_pins>; + clocks = <&clkc CLKID_SD_EMMC_A>, + <&clkc CLKID_SD_EMMC_A_P0_COMP>, + <&clkc CLKID_FCLK_DIV2>; + clock-names = "core", "clkin0", "clkin1"; + + bus-width = <4>; + cap-sd-highspeed; + cap-mmc-highspeed; + max-frequency = <100000000>; + non-removable; + disable-wp; + sdio { + status = "disabled"; + pinname = "sdio"; + ocr_avail = <0x200080>; /**VDD voltage 3.3 ~ 3.4 */ + caps = "MMC_CAP_4_BIT_DATA", + "MMC_CAP_MMC_HIGHSPEED", + "MMC_CAP_SD_HIGHSPEED", + "MMC_CAP_NONREMOVABLE", + "MMC_CAP_UHS_SDR12", + "MMC_CAP_UHS_SDR25", + "MMC_CAP_UHS_SDR50", + "MMC_CAP_UHS_SDR104", + "MMC_PM_KEEP_POWER", + "MMC_CAP_SDIO_IRQ"; + f_min = <400000>; + f_max = <200000000>; + max_req_size = <0x20000>; /**128KB*/ + card_type = <3>; + /* 3:sdio device(ie:sdio-wifi), + * 4:SD combo (IO+mem) card + */ + }; + }; + + uart_AO: serial@c81004c0 { + compatible = "amlogic, meson-uart"; + reg = <0x0 0xc81004c0 0x0 0x18>; + interrupts = <0 193 1>; + status = "okay"; + xtal_tick_en = <1>; + fifosize = < 64 >; + pinctrl-names = "default"; + pinctrl-0 = <&ao_uart_pins>; + support-sysrq = <0>; /* 0 not support , 1 support */ + }; + ethmac: ethernet@0xc9410000 { + compatible = "amlogic, gxbb-eth-dwmac"; + reg = <0x0 0xc9410000 0x0 0x10000 + 0x0 0xc8834540 0x0 0x8 + 0x0 0xc8834558 0x0 0xc>; + interrupts = <0 8 1>; + pinctrl-names = "external_eth_pins"; + pinctrl-0 = <&external_eth_pins>; + rst_pin-gpios = <&gpio GPIOZ_14 0>; + GPIOZ4_pin-gpios = <&gpio GPIOZ_4 0>; + GPIOZ5_pin-gpios = <&gpio GPIOZ_5 0>; + mc_val_internal_phy = <0x1800>; + mc_val_external_phy = <0x1621>; + cali_val = <0x20000>; + interrupt-names = "macirq"; + clocks = <&clkc CLKID_ETH>; + clock-names = "ethclk81"; + internal_phy=<1>; + }; + + codec_io { + compatible = "amlogic, codec_io"; + #address-cells=<2>; + #size-cells=<2>; + ranges; + io_cbus_base{ + reg = <0x0 0xC1100000 0x0 0x100000>; + }; + io_dos_base{ + reg = <0x0 0xc8820000 0x0 0x10000>; + }; + io_hiubus_base{ + reg = <0x0 0xc883c000 0x0 0x2000>; + }; + io_aobus_base{ + reg = <0x0 0xc8100000 0x0 0x100000>; + }; + io_vcbus_base{ + reg = <0x0 0xd0100000 0x0 0x40000>; + }; + io_dmc_base{ + reg = <0x0 0xc8838000 0x0 0x400>; + }; + }; + + codec_mm { + compatible = "amlogic, codec, mm"; + memory-region = <&codec_mm_cma &codec_mm_reserved>; + dev_name = "codec_mm"; + status = "okay"; + }; + + canvas{ + compatible = "amlogic, meson, canvas"; + dev_name = "amlogic-canvas"; + status = "ok"; + reg = <0x0 0xc8838000 0x0 0x400>; + }; + + mesonstream { + compatible = "amlogic, codec, streambuf"; + dev_name = "mesonstream"; + status = "okay"; + clocks = <&clkc CLKID_DOS_PARSER + &clkc CLKID_VPU_INTR + &clkc CLKID_DEMUX + &clkc CLKID_DOS + &clkc CLKID_VDEC_MUX + &clkc CLKID_HCODEC_MUX + &clkc CLKID_HEVC_MUX>; + clock-names = "parser_top", + "vpu_intr", + "demux", + "vdec", + "clk_vdec_mux", + "clk_hcodec_mux", + "clk_hevc_mux"; + }; + + vdec { + compatible = "amlogic, vdec"; + dev_name = "vdec.0"; + status = "okay"; + interrupts = <0 3 1 + 0 23 1 + 0 32 1 + 0 43 1 + 0 44 1 + 0 45 1>; + interrupt-names = "vsync", + "demux", + "parser", + "mailbox_0", + "mailbox_1", + "mailbox_2"; + }; + + + dwc3: dwc3@c9000000 { + compatible = "synopsys, dwc3"; + reg = <0x0 0xc9000000 0x0 0x100000>; + interrupts = <0 30 4>; + usb-phy = <&usb2_phy>, <&usb3_phy>; + cpu-type = "gxl"; + clock-src = "usb3.0"; + }; + + usb2_phy: usb2phy@d0078000 { + compatible = "amlogic, amlogic-new-usb2"; + portnum = <3>; + reg = <0x0 0xd0078000 0x0 0x80>; + }; + + usb3_phy: usb3phy@d0078080 { + compatible = "amlogic, amlogic-new-usb3"; + portnum = <0>; + reg = <0x0 0xd0078080 0x0 0x20>; + }; + + dwc2_a { + compatible = "amlogic, dwc2"; + device_name = "dwc2_a"; + reg = <0x0 0xc9100000 0x0 0x40000>; + status = "okay"; + interrupts = <0 31 4>; + pl-periph-id = <0>; /** lm name */ + clock-src = "usb0"; /** clock src */ + port-id = <0>; /** ref to mach/usb.h */ + port-type = <2>; /** 0: otg, 1: host, 2: slave */ + port-speed = <0>; /** 0: default, high, 1: full */ + port-config = <0>; /** 0: default */ + port-dma = <0>; /** 0: default ... 6: disable*/ + port-id-mode = <0>; /** 0: hardware, 1: sw_host, 2: sw_slave*/ + usb-fifo = <728>; + cpu-type = "gxl"; + controller-type = <2>; /** 0: normal, 1: host, 2: device*/ + phy-reg = <0xd0078000>; + phy-reg-size = <0xa0>; + clocks = <&clkc CLKID_USB_GENERAL + &clkc CLKID_USB1_TO_DDR + &clkc CLKID_USB1>; + clock-names = "usb_general", + "usb1", + "usb1_to_ddr"; + }; + + vout { + compatible = "amlogic, vout"; + dev_name = "vout"; + status = "okay"; + fr_auto_policy = <0>; + }; + + cvbsout { + compatible = "amlogic, cvbsout"; + dev_name = "cvbsout"; + status = "okay"; + }; + + amhdmitx: amhdmitx{ + compatible = "amlogic, amhdmitx"; + dev_name = "amhdmitx"; + status = "okay"; + vend-data = <&vend_data>; + pinctrl-names="hdmitx_hpd", "hdmitx_ddc"; + pinctrl-0=<&hdmitx_hpd>; + pinctrl-1=<&hdmitx_ddc>; + /* HPD, 57 + 32 = 89; CEC, 151 + 32 = 183*/ + interrupts = <0 57 1>; + interrupt-names = "hdmitx_hpd"; + vend_data: vend_data{ /* Should modified by Customer */ + vendor_name = "Amlogic"; /* Max Chars: 8 */ + /* standards.ieee.org/develop/regauth/oui/oui.txt */ + vendor_id = <0x000000>; + product_desc = "MBox Meson Ref"; /* Max Chars: 16 */ + }; + }; + + pwm { + compatible = "amlogic, meson-pwm"; + status = "okay"; + pwm-outputs = ,,,, + ,,,; + pwm-outputs-new = ,,,, + ,,,, + ,,,, + ,,,; + reg = <0x0 0xc1108550 0x0 0x30>, + <0x0 0xc8100550 0x0 0x10>; + clocks = <&xtal>, + <&clkc CLKID_VID_PLL>, + /*the clock source is not supported now*/ + <&clkc CLKID_FCLK_DIV4>, + <&clkc CLKID_FCLK_DIV3>; + clock-names = "xtal", + "vid_pll_clk", + "fclk_div4", + "fclk_div3"; + clock-select = ,,,, + ,,,; + clock-select-new = ,,,, + ,,,, + ,,,, + ,,,; + /*all channels use the default clock source XTAL_CLK*/ + /*and you can shoose it in file dt-bindings/pwm/meson.h*/ + }; + meson-fb { + compatible = "amlogic, meson-fb"; + memory-region = <&fb_reserved>; + dev_name = "meson-fb"; + status = "okay"; + interrupts = <0 3 1 + 0 89 1>; + interrupt-names = "viu-vsync", "rdma"; + mem_size = <0x01851000 0x00100000>; /* fb0/fb1 memory size */ + display_mode_default = "1080p60hz"; + scale_mode = <1>; + /** 0:VPU free scale 1:OSD free scale 2:OSD super scale */ + display_size_default = <1920 1080 1920 3240 32>; + /*1920*1080*4*3 = 0x17BB000*/ + logo_addr = "0x3d851000"; + /*ion base + fb0 memory size for uboot logo osd1*/ + }; + ge2d { + compatible = "amlogic, ge2d"; + dev_name = "ge2d"; + status = "okay"; + interrupts = <0 150 1>; + interrupt-names = "ge2d"; + clocks = <&clkc CLKID_VAPB_MUX>, + <&clkc CLKID_GE2D_GATE>, + <&clkc CLKID_G2D>; + clock-names = "clk_vapb_0", + "clk_ge2d", + "clk_ge2d_gate"; + }; + + rdma{ + compatible = "amlogic, meson, rdma"; + dev_name = "amlogic-rdma"; + status = "ok"; + interrupts = <0 89 1>; + interrupt-names = "rdma"; + }; + + partitions: partitions{ + parts = <11>; + part-0 = <&logo>; + part-1 = <&recovery>; + part-2 = <&rsv>; + part-3 = <&tee>; + part-4 = <&crypt>; + part-5 = <&misc>; + part-6 = <&instaboot>; + part-7 = <&boot>; + part-8 = <&system>; + part-9 = <&cache>; + part-10 = <&data>; + + logo:logo{ + pname = "logo"; + size = <0x0 0x2000000>; + mask = <1>; + }; + recovery:recovery{ + pname = "recovery"; + size = <0x0 0x2000000>; + mask = <1>; + }; + rsv:rsv{ + pname = "rsv"; + size = <0x0 0x800000>; + mask = <1>; + }; + tee:tee{ + pname = "tee"; + size = <0x0 0x800000>; + mask = <1>; + }; + crypt:crypt{ + pname = "crypt"; + size = <0x0 0x2000000>; + mask = <1>; + }; + misc:misc{ + pname = "misc"; + size = <0x0 0x2000000>; + mask = <1>; + }; + instaboot:instaboot{ + pname = "instaboot"; + size = <0x0 0x400000>; + mask = <1>; + }; + boot:boot + { + pname = "boot"; + size = <0x0 0x2000000>; + mask = <1>; + }; + system:system + { + pname = "system"; + size = <0x0 0x80000000>; + mask = <1>; + }; + cache:cache + { + pname = "cache"; + size = <0x0 0x20000000>; + mask = <2>; + }; + data:data + { + pname = "data"; + size = <0xffffffff 0xffffffff>; + mask = <4>; + }; + }; +}; +&efuse { + status = "ok"; +};