From 3631fa6e38052d1be163fa2ac24fffa7abc4244b Mon Sep 17 00:00:00 2001 From: Wyon Bi Date: Tue, 15 Oct 2019 08:59:00 +0800 Subject: [PATCH] ARM: dts: rockchip: Add support for rk3288-evb-rk628 board Change-Id: I7b900c16a9ea30590220a1cf95a84e018fa701e2 Signed-off-by: Wyon Bi --- arch/arm/boot/dts/Makefile | 4 + .../boot/dts/rk3288-evb-rk628-rgb2dsi-avb.dts | 333 ++++++++++ .../dts/rk3288-evb-rk628-rgb2hdmi-avb.dts | 95 +++ .../dts/rk3288-evb-rk628-rgb2lvds-avb.dts | 144 +++++ .../rk3288-evb-rk628-rgb2lvds-dual-avb.dts | 151 +++++ arch/arm/boot/dts/rk3288-evb-rk628.dtsi | 612 ++++++++++++++++++ 6 files changed, 1339 insertions(+) create mode 100644 arch/arm/boot/dts/rk3288-evb-rk628-rgb2dsi-avb.dts create mode 100644 arch/arm/boot/dts/rk3288-evb-rk628-rgb2hdmi-avb.dts create mode 100644 arch/arm/boot/dts/rk3288-evb-rk628-rgb2lvds-avb.dts create mode 100644 arch/arm/boot/dts/rk3288-evb-rk628-rgb2lvds-dual-avb.dts create mode 100644 arch/arm/boot/dts/rk3288-evb-rk628.dtsi diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index 3217d75535df..4e516d811b5b 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -890,6 +890,10 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += \ rk3288-evb-act8846.dtb \ rk3288-evb-rk808.dtb \ rk3288-evb-android-rk808-edp-avb.dtb \ + rk3288-evb-rk628-rgb2dsi-avb.dtb \ + rk3288-evb-rk628-rgb2hdmi-avb.dtb \ + rk3288-evb-rk628-rgb2lvds-avb.dtb \ + rk3288-evb-rk628-rgb2lvds-dual-avb.dtb \ rk3288-fennec.dtb \ rk3288-firefly-beta.dtb \ rk3288-firefly.dtb \ diff --git a/arch/arm/boot/dts/rk3288-evb-rk628-rgb2dsi-avb.dts b/arch/arm/boot/dts/rk3288-evb-rk628-rgb2dsi-avb.dts new file mode 100644 index 000000000000..defa206e2a0d --- /dev/null +++ b/arch/arm/boot/dts/rk3288-evb-rk628-rgb2dsi-avb.dts @@ -0,0 +1,333 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +// Copyright (c) 2020 Fuzhou Rockchip Electronics Co., Ltd + +/dts-v1/; +#include "rk3288-evb-rk628.dtsi" + +&rk628_dsi0 { + status = "okay"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + dsi0_in_post_process: endpoint { + remote-endpoint = <&post_process_out_dsi0>; + }; + }; + }; + + panel@0 { + compatible = "simple-panel-dsi"; + reg = <0>; + backlight = <&backlight>; + enable-gpios = <&gpio7 RK_PA2 GPIO_ACTIVE_HIGH>; + prepare-delay-ms = <120>; + enable-delay-ms = <120>; + disable-delay-ms = <120>; + unprepare-delay-ms = <120>; + init-delay-ms = <120>; + + dsi,flags = <(MIPI_DSI_MODE_VIDEO | + MIPI_DSI_MODE_VIDEO_BURST | + MIPI_DSI_MODE_LPM | + MIPI_DSI_MODE_EOT_PACKET)>; + dsi,format = ; + dsi,lanes = <4>; + + panel-init-sequence = [ + 39 00 04 ff 98 81 03 + 39 00 02 01 00 + 39 00 02 02 00 + 39 00 02 03 53 + 39 00 02 04 53 + 39 00 02 05 13 + 39 00 02 06 04 + 39 00 02 07 02 + 39 00 02 08 02 + 39 00 02 09 00 + 39 00 02 0a 00 + 39 00 02 0b 00 + 39 00 02 0c 00 + 39 00 02 0d 00 + 39 00 02 0e 00 + 39 00 02 0f 00 + 39 00 02 10 00 + 39 00 02 11 00 + 39 00 02 12 00 + 39 00 02 13 00 + 39 00 02 14 00 + 39 00 02 15 08 + 39 00 02 16 10 + 39 00 02 17 00 + 39 00 02 18 08 + 39 00 02 19 00 + 39 00 02 1a 00 + 39 00 02 1b 00 + 39 00 02 1c 00 + 39 00 02 1d 00 + 39 00 02 1e c0 + 39 00 02 1f 80 + 39 00 02 20 02 + 39 00 02 21 09 + 39 00 02 22 00 + 39 00 02 23 00 + 39 00 02 24 00 + 39 00 02 25 00 + 39 00 02 26 00 + 39 00 02 27 00 + 39 00 02 28 55 + 39 00 02 29 03 + 39 00 02 2a 00 + 39 00 02 2b 00 + 39 00 02 2c 00 + 39 00 02 2d 00 + 39 00 02 2e 00 + 39 00 02 2f 00 + 39 00 02 30 00 + 39 00 02 31 00 + 39 00 02 32 00 + 39 00 02 33 00 + 39 00 02 34 04 + 39 00 02 35 05 + 39 00 02 36 05 + 39 00 02 37 00 + 39 00 02 38 3c + 39 00 02 39 35 + 39 00 02 3a 00 + 39 00 02 3b 40 + 39 00 02 3c 00 + 39 00 02 3d 00 + 39 00 02 3e 00 + 39 00 02 3f 00 + 39 00 02 40 00 + 39 00 02 41 88 + 39 00 02 42 00 + 39 00 02 43 00 + 39 00 02 44 1f + 39 00 02 50 01 + 39 00 02 51 23 + 39 00 02 52 45 + 39 00 02 53 67 + 39 00 02 54 89 + 39 00 02 55 ab + 39 00 02 56 01 + 39 00 02 57 23 + 39 00 02 58 45 + 39 00 02 59 67 + 39 00 02 5a 89 + 39 00 02 5b ab + 39 00 02 5c cd + 39 00 02 5d ef + 39 00 02 5e 03 + 39 00 02 5f 14 + 39 00 02 60 15 + 39 00 02 61 0c + 39 00 02 62 0d + 39 00 02 63 0e + 39 00 02 64 0f + 39 00 02 65 10 + 39 00 02 66 11 + 39 00 02 67 08 + 39 00 02 68 02 + 39 00 02 69 0a + 39 00 02 6a 02 + 39 00 02 6b 02 + 39 00 02 6c 02 + 39 00 02 6d 02 + 39 00 02 6e 02 + 39 00 02 6f 02 + 39 00 02 70 02 + 39 00 02 71 02 + 39 00 02 72 06 + 39 00 02 73 02 + 39 00 02 74 02 + 39 00 02 75 14 + 39 00 02 76 15 + 39 00 02 77 0f + 39 00 02 78 0e + 39 00 02 79 0d + 39 00 02 7a 0c + 39 00 02 7b 11 + 39 00 02 7c 10 + 39 00 02 7d 06 + 39 00 02 7e 02 + 39 00 02 7f 0a + 39 00 02 80 02 + 39 00 02 81 02 + 39 00 02 82 02 + 39 00 02 83 02 + 39 00 02 84 02 + 39 00 02 85 02 + 39 00 02 86 02 + 39 00 02 87 02 + 39 00 02 88 08 + 39 00 02 89 02 + 39 00 02 8a 02 + 39 00 04 ff 98 81 04 + 39 00 02 00 80 + 39 00 02 70 00 + 39 00 02 71 00 + 39 00 02 66 fe + 39 00 02 82 15 + 39 00 02 84 15 + 39 00 02 85 15 + 39 00 02 3a 24 + 39 00 02 32 ac + 39 00 02 8c 80 + 39 00 02 3c f5 + 39 00 02 88 33 + 39 00 04 ff 98 81 01 + 39 00 02 22 0a + 39 00 02 31 00 + 39 00 02 53 78 + 39 00 02 55 7b + 39 00 02 60 20 + 39 00 02 61 00 + 39 00 02 62 0d + 39 00 02 63 00 + 39 00 02 a0 00 + 39 00 02 a1 10 + 39 00 02 a2 1c + 39 00 02 a3 13 + 39 00 02 a4 15 + 39 00 02 a5 26 + 39 00 02 a6 1a + 39 00 02 a7 1d + 39 00 02 a8 67 + 39 00 02 a9 1c + 39 00 02 aa 29 + 39 00 02 ab 58 + 39 00 02 ac 26 + 39 00 02 ad 28 + 39 00 02 ae 5c + 39 00 02 af 30 + 39 00 02 b0 31 + 39 00 02 b1 32 + 39 00 02 b2 00 + 39 00 02 c0 00 + 39 00 02 c1 10 + 39 00 02 c2 1c + 39 00 02 c3 13 + 39 00 02 c4 15 + 39 00 02 c5 26 + 39 00 02 c6 1a + 39 00 02 c7 1d + 39 00 02 c8 67 + 39 00 02 c9 1c + 39 00 02 ca 29 + 39 00 02 cb 5b + 39 00 02 cc 26 + 39 00 02 cd 28 + 39 00 02 ce 5c + 39 00 02 cf 30 + 39 00 02 d0 31 + 39 00 02 d1 2e + 39 00 02 d2 32 + 39 00 02 d3 00 + 39 00 04 ff 98 81 00 + 05 fa 01 11 + 05 14 01 29 + ]; + + panel-exit-sequence = [ + 05 00 01 28 + 05 00 01 10 + ]; + + display-timings { + native-mode = <&timing0>; + + timing0: timing0 { + clock-frequency = <64000000>; + hactive = <720>; + vactive = <1280>; + hfront-porch = <40>; + hsync-len = <10>; + hback-porch = <40>; + vfront-porch = <22>; + vsync-len = <4>; + vback-porch = <11>; + hsync-active = <0>; + vsync-active = <0>; + de-active = <0>; + pixelclk-active = <0>; + }; + }; + }; +}; + +&rk628_combtxphy { + status = "okay"; +}; + +&rk628_post_process { + pinctrl-names = "default"; + pinctrl-0 = <&vop_pins>; + status = "okay"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + post_process_in_rgb: endpoint { + remote-endpoint = <&rgb_out_post_process>; + }; + }; + + port@1 { + reg = <1>; + + post_process_out_dsi0: endpoint { + remote-endpoint = <&dsi0_in_post_process>; + }; + }; + }; +}; + +&rgb { + status = "okay"; + + ports { + port@1 { + reg = <1>; + + rgb_out_post_process: endpoint { + remote-endpoint = <&post_process_in_rgb>; + }; + }; + }; +}; + +&video_phy { + status = "okay"; +}; + +&rgb_in_vopb { + status = "disabled"; +}; + +&rgb_in_vopl { + status = "okay"; +}; + +&route_rgb { + connect = <&vopl_out_rgb>; + status = "disabled"; +}; + +&vopb { + assigned-clocks = <&cru DCLK_VOP0>; + assigned-clock-parents = <&cru PLL_GPLL>; +}; + +&vopl { + assigned-clocks = <&cru DCLK_VOP1>; + assigned-clock-parents = <&cru PLL_CPLL>; +}; diff --git a/arch/arm/boot/dts/rk3288-evb-rk628-rgb2hdmi-avb.dts b/arch/arm/boot/dts/rk3288-evb-rk628-rgb2hdmi-avb.dts new file mode 100644 index 000000000000..2d8c6afe5ca4 --- /dev/null +++ b/arch/arm/boot/dts/rk3288-evb-rk628-rgb2hdmi-avb.dts @@ -0,0 +1,95 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +// Copyright (c) 2020 Fuzhou Rockchip Electronics Co., Ltd + +/dts-v1/; +#include "rk3288-evb-rk628.dtsi" + +&sound { + status = "okay"; +}; + +&rk628_hdmi { + status = "okay"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + hdmi_in_post_process: endpoint { + remote-endpoint = <&post_process_out_hdmi>; + }; + }; + }; +}; + +&rk628_post_process { + pinctrl-names = "default"; + pinctrl-0 = <&vop_pins>; + status = "okay"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + post_process_in_rgb: endpoint { + remote-endpoint = <&rgb_out_post_process>; + }; + }; + + port@1 { + reg = <1>; + + post_process_out_hdmi: endpoint { + remote-endpoint = <&hdmi_in_post_process>; + }; + }; + }; +}; + +&rgb { + status = "okay"; + + ports { + port@1 { + reg = <1>; + + rgb_out_post_process: endpoint { + remote-endpoint = <&post_process_in_rgb>; + }; + }; + }; +}; + + +&video_phy { + status = "okay"; +}; + +&rgb_in_vopb { + status = "disabled"; +}; + +&rgb_in_vopl { + status = "okay"; +}; + +&route_rgb { + connect = <&vopl_out_rgb>; + status = "disabled"; +}; + +&vopb { + assigned-clocks = <&cru DCLK_VOP0>; + assigned-clock-parents = <&cru PLL_CPLL>; +}; + +&vopl { + assigned-clocks = <&cru DCLK_VOP1>; + assigned-clock-parents = <&cru PLL_GPLL>; +}; diff --git a/arch/arm/boot/dts/rk3288-evb-rk628-rgb2lvds-avb.dts b/arch/arm/boot/dts/rk3288-evb-rk628-rgb2lvds-avb.dts new file mode 100644 index 000000000000..62d0e2feb0ad --- /dev/null +++ b/arch/arm/boot/dts/rk3288-evb-rk628-rgb2lvds-avb.dts @@ -0,0 +1,144 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +// Copyright (c) 2020 Fuzhou Rockchip Electronics Co., Ltd + +/dts-v1/; +#include "rk3288-evb-rk628.dtsi" + +/ { + model = "Rockchip RK3288 EVB RK628 Board"; + compatible = "rockchip,rk3288-evb-rk628", "rockchip,rk3288"; + + panel { + compatible = "simple-panel"; + backlight = <&backlight>; + enable-gpios = <&gpio7 RK_PA2 GPIO_ACTIVE_HIGH>; + prepare-delay-ms = <20>; + enable-delay-ms = <20>; + disable-delay-ms = <20>; + unprepare-delay-ms = <20>; + bus-format = ; + + display-timings { + native-mode = <&timing0>; + + timing0: timing0 { + clock-frequency = <48000000>; + hactive = <1024>; + vactive = <600>; + hback-porch = <90>; + hfront-porch = <90>; + vback-porch = <10>; + vfront-porch = <10>; + hsync-len = <90>; + vsync-len = <10>; + hsync-active = <0>; + vsync-active = <0>; + de-active = <0>; + pixelclk-active = <0>; + }; + }; + + port { + panel_in_lvds: endpoint { + remote-endpoint = <&lvds_out_panel>; + }; + }; + }; +}; + +&rk628_lvds { + status = "okay"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + lvds_in_post_process: endpoint { + remote-endpoint = <&post_process_out_lvds>; + }; + }; + + port@1 { + reg = <1>; + + lvds_out_panel: endpoint { + remote-endpoint = <&panel_in_lvds>; + }; + }; + }; +}; + +&rk628_combtxphy { + status = "okay"; +}; + +&rk628_post_process { + pinctrl-names = "default"; + pinctrl-0 = <&vop_pins>; + status = "okay"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + post_process_in_rgb: endpoint { + remote-endpoint = <&rgb_out_post_process>; + }; + }; + + port@1 { + reg = <1>; + + post_process_out_lvds: endpoint { + remote-endpoint = <&lvds_in_post_process>; + }; + }; + }; +}; + +&rgb { + status = "okay"; + + ports { + port@1 { + reg = <1>; + + rgb_out_post_process: endpoint { + remote-endpoint = <&post_process_in_rgb>; + }; + }; + }; +}; + +&video_phy { + status = "okay"; +}; + +&rgb_in_vopb { + status = "disabled"; +}; + +&rgb_in_vopl { + status = "okay"; +}; + +&route_rgb { + connect = <&vopl_out_rgb>; + status = "disabled"; +}; + +&vopb { + assigned-clocks = <&cru DCLK_VOP0>; + assigned-clock-parents = <&cru PLL_GPLL>; +}; + +&vopl { + assigned-clocks = <&cru DCLK_VOP1>; + assigned-clock-parents = <&cru PLL_CPLL>; +}; diff --git a/arch/arm/boot/dts/rk3288-evb-rk628-rgb2lvds-dual-avb.dts b/arch/arm/boot/dts/rk3288-evb-rk628-rgb2lvds-dual-avb.dts new file mode 100644 index 000000000000..2153da4dc2d0 --- /dev/null +++ b/arch/arm/boot/dts/rk3288-evb-rk628-rgb2lvds-dual-avb.dts @@ -0,0 +1,151 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +// Copyright (c) 2020 Fuzhou Rockchip Electronics Co., Ltd + +/dts-v1/; +#include "rk3288-evb-rk628.dtsi" + +/ { + vcc33_lcd: vcc33-lcd { + compatible = "regulator-fixed"; + regulator-name = "vcc33_lcd"; + regulator-boot-on; + gpio = <&gpio7 RK_PA2 GPIO_ACTIVE_HIGH>; + enable-active-high; + }; + + panel { + compatible = "simple-panel"; + backlight = <&backlight>; + power-supply = <&vcc33_lcd>; + enable-gpios = <&gpio5 RK_PC1 GPIO_ACTIVE_HIGH>; + prepare-delay-ms = <20>; + enable-delay-ms = <20>; + disable-delay-ms = <20>; + unprepare-delay-ms = <20>; + bus-format = ; + + display-timings { + native-mode = <&timing0>; + + timing0: timing0 { + clock-frequency = <149000000>; + hactive = <1920>; + vactive = <1080>; + hback-porch = <96>; + hfront-porch = <120>; + vback-porch = <8>; + vfront-porch = <33>; + hsync-len = <64>; + vsync-len = <4>; + hsync-active = <0>; + vsync-active = <0>; + de-active = <0>; + pixelclk-active = <0>; + }; + }; + + port { + panel_in_lvds: endpoint { + remote-endpoint = <&lvds_out_panel>; + }; + }; + }; +}; + +&rk628_lvds { + rockchip,link-type = "dual-link-even-odd-pixels"; + status = "okay"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + lvds_in_post_process: endpoint { + remote-endpoint = <&post_process_out_lvds>; + }; + }; + + port@1 { + reg = <1>; + + lvds_out_panel: endpoint { + remote-endpoint = <&panel_in_lvds>; + }; + }; + }; +}; + +&rk628_combtxphy { + status = "okay"; +}; + +&rk628_post_process { + pinctrl-names = "default"; + pinctrl-0 = <&vop_pins>; + status = "okay"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + post_process_in_rgb: endpoint { + remote-endpoint = <&rgb_out_post_process>; + }; + }; + + port@1 { + reg = <1>; + + post_process_out_lvds: endpoint { + remote-endpoint = <&lvds_in_post_process>; + }; + }; + }; +}; + +&rgb { + status = "okay"; + + ports { + port@1 { + reg = <1>; + + rgb_out_post_process: endpoint { + remote-endpoint = <&post_process_in_rgb>; + }; + }; + }; +}; + +&video_phy { + status = "okay"; +}; + +&rgb_in_vopb { + status = "disabled"; +}; + +&rgb_in_vopl { + status = "okay"; +}; + +&route_rgb { + connect = <&vopl_out_rgb>; + status = "disabled"; +}; + +&vopb { + assigned-clocks = <&cru DCLK_VOP0>; + assigned-clock-parents = <&cru PLL_GPLL>; +}; + +&vopl { + assigned-clocks = <&cru DCLK_VOP1>; + assigned-clock-parents = <&cru PLL_CPLL>; +}; diff --git a/arch/arm/boot/dts/rk3288-evb-rk628.dtsi b/arch/arm/boot/dts/rk3288-evb-rk628.dtsi new file mode 100644 index 000000000000..85eef3eac4e6 --- /dev/null +++ b/arch/arm/boot/dts/rk3288-evb-rk628.dtsi @@ -0,0 +1,612 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +// Copyright (c) 2020 Fuzhou Rockchip Electronics Co., Ltd + +#include +#include +#include "rk3288.dtsi" +#include "rk3288-android.dtsi" + +/ { + model = "Rockchip RK3288 EVB RK628 Board"; + compatible = "rockchip,rk3288-evb-rk628", "rockchip,rk3288"; + + chosen: chosen { + bootargs = "rootwait earlycon=uart8250,mmio32,0xff690000 vmalloc=496M swiotlb=1 console=ttyFIQ0 androidboot.baseband=N/A androidboot.veritymode=enforcing androidboot.hardware=rk30board androidboot.console=ttyFIQ0 init=/init kpti=0"; + }; + + adc-keys { + compatible = "adc-keys"; + io-channels = <&saradc 1>; + io-channel-names = "buttons"; + keyup-threshold-microvolt = <1800000>; + poll-interval = <100>; + + vol-up-key { + label = "volume up"; + linux,code = ; + press-threshold-microvolt = <1000>; + }; + + vol-down-key { + label = "volume down"; + linux,code = ; + press-threshold-microvolt = <170000>; + }; + + menu { + label = "menu"; + linux,code = ; + press-threshold-microvolt = <640000>; + }; + + esc { + label = "esc"; + linux,code = ; + press-threshold-microvolt = <1000000>; + }; + + home { + label = "home"; + linux,code = ; + press-threshold-microvolt = <1300000>; + }; + }; + + backlight: backlight { + compatible = "pwm-backlight"; + pwms = <&pwm0 0 1000000 0>; + brightness-levels = < + 0 1 2 3 4 5 6 7 + 8 9 10 11 12 13 14 15 + 16 17 18 19 20 21 22 23 + 24 25 26 27 28 29 30 31 + 32 33 34 35 36 37 38 39 + 40 41 42 43 44 45 46 47 + 48 49 50 51 52 53 54 55 + 56 57 58 59 60 61 62 63 + 64 65 66 67 68 69 70 71 + 72 73 74 75 76 77 78 79 + 80 81 82 83 84 85 86 87 + 88 89 90 91 92 93 94 95 + 96 97 98 99 100 101 102 103 + 104 105 106 107 108 109 110 111 + 112 113 114 115 116 117 118 119 + 120 121 122 123 124 125 126 127 + 128 129 130 131 132 133 134 135 + 136 137 138 139 140 141 142 143 + 144 145 146 147 148 149 150 151 + 152 153 154 155 156 157 158 159 + 160 161 162 163 164 165 166 167 + 168 169 170 171 172 173 174 175 + 176 177 178 179 180 181 182 183 + 184 185 186 187 188 189 190 191 + 192 193 194 195 196 197 198 199 + 200 201 202 203 204 205 206 207 + 208 209 210 211 212 213 214 215 + 216 217 218 219 220 221 222 223 + 224 225 226 227 228 229 230 231 + 232 233 234 235 236 237 238 239 + 240 241 242 243 244 245 246 247 + 248 249 250 251 252 253 254 255>; + default-brightness-level = <128>; + }; + + i2s_mclkin: i2s-mclkin { + compatible = "fixed-factor-clock"; + #clock-cells = <0>; + clocks = <&cru SCLK_I2S0_OUT>; + clock-mult = <1>; + clock-div = <1>; + clock-output-names = "i2s_mclkin"; + }; + + sound: sound { + compatible = "simple-audio-card"; + simple-audio-card,format = "i2s"; + simple-audio-card,name = "realtek,rt5651-codec"; + simple-audio-card,mclk-fs = <256>; + simple-audio-card,widgets = + "Microphone", "Microphone Jack", + "Headphone", "Headphone Jack"; + simple-audio-card,routing = + "MIC1", "Microphone Jack", + "MIC2", "Microphone Jack", + "Microphone Jack", "micbias1", + "Headphone Jack", "HPOL", + "Headphone Jack", "HPOR"; + status = "disabled"; + + simple-audio-card,dai-link@0 { + format = "i2s"; + cpu { + sound-dai = <&i2s>; + }; + + codec { + sound-dai = <&rt5651>; + }; + }; + + simple-audio-card,dai-link@1 { + format = "i2s"; + cpu { + sound-dai = <&i2s>; + }; + + codec { + sound-dai = <&rk628_hdmi>; + }; + }; + }; + + vcc_host: vcc-host-regulator { + compatible = "regulator-fixed"; + enable-active-high; + gpio = <&gpio0 RK_PB6 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&host_vbus_drv>; + regulator-name = "vcc_host"; + regulator-always-on; + regulator-boot-on; + }; + + vcc_sys: vsys-regulator { + compatible = "regulator-fixed"; + regulator-name = "vcc_sys"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + regulator-always-on; + regulator-boot-on; + }; + + vdd_log: vdd-logic { + compatible = "pwm-regulator"; + rockchip,pwm_id = <1>; + rockchip,pwm_voltage = <1100000>; + pwms = <&pwm1 0 25000 1>; + regulator-name = "vcc_log"; + regulator-min-microvolt = <860000>; + regulator-max-microvolt = <1360000>; + regulator-always-on; + regulator-boot-on; + }; + + xin32k: xin32k { + compatible = "fixed-clock"; + clock-frequency = <32768>; + clock-output-names = "xin32k"; + #clock-cells = <0>; + }; +}; + +&backlight { + /delete-property/ enable-gpios; +}; + +&cpu0 { + cpu-supply = <&vdd_cpu>; +}; + +&dfi { + status = "okay"; +}; + +&dmc { + center-supply = <&vdd_log>; + status = "okay"; +}; + +&gpu { + mali-supply = <&vdd_gpu>; + status = "okay"; +}; + +&i2c0 { + clock-frequency = <400000>; + status = "okay"; + + rk808: pmic@1b { + compatible = "rockchip,rk808"; + reg = <0x1b>; + interrupt-parent = <&gpio0>; + interrupts = <4 IRQ_TYPE_LEVEL_LOW>; + pinctrl-names = "default"; + pinctrl-0 = <&pmic_int &global_pwroff>; + rockchip,system-power-controller; + wakeup-source; + #clock-cells = <1>; + clock-output-names = "rk808-clkout1", "rk808-clkout2"; + vcc1-supply = <&vcc_sys>; + vcc2-supply = <&vcc_sys>; + vcc3-supply = <&vcc_sys>; + vcc4-supply = <&vcc_sys>; + vcc6-supply = <&vcc_sys>; + vcc8-supply = <&vcc_io>; + vcc9-supply = <&vcc_io>; + vcc12-supply = <&vcc_io>; + vddio-supply = <&vcc_io>; + + regulators { + vdd_cpu: DCDC_REG1 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <750000>; + regulator-max-microvolt = <1400000>; + regulator-name = "vdd_arm"; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdd_gpu: DCDC_REG2 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <850000>; + regulator-max-microvolt = <1250000>; + regulator-name = "vdd_gpu"; + regulator-ramp-delay = <6000>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc_ddr: DCDC_REG3 { + regulator-always-on; + regulator-boot-on; + regulator-name = "vcc_ddr"; + + regulator-state-mem { + regulator-on-in-suspend; + }; + }; + + vcc_io: DCDC_REG4 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vcc_io"; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <3300000>; + }; + }; + + vcc_tp: LDO_REG1 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vcc_tp"; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcca_codec: LDO_REG2 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vcca_codec"; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <3300000>; + }; + }; + + vdd_10: LDO_REG3 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <1000000>; + regulator-name = "vdd_10"; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <1000000>; + }; + }; + + vccio_wl: LDO_REG4 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-name = "vccio_wl"; + + regulator-state-mem { + regulator-on-in-suspend; + }; + }; + + vccio_sd: LDO_REG5 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vccio_sd"; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdd10_lcd: LDO_REG6 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <1000000>; + regulator-name = "vdd10_lcd"; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc_18: LDO_REG7 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-name = "vcc_18"; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <1800000>; + }; + }; + + vcc18_lcd: LDO_REG8 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-name = "vcc18_lcd"; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc_sd: SWITCH_REG1 { + regulator-always-on; + regulator-boot-on; + regulator-name = "vcc_sd"; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc_lcd: SWITCH_REG2 { + regulator-always-on; + regulator-boot-on; + regulator-name = "vcc_lcd"; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + }; + }; +}; + +&i2c1 { + clock-frequency = <400000>; + status = "okay"; + + rk628: rk628@50 { + reg = <0x50>; + interrupt-parent = <&gpio7>; + interrupts = <15 IRQ_TYPE_LEVEL_HIGH>; + enable-gpios = <&gpio5 RK_PC2 GPIO_ACTIVE_HIGH>; + reset-gpios = <&gpio7 RK_PB6 GPIO_ACTIVE_LOW>; + status = "okay"; + }; +}; + +&i2c2 { + status = "okay"; + + rt5651: rt5651@1a { + compatible = "rockchip,rt5651"; + reg = <0x1a>; + clocks = <&cru SCLK_I2S0_OUT>; + clock-names = "mclk"; + pinctrl-names = "default"; + pinctrl-0 = <&i2s0_mclk>; + spk-con-gpio = <&gpio0 11 GPIO_ACTIVE_HIGH>; + hp-det-gpio = <&gpio4 28 GPIO_ACTIVE_LOW>; + #sound-dai-cells = <0>; + }; +}; + +&i2s { + #sound-dai-cells = <0>; + status = "okay"; +}; + +#include "rk628.dtsi" + +&io_domains { + audio-supply = <&vcc_io>; + bb-supply = <&vcc_io>; + dvp-supply = <&vcc_io>; + flash0-supply = <&vcc_18>; + gpio30-supply = <&vcc_io>; + gpio1830 = <&vcc_io>; + lcdc-supply = <&vcc_lcd>; + sdcard-supply = <&vccio_sd>; + wifi-supply = <&vccio_wl>; + status = "okay"; +}; + +&rockchip_suspend { + rockchip,pwm-regulator-config = < + (0 + | PWM1_REGULATOR_EN + ) + >; + status = "okay"; +}; + +&pwm0 { + status = "okay"; +}; + +&pwm1 { + pinctrl-names = "active"; + pinctrl-0 = <&pwm1_pin_pull_down>; + status = "okay"; +}; + +&emmc { + bus-width = <8>; + cap-mmc-highspeed; + disable-wp; + non-removable; + num-slots = <1>; + pinctrl-names = "default"; + pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_pwr &emmc_bus8>; + max-frequency = <100000000>; + mmc-hs200-1_8v; + mmc-ddr-1_8v; + status = "okay"; +}; + +&saradc { + vref-supply = <&vcc_18>; + status = "okay"; +}; + +&sdmmc { + supports-sd; + bus-width = <4>; + cap-mmc-highspeed; + sd-uhs-sdr12; + sd-uhs-sdr25; + sd-uhs-sdr50; + sd-uhs-sdr104; + cap-sd-highspeed; + card-detect-delay = <200>; + disable-wp; /* wp not hooked up */ + num-slots = <1>; + pinctrl-names = "default"; + pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>; + vmmc-supply = <&vcc_sd>; + vqmmc-supply = <&vccio_sd>; + supports-sd; + status = "okay"; +}; + +&wdt { + status = "okay"; +}; + +&pwm0 { + status = "okay"; +}; + +&backlight { + status = "okay"; +}; + +&rga { + status = "okay"; +}; + +&tsadc { + rockchip,hw-tshut-polarity = <0>; + status = "okay"; +}; + +&usbphy { + status = "okay"; +}; + +&usb_host0_ehci { + rockchip-relinquish-port; + status = "okay"; +}; + +&usb_host0_ohci { + status = "okay"; +}; + +&usb_host1 { + status = "okay"; +}; + +&usb_otg { + status = "okay"; +}; + +&vopb { + status = "okay"; +}; + +&vopb_mmu { + status = "okay"; +}; + +&vopl { + status = "okay"; +}; + +&vopl_mmu { + status = "okay"; +}; + +&pinctrl { + pcfg_pull_none_drv_8ma: pcfg-pull-none-drv-8ma { + drive-strength = <8>; + }; + + pcfg_pull_up_drv_8ma: pcfg-pull-up-drv-8ma { + bias-pull-up; + drive-strength = <8>; + }; + + pmic { + pmic_int: pmic-int { + rockchip,pins = ; + }; + }; + + sdmmc { + /* + * Default drive strength isn't enough to achieve even + * high-speed mode on EVB board so bump up to 8ma. + */ + sdmmc_bus4: sdmmc-bus4 { + rockchip,pins = <6 16 RK_FUNC_1 &pcfg_pull_up_drv_8ma>, + <6 17 RK_FUNC_1 &pcfg_pull_up_drv_8ma>, + <6 18 RK_FUNC_1 &pcfg_pull_up_drv_8ma>, + <6 19 RK_FUNC_1 &pcfg_pull_up_drv_8ma>; + }; + + sdmmc_clk: sdmmc-clk { + rockchip,pins = <6 20 RK_FUNC_1 &pcfg_pull_none_drv_8ma>; + }; + + sdmmc_cmd: sdmmc-cmd { + rockchip,pins = <6 21 RK_FUNC_1 &pcfg_pull_up_drv_8ma>; + }; + + sdmmc_pwr: sdmmc-pwr { + rockchip,pins = <7 11 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + usb { + host_vbus_drv: host-vbus-drv { + rockchip,pins = <0 14 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; +};